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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Analog Devices Inc. HMC1034LP6GETR

Name: HMC1034LP6GETR
Brand: Analog Devices Inc.
SKU: HMC1034LP6GETR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: HMC1034LP6GETR

Manufacturer:: Analog Devices Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 40-VFQFN Exposed Pad

Datasheet:: HMC1034LP6GETR.pdf

Description:: IC CLOCK GEN 1:1 3GHZ 40-SMT

Quantity:: RFQ Add To RFQ list

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Product details

Overview

HMC1034LP6GETR from Analog Devices (formerly Hittite Microwave) is a wideband fractional-N PLL clock generator IC with integrated VCO, delivering differential clock outputs from 125 MHz to 3 GHz. It achieves 78 fs RMS phase jitter (typical, integer mode, 50 MHz ref), -165 dBc/Hz phase noise floor, and supports up to 100 MHz phase detector rate - enabling high-precision timing in 10G/40G/100G optical line cards and SERDES PHY interfaces.

For engineers reviewing the HMC1034LP6GETR datasheet, HMC1034LP6GETR pinout, HMC1034LP6GETR application, or HMC1034LP6GETR equivalent, key selection criteria include its 24-bit frequency resolution (3 Hz step), Exact Frequency Mode for near-zero output error, 40-lead 6×6 mm QFN package, and compliance with G.8251/GR-253-CORE jitter standards for telecom infrastructure.

Technical Context

The HMC1034LP6GETR implements a fractional-N PLL architecture with a Delta-Sigma modulator and integrated RF VCO, supporting both integer and fractional feedback modes. Its charge pump operates at up to 2.54 mA with 20 µA gain step size, and the phase detector accepts reference inputs up to 350 MHz with AC coupling.

Differential RF outputs (RF_P/RF_N) feature 2-bit amplitude control (four gain settings), mute capability, and rise/fall times of 150–250 ps depending on gain setting and frequency. The device uses SPI serial programming for register configuration and includes built-in digital self-test functionality.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Frequency Range	125 MHz to 3000 MHz - covers OTU2/OTU3/OTU4, SONET STS-768, 10G/40G/100G Ethernet, and 32G Fibre Channel reference rates.
RMS Phase Jitter (Typ.)	78 fs - measured at 800 MHz with 50 MHz reference, integer mode; enables sub-10⁻¹⁵ BER in high-speed serial links.
Phase Noise Floor	<-165 dBc/Hz - ensures minimal close-in and broadband noise contribution to ADC sampling clocks and SERDES CDR loops.
Max Phase Detector Rate	100 MHz - allows wide loop bandwidths for fast lock time and effective jitter attenuation in translation applications.
Frequency Resolution	3 Hz typical (24-bit step size) - supports exact synthesis of non-integer multiples like 622.08 MHz, 156.25 MHz, and 805.66 MHz without residual error.
Figure of Merit (FOM)	-227 dBc/Hz (fractional mode) - industry-leading efficiency metric indicating low power-to-noise ratio for battery-sensitive or thermally constrained designs.
Supply Voltages	+5 V (VPPCP/VCC1/VCC2); +3.3 V (AVDD/RVDD/DVDD3V/VCCHF/VCCPS/VCCPD) - dual-rail operation isolates analog, digital, and VCO sections for optimal noise rejection.

Pinout & Package

40-lead, 6 mm × 6 mm, 0.5 mm pitch QFN package (RoHS-compliant, MSL1, exposed ground paddle). All ground leads and paddle must be soldered to PCB RF ground per Hittite application note land pattern recommendations.

Pin/Terminal	Circuit Role	Design Meaning
1, 2, 5, 6, 8, 9, 11–14, 18–22, 24, 26, 34, 37, 38	N/C	Internally unconnected; externally grounded for RF shielding and thermal conduction per layout guidelines.
3, 25, 27, 35, 36, 39	Analog Supply	Dedicated rails (VPPCP, VCC2, VCC1, VCCHF, VCCPS, VCCPD) isolate VCO core, prescaler, phase detector, and HF analog blocks.
4	Charge Pump Output	Drives external loop filter; requires precise decoupling to minimize reference spurs and phase noise degradation.
10, 15	Reference Input	RVDD powers reference buffer; XREFP accepts AC-coupled square/sine wave (1–3.3 Vpp, ≤350 MHz).
16, 17	Digital Supply & Enable	DVDD3V powers CMOS logic; CEN high enables full operation, low places device in low-power state (~5 mA or ~10 µA).
23	VCO Tuning Voltage	VTUNE connects to loop filter output; voltage range and stability directly determine VCO frequency accuracy and settling behavior.
28, 29	Differential RF Output	RF_N/RF_P deliver LVPECL-compatible swing (0.25–1.35 Vpp into 50 Ω) with programmable amplitude and mute control.
30–33	SPI Interface	SEN/SDI/SCK/LD_SDO support 3-wire serial programming and lock-detect reporting; LD_SDO doubles as GPO or SDO.
40	Bias Reference	BIAS provides internal 1.920 V ±20 mV reference; must be measured with ≥10 GΩ meter - not for external loading.

Key Features

Feature	Design Value
Exact Frequency Mode	Delta-Sigma modulator enables output frequencies with <1 Hz residual error - eliminates need for external VCXO trimming in precision timing systems.
2-Bit Output Amplitude Control	Four programmable gain settings (00–11) adjust differential swing from 300 mVpp to 1.1 Vpp - simplifies interface matching to FPGA transceivers or SERDES inputs.
Built-in Digital Self Test	On-chip diagnostics verify PLL lock status, register integrity, and basic functional operation - reduces test time and validation overhead in production.
G.8251 / GR-253-CORE Compliance	Meets stringent ITU-T and Telcordia jitter specifications for synchronous optical networking - qualifies for carrier-grade 10G/40G/100G line card deployment.
Low-Power Power-Down Modes	Crystal-off state draws 10 µA; crystal-on (100 MHz) draws 5 mA - enables rapid wake-up while minimizing standby power in modular optical systems.

Applications

10G/40G/100G Optical Line Cards	High-Speed Data Converter Clocking
Use Scenario: Generating precise, low-jitter reference clocks for OTU3/OTU4 framers and FEC engines in DWDM line cards. IC Role / Device Role / Timing Role: Primary clock source providing 2488.32 MHz (STS-768) or 1747.02 MHz (OTU4) with jitter attenuation via fractional-N loop filtering. Use Value: Enables <1 ps RMS jitter at 100G line rates, meeting OTN G.709 frame alignment requirements and reducing bit-error-rate in coherent receivers.	Use Scenario: Driving sampling clocks for 14-bit, 500 MSPS+ RF DACs and ADCs in software-defined radio and radar front ends. IC Role / Device Role / Timing Role: Low-phase-noise clock generator replacing discrete crystal + PLL solutions to minimize aperture jitter and SFDR degradation. Use Value: -165 dBc/Hz noise floor preserves ENOB by limiting sampling uncertainty - critical for >70 dBc spurious-free dynamic range.
Synchronous Ethernet (SyncE) Timing	Processor & FPGA High-Frequency Clocking
Use Scenario: Recovering and regenerating Stratum 3E-compliant clocks from packet-based networks using EEC Option 1/2 architectures. IC Role / Device Role / Timing Role: Jitter attenuator and frequency translator that cleans incoming 156.25 MHz or 622.08 MHz SyncE references before distribution. Use Value: Achieves <0.5 UI peak-to-peak jitter at 10G rates, satisfying ITU-T G.8262 egress timing mask for mobile backhaul equipment.	Use Scenario: Supplying core clock domains (e.g., 1.2 GHz, 2.4 GHz) to multi-core ARM processors or high-end Xilinx UltraScale+ FPGAs. IC Role / Device Role / Timing Role: Integrated VCO-based clock synthesizer eliminating external resonators and reducing BOM count in compute-accelerated edge nodes. Use Value: 78 fs RMS jitter maintains timing margin across large die areas, preventing hold-time violations in 7 nm/5 nm SoC clock trees.

10G/40G/100G Optical Line Cards

High-Speed Data Converter Clocking

Use Scenario: Generating precise, low-jitter reference clocks for OTU3/OTU4 framers and FEC engines in DWDM line cards.

IC Role / Device Role / Timing Role: Primary clock source providing 2488.32 MHz (STS-768) or 1747.02 MHz (OTU4) with jitter attenuation via fractional-N loop filtering.

Use Value: Enables <1 ps RMS jitter at 100G line rates, meeting OTN G.709 frame alignment requirements and reducing bit-error-rate in coherent receivers.

Use Scenario: Driving sampling clocks for 14-bit, 500 MSPS+ RF DACs and ADCs in software-defined radio and radar front ends.

IC Role / Device Role / Timing Role: Low-phase-noise clock generator replacing discrete crystal + PLL solutions to minimize aperture jitter and SFDR degradation.

Use Value: -165 dBc/Hz noise floor preserves ENOB by limiting sampling uncertainty - critical for >70 dBc spurious-free dynamic range.

Synchronous Ethernet (SyncE) Timing

Processor & FPGA High-Frequency Clocking

Use Scenario: Recovering and regenerating Stratum 3E-compliant clocks from packet-based networks using EEC Option 1/2 architectures.

IC Role / Device Role / Timing Role: Jitter attenuator and frequency translator that cleans incoming 156.25 MHz or 622.08 MHz SyncE references before distribution.

Use Value: Achieves <0.5 UI peak-to-peak jitter at 10G rates, satisfying ITU-T G.8262 egress timing mask for mobile backhaul equipment.

Use Scenario: Supplying core clock domains (e.g., 1.2 GHz, 2.4 GHz) to multi-core ARM processors or high-end Xilinx UltraScale+ FPGAs.

IC Role / Device Role / Timing Role: Integrated VCO-based clock synthesizer eliminating external resonators and reducing BOM count in compute-accelerated edge nodes.

Use Value: 78 fs RMS jitter maintains timing margin across large die areas, preventing hold-time violations in 7 nm/5 nm SoC clock trees.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
LMK04832RHAR	Two-stage jitter cleaner (PLL1 + PLL2), supports dual-loop architecture; higher power (220 mA vs. 180 mA typ.), larger 7×7 mm package.	Optimized for ultra-low additive jitter (<50 fs) in RF sampling systems; lacks integrated VCO - requires external VCO or crystal.	Choose LMK04832RHAR when cascaded jitter cleaning is required and board space permits larger footprint.
Si5341-A01A-GM	Multi-output, 12-output clock generator with DCO-based architecture; 48 fs typical jitter, but no integrated VCO - relies on external crystal and PLL synthesis.	Designed for complex clock tree distribution (Ethernet, PCIe, SATA); supports multiple independent output frequencies simultaneously.	Choose Si5341-A01A-GM when generating >2 synchronized clocks with different frequencies and formats (LVDS, HCSL, LVPECL) from one device.

Compared with LMK04832RHAR and Si5341-A01A-GM, the HMC1034LP6GETR offers single-chip integration of VCO and fractional-N PLL in a compact 6×6 mm QFN, making it optimal for space-constrained, single-output, ultra-low-jitter applications where external component count must be minimized.

Availability

HMC1034LP6GETR is available at Aetrix Electronics and suitable for 10G/40G/100G optical modules, synchronous Ethernet timing systems, and high-speed data converter clocking requiring stable component supply across extended product lifecycles.

Supply support for HMC1034LP6GETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Hittite Microwave in 2014 and integrates its high-frequency RF and microwave expertise into precision timing and signal chain solutions.

The HMC1034LP6GETR belongs to Analog Devices' Hittite-branded clock generator portfolio, designed specifically for telecom infrastructure, optical transport, and high-speed serial interface timing where ultra-low jitter and wide frequency coverage are mandatory.

FAQ

What is the maximum output frequency supported by the HMC1034LP6GETR?

The HMC1034LP6GETR supports a differential RF output frequency range from 125 MHz to 3000 MHz. This covers critical telecom standards including OTU4 (1747.02 MHz), STS-768 (2488.32 MHz), and 32G Fibre Channel (425 MHz), with guaranteed performance across -40°C to +85°C operating temperature.

Does the HMC1034LP6GETR require an external VCO?

No, the HMC1034LP6GETR integrates a wideband RF VCO on-die. It does not require an external VCO or crystal oscillator for fundamental operation - only an external reference clock (up to 350 MHz) and loop filter components are needed to configure the fractional-N PLL.

How is jitter performance specified for the HMC1034LP6GETR?

Jitter is specified as RMS phase jitter: 78 fs typical (integer mode, 800 MHz output, 50 MHz reference, 12 kHz–20 MHz integration bandwidth) and 118 fs (fractional mode, 622.08 MHz, same bandwidth). Period jitter is <377 fs total (instrument-inclusive), with estimated device contribution <150 fs.

Can the HMC1034LP6GETR generate exact frequencies like 622.08 MHz without error?

Yes - the HMC1034LP6GETR's Exact Frequency Mode leverages its 24-bit fractional divider and Delta-Sigma modulator to synthesize frequencies such as 622.08 MHz, 156.25 MHz, and 805.66 MHz with near-zero residual error (typically <1 Hz), eliminating the need for external VCXO calibration.

What power supply configurations does the HMC1034LP6GETR require?

The HMC1034LP6GETR requires two separate supply domains: +5 V for VPPCP, VCC1, and VCC2 (VCO core/buffer/divider); and +3.3 V for AVDD, RVDD, DVDD3V, VCCHF, VCCPS, and VCCPD (analog/digital/phase detector sections). Each rail has defined min/max tolerances and current draw specifications per operating mode.

HMC1034LP6GETR Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 40-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Type:: -

PLL:: Yes

Input:: Clock

Output:: Clock

Number of Circuits:: 1

Ratio - Input:Output:: 1:2

Differential - Input:Output:: No/Yes

Frequency - Max:: 3GHz

Divider/Multiplier:: Yes/No

Voltage - Supply:: 3V ~ 5.2V

Operating Temperature:: -40°C ~ 85°C

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 40-SMT (6x6)

HMC1034LP6GETR FAQ

1.How can I place an order for HMC1034LP6GETR through Aetrix?

Please submit a Request for Quotation (RFQ) for HMC1034LP6GETR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for HMC1034LP6GETR reliable?

The price and inventory of HMC1034LP6GETR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HMC1034LP6GETR is usually 5 days.

3.What payment methods are accepted for HMC1034LP6GETR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HMC1034LP6GETR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for HMC1034LP6GETR?

HMC1034LP6GETR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your HMC1034LP6GETR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for HMC1034LP6GETR?

For technical support, including HMC1034LP6GETR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HMC1034LP6GETR requirements.

6.How does Aetrix verify that HMC1034LP6GETR is sourced from the original manufacturer or authorized distributors?

All HMC1034LP6GETR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HMC1034LP6GETR meets industry standards.

7.What is the process for return or replacement of HMC1034LP6GETR?

All HMC1034LP6GETR units undergo pre-shipment inspection (PSI). If there is an issue with HMC1034LP6GETR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The HMC1034LP6GETR part is unused and in its original packaging.

Return procedure for HMC1034LP6GETR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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