Analog Devices Inc. HMC1035LP6GETR

Overview

HMC1035LP6GETR from Analog Devices (formerly Hittite Microwave) is a high-performance, 3.3 V fractional-N clock generator IC with integrated VCO, delivering differential LVDS/LVPECL outputs from 25 MHz to 2500 MHz. It features 97 fs RMS jitter (2.5 GHz, 12 kHz–20 MHz), –163 dBc/Hz phase noise floor, and Exact Frequency Mode for zero-Hz output error-used in 10G/40G/100G optical line cards and high-speed data converter clocking.

For engineers reviewing the HMC1035LP6GETR datasheet, HMC1035LP6GETR pinout, HMC1035LP6GETR application, or HMC1035LP6GETR equivalent, key selection criteria include its dual-mode PLL (integer/fractional-N), programmable output amplitude (690–2560 mVpp), configurable power/performance priority modes, and SPI-controlled output mute and lock detect-critical for jitter-sensitive SERDES, FPGA, and ADC/DAC timing systems.

Technical Context

The HMC1035LP6GETR integrates a low-noise fractional-N PLL with 24-bit Delta-Sigma modulator and on-die VCO, supporting reference input frequencies up to 350 MHz and phase detector rates up to 100 MHz. Its architecture enables wide loop bandwidth tuning via external filter components and supports both integer and fractional feedback division (N-divider range: 16–524,287 integer; ±3/+4 fractional deviation).

It implements dual termination schemes: internal 100 Ω differential termination for LVDS compatibility and external biasing for LVPECL operation. Output swing is digitally adjustable across 12 gain settings, and the device provides SPI-configurable modes including Power Priority (173–221 mA) and Performance Priority (186–237 mA), with lock detect and output disable functionality.

Key Specifications

Pinout & Package

40-lead, 6 × 6 mm LFCSP package (RoHS-compliant, MSL1, matte tin plating) with exposed ground paddle requiring solder connection to PCB RF ground per Hittite layout guidelines.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with LMK04832RHAR and AD9523-1BCPZ, the HMC1035LP6GETR delivers superior fractional-N flexibility and lowest jitter at 2.5 GHz, but lacks multi-output fanout or JESD204B-specific features-making it ideal for single-channel, ultra-precision clock synthesis where size and phase noise are critical.

Availability

HMC1035LP6GETR is available at Aetrix Electronics and suitable for 10G/40G/100G optical modules, high-speed data converter timing, and FPGA clocking applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for HMC1035LP6GETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Hittite Microwave in 2014 and maintains its high-frequency RF and clock product lines. The company specializes in precision signal processing, RF, and timing solutions for demanding communication and instrumentation markets.

The HMC1035LP6GETR belongs to Analog Devices' legacy Hittite clock generator family, designed specifically for ultra-low jitter, wideband frequency synthesis in optical transport, wireless infrastructure, and high-speed data acquisition systems.

FAQ

What is the maximum output frequency supported by the HMC1035LP6GETR?

The HMC1035LP6GETR supports differential clock outputs from 25 MHz to 2500 MHz. This range is validated across temperature (–40°C to +85°C) and supply conditions (3.15–3.5 V), with 2.5 GHz operation confirmed in both LVDS and LVPECL modes per datasheet Figures 6 and 7. Operation above 2500 MHz is not specified or guaranteed.

Does the HMC1035LP6GETR support both integer-N and fractional-N PLL modes?

Yes, the HMC1035LP6GETR supports both integer-N and fractional-N PLL modes. Its 19-bit N-divider accommodates integer values from 16 to 524,287, while fractional mode permits dynamic deviation of ±3 to +4 around nominal divide ratios. The 24-bit Delta-Sigma modulator enables Exact Frequency Mode with zero-Hz output error in either mode.

How is output termination configured on the HMC1035LP6GETR?

The HMC1035LP6GETR supports two termination configurations: internal 100 Ω differential termination (default, LVDS-compatible) and external LVPECL termination using standard bias networks (e.g., Figure 21). Selection is controlled via VCO_Reg03[4]; internal termination reduces component count, while external termination enables precise LVPECL level control and DC coupling.

What is the typical RMS jitter performance of the HMC1035LP6GETR at 2.5 GHz?

The HMC1035LP6GETR achieves 97 fs RMS jitter (12 kHz–20 MHz integration bandwidth) at 2.5 GHz output in Performance Priority mode with LVPECL signaling. In fractional-N mode, jitter increases to 110 fs under identical conditions. These values are measured with optimal loop filter and 100 MHz OCXO reference per datasheet Figure 4.

Can the HMC1035LP6GETR be used as a jitter attenuator?

Yes, the HMC1035LP6GETR functions as a jitter attenuator when configured with a narrow loop bandwidth (e.g., 127 kHz per Loop Filter Configuration Table) and a clean reference input. Its low-noise phase detector and high-PFD frequency capability suppress reference-induced jitter while maintaining low intrinsic phase noise-validated in optical module applications requiring BER <1e–12.