Analog Devices Inc. HMC699LP5ETR
- Part No.:
- HMC699LP5ETR
- Manufacturer:
- Analog Devices Inc.
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
HMC699LP5ETR.pdf
- Description:
- IC SYNTHESIZER 7GHZ INT-N 32QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
HMC699LP5ETR from Analog Devices (formerly Hittite Microwave) is a 7 GHz integer-N frequency synthesizer IC with reversible-polarity phase-frequency detector (PFD), lock detect output, and open-collector PFD buffers for op-amp-based loop filter interfacing. It supports continuous division ratios N = 56–519 and non-continuous N = 16–54, operates from 160 MHz to 7000 MHz VCO input, delivers ultra-low SSB phase noise of –153 dBc/Hz @ 10 kHz offset (100 MHz ref), and targets high-performance PLL systems in satellite comms and military radios.
For engineers reviewing the HMC699LP5ETR datasheet, HMC699LP5ETR pinout, HMC699LP5ETR application, or HMC699LP5ETR equivalent, key selection considerations include its 7 GHz VCO input range, dual-mode integer-N division architecture, –153 dBc/Hz phase noise floor at 10 kHz, 5×5 mm 32-lead QFN package with exposed ground paddle, and compatibility with differential loop filters for fast settling and low spurs.
Technical Context
The HMC699LP5ETR implements an integer-N PLL architecture with a wideband reversible-polarity PFD and integrated A/S counter logic for programmable division. Its PFD operates up to 7 GHz input, supports both sine and square wave reference inputs (10–1300 MHz), and provides NU/ND open-collector outputs with 2000 mVPP swing and 0.32 V/Rad gain.
It features two distinct division modes: continuous (N = 56–519, requiring A+1 ≥ S) and non-continuous (N = 16–54), enabling flexible frequency planning while maintaining low phase noise via high reference frequencies and wide loop bandwidths. The device requires external AC coupling on REF/NREF and FIN/NFIN pins and mandates RF grounding of the exposed paddle per Hittite's land pattern guidelines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCO Input Frequency Range | 160 MHz to 7000 MHz - enables direct synthesis up to X-band without prescalers |
| Reference Input Range | 10 MHz to 1300 MHz - supports crystal oscillators, TCXOs, and higher-frequency references |
| SSB Phase Noise Floor | –153 dBc/Hz @ 10 kHz offset (100 MHz ref, 0 dBm) - enables low-jitter clock generation for high-speed serial links |
| Division Ratio Modes | Continuous N = 56–519; non-continuous N = 16–54 - allows trade-off between frequency resolution and programming flexibility |
| PFD Output Type | Open-collector NU/ND with 2000 mVPP swing - interfaces directly with op-amp integrators in active loop filters |
| Supply Current | 345 mA typical @ +5 V - defines thermal design margin and power supply sizing for RF subsystems |
| Operating Temperature | –40 °C to +85 °C - qualified for industrial and military environmental stress profiles |
Pinout & Package
32-lead 5×5 mm QFN package (HMC699LP5ETR) with exposed ground paddle requiring solder connection to PCB RF ground plane. RoHS-compliant matte tin finish, MSL1 rating, max reflow 260 °C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (LD) | Lock Detect Output | Pulsed CMOS output: average HIGH = locked state; used for system status monitoring and auto-calibration sequencing |
| 2 (INV) | PFD Polarity Control | CMOS input selecting normal/inverted PFD operation - critical for loop stability when VCO polarity is unknown |
| 4–5, 18, 25 (Vcc1–Vcc_pd) | Power Supply Inputs | Four independent 5 V ±0.25 V rails - decoupling required per rail to suppress supply-induced phase noise |
| 9–14 (N0–N5) | N Counter LSB–MSB | 6-bit parallel CMOS control for division ratio N - defines output frequency as FVCO = N × FREF |
| 15–16 (FIN, NFIN) | Differential VCO Input | AC-coupled RF inputs accepting 160–7000 MHz - require external DC blocking and 50 Ω termination |
| 22–23 (S1, S0) | S Counter LSB–MSB | 2-bit Swallow counter control - used with A counter to implement dual-modulus division in continuous mode |
| 27–28 (NREF, REF) | Differential Reference Input | AC-coupled inputs for 10–1300 MHz reference - square wave preferred below 100 MHz for optimal phase noise |
| 30–31 (ND, NU) | PFD Down/Up Outputs | Open-collector outputs driving loop filter integrator - require external pull-up resistors (4.3–20 Ω recommended) |
| Paddle (GND) | RF/DC Ground Reference | Exposed thermal pad - must be soldered to solid ground plane with ≥6 thermal vias for EMI suppression and thermal dissipation |
Key Features
| Feature | Design Value |
|---|---|
| Reversible-Polarity PFD | INV pin selects PFD polarity to match VCO tuning slope - eliminates trial-and-error loop compensation |
| Ultra-Low Phase Noise Floor | –153 dBc/Hz @ 10 kHz offset enables <100 fs RMS jitter in 10 Gbps SerDes clock recovery |
| Wideband VCO Input Support | 160 MHz–7 GHz operation allows direct integration with GaAs/GaN VCOs without frequency dividers |
| Open-Collector PFD Outputs | NU/ND drive standard op-amp loop filters - simplifies analog filter design and improves noise immunity |
| Programmable Division Architecture | Supports both continuous (A+1 ≥ S) and non-continuous modes - balances frequency agility vs. resolution in radar LO synthesis |
Applications
| Satellite Communication Systems | Point-to-Point Radios |
|---|---|
Use Scenario: Generating stable local oscillator signals for Ka-band transceivers in LEO satellite payloads. IC Role / Device Role / Timing Role: Integer-N synthesizer locking a 7 GHz VCO to a temperature-compensated 100 MHz reference for up/down-conversion. Use Value: –153 dBc/Hz phase noise ensures adjacent-channel interference remains below –65 dBc in 125 MHz channel spacing. |
Use Scenario: Providing agile LO synthesis in 24–38 GHz E-band backhaul radios with fast frequency hopping. IC Role / Device Role / Timing Role: Programmable divider generating 7 GHz intermediate frequencies from a 100 MHz OCXO reference. Use Value: Continuous N = 56–519 mode enables sub-2 μs settling time for dynamic spectrum access protocols. |
| Military Radar Systems | Sonet/OTN Clock Generation |
Use Scenario: Synthesizing chirp waveforms in X-band pulse-Doppler radar front-ends with precise timing control. IC Role / Device Role / Timing Role: High-frequency integer-N PLL core driving a varactor-tuned VCO with lock detect feedback to FPGA sequencer. Use Value: Reversible PFD polarity and LD output enable closed-loop calibration of VCO nonlinearity across temperature. |
Use Scenario: Generating low-jitter 155.52 MHz and 622.08 MHz clocks for SONET OC-48/OC-192 line cards. IC Role / Device Role / Timing Role: Low-phase-noise frequency synthesizer referenced to a 10 MHz atomic clock source. Use Value: –153 dBc/Hz @ 10 kHz yields <200 fs integrated jitter (12 kHz–20 MHz), meeting GR-1244-CORE mask requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integer-N synthesizer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADF4159BCPZ | 13 GHz max RF input; fractional-N architecture; integrated charge pump; SPI interface | Better frequency resolution and faster lock time, but higher phase noise floor (–110 dBc/Hz @ 10 kHz) | Select ADF4159BCPZ when fractional-N agility and SPI programmability outweigh phase noise requirements |
| HMC703LP4E | 13 GHz max RF input; integer-N only; 4×4 mm 24-lead QFN; lower supply current (220 mA) | Smaller footprint and lower power, but limited to N = 1–65535 with no A/S counter distinction | Select HMC703LP4E for space-constrained designs needing 13 GHz coverage and simpler programming |
Compared with ADF4159BCPZ and HMC703LP4E, the HMC699LP5ETR offers superior phase noise performance and dedicated A/S counter architecture for predictable integer-N behavior, making it optimal for fixed-frequency, low-spur radar and satcom LO generation where jitter and spectral purity are critical.
Availability
HMC699LP5ETR is available at Aetrix Electronics and suitable for satellite communication systems, point-to-point radios, military radar subsystems, and SONET/OTN clock generation requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for HMC699LP5ETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Hittite Microwave in 2014 and maintains its high-frequency RF product portfolio, emphasizing precision timing, microwave synthesis, and mmWave signal chain solutions.
The HMC699LP5ETR belongs to Hittite's legacy integer-N synthesizer family, designed specifically for low-phase-noise, wideband PLL applications in defense, aerospace, and optical transport infrastructure.
FAQ
What is the maximum VCO input frequency supported by the HMC699LP5ETR?
The HMC699LP5ETR supports a maximum VCO input frequency of 7000 MHz, verified in electrical specifications under TA = +25 °C and Vcc = 5 V. This enables direct synthesis in X-band without prescaling and is confirmed by functional testing up to 7 GHz with 0 dBm input power. The HMC699LP5ETR maintains specified phase noise and lock detection performance across this full range when used with appropriate AC coupling and impedance matching.
Does the HMC699LP5ETR support both sine and square wave reference inputs?
Yes, the HMC699LP5ETR accepts both sine and square wave reference inputs across its 10–1300 MHz range. Square wave input achieves better phase noise at lower reference frequencies (<100 MHz), while sine wave is preferred above 100 MHz per characterization data. The REF/NREF pins are AC-coupled and require external DC blocking capacitors, and input power must remain within –5 to +5 dBm at 100 MHz to meet specification limits.
How does the A+S counter architecture affect programming of the HMC699LP5ETR?
The HMC699LP5ETR uses a dual-modulus A/S counter structure where N = 8(A+1) + S. For continuous division ratios (N = 56–519), the condition A+1 ≥ S must hold; violation results in non-continuous behavior (N = 16–54). Programming requires setting six N bits (N0–N5), two S bits (S0–S1), and one INV bit - all CMOS-compatible with VIH ≥ 1.8 V and VIL ≤ 1.1 V. Truth tables in the datasheet define valid combinations.
What is the purpose of the exposed ground paddle on the HMC699LP5ETR package?
The exposed ground paddle on the HMC699LP5ETR serves dual thermal and RF grounding functions. It must be soldered to the PCB's main ground plane using ≥6 thermal vias to achieve the specified 11.6 °C/W junction-to-ground thermal resistance and maintain phase noise integrity. Per Hittite Application Note, failure to connect the paddle degrades EMI performance, increases junction temperature beyond 135 °C absolute max, and risks lock instability due to ground bounce on NU/ND outputs.
Can the HMC699LP5ETR be used with a passive loop filter?
No, the HMC699LP5ETR requires an active loop filter due to its open-collector NU/ND outputs, which need external pull-up resistors and op-amp integration. Passive filters cannot interface directly with these outputs. The datasheet explicitly specifies use with "differential loop filter" and "op-amp based loop filter", and evaluation board schematics confirm active integrator topology with LMH6629-grade amplifiers. Attempting passive filtering results in undefined PFD voltage levels and loss of lock.
HMC699LP5ETR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- No
- Input:
- Clock
- Output:
- Clock
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 1:1
- Differential - Input:Output:
- Yes/Yes
- Frequency - Max:
- 1.3GHz
- Divider/Multiplier:
- Yes/No
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 32-QFN (5x5)
HMC699LP5ETR FAQ
1.How can I place an order for HMC699LP5ETR through Aetrix?
Please submit a Request for Quotation (RFQ) for HMC699LP5ETR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HMC699LP5ETR reliable?
The price and inventory of HMC699LP5ETR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HMC699LP5ETR is usually 5 days.
3.What payment methods are accepted for HMC699LP5ETR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HMC699LP5ETR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HMC699LP5ETR?
HMC699LP5ETR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HMC699LP5ETR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HMC699LP5ETR?
For technical support, including HMC699LP5ETR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HMC699LP5ETR requirements.
6.How does Aetrix verify that HMC699LP5ETR is sourced from the original manufacturer or authorized distributors?
All HMC699LP5ETR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HMC699LP5ETR meets industry standards.
7.What is the process for return or replacement of HMC699LP5ETR?
All HMC699LP5ETR units undergo pre-shipment inspection (PSI). If there is an issue with HMC699LP5ETR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HMC699LP5ETR part is unused and in its original packaging.
Return procedure for HMC699LP5ETR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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