Analog Devices Inc. HMC765LP6CE

Overview

HMC765LP6CE from Analog Devices (formerly Hittite Microwave) is a fully integrated Fractional-N PLL with on-die VCO, operating from 7.8 GHz to 8.8 GHz. It delivers 13 dBm typical RF output power, supports fractional/integer-N modes, and features ultra-low phase noise (–97 dBc/Hz @ 10 kHz offset, fractional mode, 50 MHz reference). It is designed for local oscillator (LO) generation in high-linearity microwave radio systems.

For engineers reviewing the HMC765LP6CE datasheet, HMC765LP6CE pinout, HMC765LP6CE application, or HMC765LP6CE equivalent, this device requires attention to Vtune voltage range (2–13 V), dual-supply architecture (3.3 V digital/analog + 5 V VCO/charge pump), serial port timing (≤50 MHz SCK), and RFOUT AC-coupling - all critical for stable LO synthesis in VSAT and phased array designs.

Technical Context

The HMC765LP6CE implements a delta-sigma modulator-based fractional-N architecture enabling 3 Hz frequency resolution and cycle slip prevention. Its integrated VCO eliminates external tuning components while maintaining low phase noise across temperature (–40°C to +85°C) and supply variation.

It features separate analog and digital supply domains (AVCC/DVDD/VDDIO at 3.3 V; VCCVCO/VDDCP at 5 V), dedicated charge pump (CP) and bias reference (BIAS = 1.92 V ±20 mV), and a 40-pin QFN package with exposed ground paddle requiring RF grounding per Hittite's land pattern guidelines.

Key Specifications

Pinout & Package

Package: 40-lead, 6 × 6 mm leadless QFN with exposed thermal paddle. Requires soldering of all ground leads and paddle to PCB RF ground plane using ≥12 thermal vias (0.3 mm diameter, 1 mm pitch).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fractional-N PLL with integrated VCO applications.

Compared with HMC765LP6CE, HMC764LP6CE offers identical footprint and interface but sacrifices 1 GHz of upper-band coverage, while ADF4371BCPZ trades pin compatibility for broader frequency range and embedded regulation - making HMC765LP6CE optimal for Ku-band-specific, space-constrained, high-phase-noise-critical LO generation.

Availability

HMC765LP6CE is available at Aetrix Electronics and suitable for VSAT terminals, point-to-point microwave radios, and phased array radar systems requiring stable component supply, long-lifecycle support, and guaranteed RoHS-compliant manufacturing.

Supply support for HMC765LP6CE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Hittite Microwave in 2014 and continues its high-frequency RFIC product line with full technical and supply chain continuity.

The HMC765LP6CE belongs to Hittite's "PLLS w/ Integrated VCO - SMT" family, engineered specifically for microwave LO generation in defense, satellite, and test equipment where phase noise, frequency agility, and integration density are paramount.

FAQ

What is the recommended power supply sequencing for HMC765LP6CE?

HMC765LP6CE requires strict power-up order: apply 3.3 V supplies (AVCC, DVDD, VDDIO) first, then 5 V supplies (VCCVCO, VDDCP). Reverse sequencing may cause latch-up or undefined register states. The HMC765LP6CE datasheet specifies that AVDD must equal DVDD, and VCCCP must equal VDDCP - mismatched voltages risk degraded phase noise or failure to lock.

Does HMC765LP6CE support both fractional and integer-N modes simultaneously?

No - HMC765LP6CE operates in either fractional-N or integer-N mode per configuration, selected via register bit FRAC_EN. Fractional mode enables 3 Hz resolution and fine-tuning; integer mode delivers lowest in-band spurs and best phase noise floor (–226 dBc/Hz FOM). Mode switching requires full register reload and lock reacquisition.

How is the lock detect (LD) function implemented on HMC765LP6CE?

The LD_SDO pin (Pin 33) serves dual purpose: as open-drain lock detect (active-high when PLL is locked) and as serial data output during register reads. Lock detection is based on phase error window monitoring within the PFD; assertion requires stable reference and VCO signals, proper loop filter design, and ≥100 kHz loop bandwidth for reliable response.

Can HMC765LP6CE drive a 50 Ω load directly at RFOUT?

No - RFOUT (Pin 38) is AC-coupled and intended for connection to a 50 Ω transmission line via an external DC-blocking capacitor (e.g., 100 pF). The HMC765LP6CE does not include on-die 50 Ω termination; direct DC-coupled 50 Ω loading will disrupt bias and degrade output power and phase noise performance.

What is the significance of the BIAS pin (Pin 20) on HMC765LP6CE?

The BIAS pin outputs a precision 1.920 V ±20 mV internal reference used by analog bias circuits. It must be measured with a 10 GΩ input impedance meter (e.g., Agilent 34410A); standard 10 MΩ DVMs will read low due to loading. This pin cannot drive external loads and must remain unloaded to maintain HMC765LP6CE's specified phase noise and tuning linearity.