Analog Devices Inc. HMC769LP6CETR
- Part No.:
- HMC769LP6CETR
- Manufacturer:
- Analog Devices Inc.
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
HMC769LP6CETR.pdf
- Description:
- IC PLL W/VCO FRACT-N 40-QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,742
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
HMC769LP6CETR from Analog Devices (formerly Hittite Microwave) is a fully integrated Fractional-N PLL frequency synthesizer with on-die VCO, operating from 9.05 to 10.15 GHz. It delivers +12 dBm RF output power, supports 50 MHz reference input, achieves -106 dBc/Hz in-band phase noise (integer mode), and features 24-bit frequency resolution (3 Hz typical step size). It is used in microwave point-to-point radios requiring ultra-low jitter and fast frequency settling.
For engineers reviewing the HMC769LP6CETR datasheet, HMC769LP6CETR pinout, HMC769LP6CETR application, or HMC769LP6CETR equivalent, key selection criteria include its 9.05–10.15 GHz VCO range, integrated RF divider with 16-bit programmability, external trigger support for frequency hopping, and QFN-40 6×6 mm RoHS-compliant package with exposed ground paddle.
Technical Context
The HMC769LP6CETR implements a delta-sigma fractional-N synthesizer architecture with dual-mode operation (integer/fractional), enabling fine frequency resolution without sacrificing phase noise performance. Its integrated VCO uses a high-Q resonator structure and exhibits 160 MHz/V tuning sensitivity at 5.5 V, with frequency drift of only 0.9 MHz/°C over -40°C to +85°C.
It integrates a 350 MHz, 14-bit reference path, 40-pin QFN package with dedicated analog/digital supply domains (5 V for VCO/charge pump; 3.3 V for logic/analog bias), and supports frequency/phase modulation, triggered sweeping, and double-buffered register updates - all controlled via a 4-wire SPI interface.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCO Frequency Range | 9.05–10.15 GHz - covers full Ku-band uplink for VSAT and FMCW radar transmit channels. |
| RF Output Power | +12 dBm - sufficient to drive mixer LO ports directly without external amplification in many microwave designs. |
| In-Band Phase Noise | -106 dBc/Hz @ 10 kHz offset (integer mode, 50 MHz ref) - enables <1° RMS jitter in 100 kHz loop bandwidth systems. |
| Frequency Resolution | 3 Hz typical (24-bit step size) - allows precise channel spacing for narrowband comms and radar Doppler binning. |
| Reference Input Range | DC–350 MHz - supports low-jitter crystal oscillators, OCXOs, or clock synthesizers as system reference sources. |
| Settling Time | 202 µs for 100 MHz step (9.6→9.7 GHz) - meets fast-hopping requirements in military ECM and agile radar waveforms. |
| Supply Voltages | VCCVCO = 4.75–5.25 V; RVDD/AVDD/DVDD/VDDIO = 2.7–3.5 V - requires dual-rail PCB power delivery with strict decoupling per domain. |
| Operating Temperature | -40°C to +85°C - qualified for industrial and defense-grade embedded RF subsystems. |
Pinout & Package
Package: 40-lead, 6 × 6 mm leadless QFN (RoHS-compliant, MSL3, matte Sn finish), with exposed thermal ground paddle requiring solder connection to PCB RF ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RFOUT (Pin 38) | VCO RF output | AC-coupled 50 Ω output delivering +12 dBm; requires external DC blocking capacitor and impedance-matched trace. |
| VTUNE (Pin 6) | VCO tuning voltage input | 0–13 V analog control port; bandwidth limited by source impedance; drives internal varactor for frequency synthesis. |
| CP (Pin 18) | Charge pump output | Differential current source/sink driving external loop filter; gain configurable in 20 µA steps (0.02–2.5 mA). |
| XREFP (Pin 24) | Reference input | Single-ended AC-coupled 50 Ω input accepting square/sine waves up to 350 MHz; internal DC bias eliminates external bias tee. |
| TRIG (Pin 36) | External trigger input | CMOS-level input enabling synchronized frequency hopping, sweep start, or modulation event timing. |
| LD_SDO (Pin 33) | Multi-function digital output | Configurable as lock detect flag or serial data out (SDO); critical for closed-loop system status monitoring and diagnostics. |
| VCCVCO1/VCCVCO2 (Pins 8, 40) | VCO power supplies | High-current 5 V rails; Pin 40 is primary VCO supply; Pin 8 is dummy for pin compatibility but must be tied to VCC. |
| GND (Pins 2–5, 7, 22, 23, 26, 35, 37, 39) | RF/DC ground terminals | All must connect to low-inductance PCB ground plane; exposed paddle is mandatory thermal and RF return path. |
Key Features
| Feature | Design Value |
|---|---|
| Fractional-N + Integer-N modes | Enables both ultra-fine frequency resolution (3 Hz) and lowest spurious generation in integer mode for stable carrier synthesis. |
| Integrated frequency sweeper | On-chip linear/logarithmic sweep generator eliminates FPGA or MCU firmware overhead for radar chirp or test equipment sweeps. |
| Triggered frequency hopping | Hardware-triggered hop execution (<202 µs) ensures deterministic latency for secure comms and electronic warfare waveforms. |
| Ultra-low phase noise FOM | -230 dBc/Hz (integer) / -227 dBc/Hz (fractional) - industry-leading figure of merit enabling high-order QAM and low-EVM links. |
| 40-lead QFN with exposed paddle | 36 mm² footprint with optimized thermal resistance (27.2 °C/W junction-to-paddle) for continuous 265 mA VCO current dissipation. |
| Multi-rail supply architecture | Isolated 5 V (VCO/CP) and 3.3 V (logic/analog) domains minimize supply coupling and preserve phase noise integrity. |
Applications
| VSAT Radio | Microwave Point-to-Point Radios |
|---|---|
Use Scenario: Ku-band satellite terminal uplink signal generation with adaptive modulation and interference mitigation. IC Role / Device Role / Timing Role: Primary LO synthesizer generating stable 9.6–10.1 GHz carriers for QPSK/8PSK uplink transmission. Use Value: -106 dBc/Hz in-band phase noise ensures <0.5% EVM at 64-QAM, while 202 µs settling enables dynamic channel reassignment. |
Use Scenario: Licensed 11–13 GHz backhaul link requiring high spectral purity and rapid frequency agility. IC Role / Device Role / Timing Role: Integrated PLL+VCO providing LO for direct-conversion transceivers in compact outdoor units. Use Value: +12 dBm output drives mixer LO directly; 3 Hz resolution supports precise channel alignment across dense frequency grids. |
| FMCW Radar Systems | Phased Array Applications |
Use Scenario: Automotive or industrial radar sensor transmitting linear frequency-modulated chirps for distance/velocity measurement. IC Role / Device Role / Timing Role: Sweep controller and LO source generating precisely timed, repeatable 9.05–10.15 GHz chirps. Use Value: On-chip sweeper + TRIG input enables sub-microsecond chirp synchronization across multiple ICs for coherent MIMO operation. |
Use Scenario: Active electronically scanned array (AESA) radar front-end requiring phase-coherent LO distribution. IC Role / Device Role / Timing Role: Local oscillator synthesizer per T/R module, supporting beam steering via frequency diversity or phase shifting. Use Value: Ultra-low 1/f noise and -140 dBc/Hz @ 1 MHz offset minimize radar sidelobes; 0.9 MHz/°C drift ensures calibration stability over temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar fractional-N PLL with integrated VCO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADF4371BCPZ | Wider 6.39–32.71 GHz range; higher 3.3 V-only supply integration; no external VTUNE; 32-bit N-divider. | Better suited for multi-band test equipment; lacks hardware TRIG and integrated sweeper. | Select ADF4371BCPZ when wider frequency coverage and single-supply simplicity outweigh need for external trigger control. |
| HMC830LP6CE | Narrower 3.45–6.8 GHz range; lower phase noise (-110 dBc/Hz @ 10 kHz); same 40-pin QFN package and SPI interface. | Optimized for C/X-band radar and comms; cannot replace HMC769LP6CETR in Ku-band systems due to frequency gap. | Choose HMC830LP6CE only for sub-7 GHz designs where its superior close-in phase noise justifies band limitation. |
Compared with ADF4371BCPZ and HMC830LP6CE, the HMC769LP6CETR uniquely balances Ku-band coverage, hardware-triggered agility, and integrated sweep functionality - making it the only option among the three qualified for FMCW radar chirp generation with deterministic external event synchronization.
Availability
HMC769LP6CETR is available at Aetrix Electronics and suitable for microwave point-to-point radios, FMCW radar systems, and phased array radar requiring stable component supply, long-term lifecycle assurance, and traceable sourcing from authorized channels.
Supply support for HMC769LP6CETR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Hittite Microwave in 2014 and maintains its high-frequency RF product lines, emphasizing precision microwave ICs for defense, aerospace, and instrumentation markets.
The HMC769LP6CETR belongs to Hittite's "PLLs with Integrated VCO" family, designed specifically for demanding microwave frequency synthesis applications where phase noise, settling speed, and integration reduce system complexity and board area.
FAQ
What is the operating temperature range for the HMC769LP6CETR?
The HMC769LP6CETR is specified for continuous operation from -40°C to +85°C ambient temperature. Its thermal resistance (junction-to-paddle) is 27.2 °C/W, and maximum junction temperature is 135°C. The device maintains VCO frequency drift of only 0.9 MHz/°C across this range, ensuring stable LO performance in outdoor and industrial environments without active thermal management. This rating applies to the HMC769LP6CETR under recommended PCB layout and grounding conditions.
Does the HMC769LP6CETR support both integer and fractional-N synthesis modes?
Yes, the HMC769LP6CETR supports both integer-N and fractional-N synthesis modes. In integer mode, it achieves -106 dBc/Hz in-band phase noise at 10 kHz offset with 50 MHz reference; in fractional mode, it delivers -102 dBc/Hz and 24-bit frequency resolution (3 Hz typical step size). Mode selection is configured via SPI register writes, and both modes share the same 9.05–10.15 GHz VCO range and 350 MHz reference input capability. This dual-mode flexibility makes the HMC769LP6CETR suitable for applications prioritizing either spurious-free operation or ultra-fine frequency granularity.
What is the purpose of the TRIG pin on the HMC769LP6CETR?
The TRIG pin (Pin 36) is a CMOS-level input that enables hardware-synchronized events including triggered frequency hopping, sweep initiation, and modulation activation. When asserted, it initiates actions defined in configuration registers - such as jumping between pre-programmed frequencies or starting a linear chirp - with deterministic latency (<202 µs for 100 MHz hops). Unlike software-controlled SPI updates, TRIG bypasses serial interface timing, making it essential for time-critical radar and EW applications. The HMC769LP6CETR requires no additional firmware overhead to execute TRIG-driven functions.
Can the HMC769LP6CETR drive a mixer LO port directly without external amplification?
Yes, the HMC769LP6CETR delivers +12 dBm RF output power at its RFOUT pin (Pin 38), which is sufficient to directly drive the LO port of many passive and active mixers used in Ku-band systems. Its output is AC-coupled and matched to 50 Ω, requiring only a series DC-blocking capacitor on the PCB. For mixers with LO drive requirements exceeding +12 dBm (e.g., >+15 dBm), an external driver amplifier is needed. The HMC769LP6CETR's output power remains stable across temperature and tuning voltage, simplifying RF front-end design.
What are the critical PCB layout requirements for the HMC769LP6CETR?
Successful implementation of the HMC769LP6CETR requires strict adherence to RF layout practices: (1) the exposed thermal paddle must be soldered to a solid, low-impedance RF ground plane using ≥9 vias; (2) all GND pins (2–5, 7, 22, 23, 26, 35, 37, 39) must connect directly to that plane; (3) separate 5 V (VCCVCO1/2, VPPCPA) and 3.3 V (RVDD, DVDD, etc.) supply domains require individual LC filtering and star-point grounding; (4) RFOUT and XREFP traces must be 50 Ω controlled-impedance; (5) VTUNE routing must avoid digital noise coupling. Hittite Application Note AN-1197 provides the validated land pattern.
HMC769LP6CETR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- Yes
- Input:
- Clock
- Output:
- Clock
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 1:1
- Differential - Input:Output:
- No/No
- Frequency - Max:
- 10.15GHz
- Divider/Multiplier:
- Yes/No
- Voltage - Supply:
- 2.7V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 40-QFN (6x6)
HMC769LP6CETR FAQ
1.How can I place an order for HMC769LP6CETR through Aetrix?
Please submit a Request for Quotation (RFQ) for HMC769LP6CETR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for HMC769LP6CETR reliable?
The price and inventory of HMC769LP6CETR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HMC769LP6CETR is usually 5 days.
3.What payment methods are accepted for HMC769LP6CETR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HMC769LP6CETR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for HMC769LP6CETR?
HMC769LP6CETR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your HMC769LP6CETR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for HMC769LP6CETR?
For technical support, including HMC769LP6CETR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HMC769LP6CETR requirements.
6.How does Aetrix verify that HMC769LP6CETR is sourced from the original manufacturer or authorized distributors?
All HMC769LP6CETR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HMC769LP6CETR meets industry standards.
7.What is the process for return or replacement of HMC769LP6CETR?
All HMC769LP6CETR units undergo pre-shipment inspection (PSI). If there is an issue with HMC769LP6CETR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The HMC769LP6CETR part is unused and in its original packaging.
Return procedure for HMC769LP6CETR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
HMC769LP6CETR Tags
-
CD74HCT4046AM96
Texas Instruments

-
MC14046BDWR2G
onsemi

-
501MILFT
Renesas
-
CD74HC7046AM
Texas Instruments
-
CDCVF2505PWR
Texas Instruments

-
RC19004A100GNL#KB0
Renesas
-
SI5351A-B-GTR
Skyworks Solutions Inc.

-
CY2305SXI-1T
Infineon Technologies

-
570BILFT
Renesas

-
CDCE913PWR
Texas Instruments

-
CY2305SXI-1HT
Infineon Technologies

-
DS1086LU+T
Analog Devices Inc./Maxim Integrated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

