Analog Devices Inc. HMC836LP6CE

Overview

HMC836LP6CE from Analog Devices (formerly Hittite Microwave) is a fully integrated Fractional-N PLL with on-die VCO, operating as a frequency synthesizer in RF signal generation systems. It delivers 3365–3705 MHz RF output via internal x2 doubler, achieves <180 fs rms jitter (100 Hz–100 MHz), supports 24-bit frequency resolution (~3 Hz step), and features cycle-slip prevention for fast frequency hopping - used in 4G infrastructure base stations and phased array transceivers.

For engineers reviewing the HMC836LP6CE datasheet, HMC836LP6CE pinout, HMC836LP6CE application, or HMC836LP6CE equivalent, key selection criteria include its −227 dBc/Hz Figure of Merit, 50 MHz max phase detector frequency in integer mode, integrated autocalibration for low-voltage VCO tuning, and 40-lead 6×6 mm QFN package with exposed ground paddle.

Technical Context

The HMC836LP6CE implements a delta-sigma modulator architecture enabling fine frequency resolution while suppressing fractional spurs. Its phase detector incorporates cycle-slip prevention logic to reduce lock time during large frequency jumps, and the integrated VCO includes digitally selectable tank capacitors (CAP settings 0–31) for center-frequency trimming across temperature and process variation.

It supports three operational modes: integer, fractional feedback, and fractional feedforward - each with distinct maximum PFD frequencies (125 MHz, 100 MHz, and 80 MHz respectively). The autocalibration subsystem dynamically adjusts VCO tuning voltage to maintain stable operation under supply and temperature drift, with typical VCO pushing of ±1.5 MHz/V and tuning sensitivity of 15 MHz/V at 2 GHz.

Key Specifications

Pinout & Package

Package: 40-lead, 6 mm × 6 mm × 0.85 mm RoHS-compliant QFN with exposed ground paddle (MSL1, reflow peak 260°C). Thermal resistance junction-to-paddle is 20 °C/W; all ground leads and paddle must be soldered to PCB RF ground per Hittite Application Note.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fractional-N PLL with integrated VCO applications.

Compared with ADF4372BCPZ and HMC830LP6CE, the HMC836LP6CE uniquely balances 3.365–3.705 GHz coverage, 6×6 mm footprint, and −227 dBc FOM - making it optimal for compact, high-performance 4G/LTE repeaters and phased array tiles where thermal and spatial constraints dominate.

Availability

HMC836LP6CE is available at Aetrix Electronics and suitable for cellular infrastructure, communications test equipment, and phased array applications requiring stable component supply, long-term lifecycle support, and traceable sourcing from authorized channels.

Supply support for HMC836LP6CE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Hittite Microwave in 2014 and maintains its high-frequency RF product portfolio, emphasizing precision microwave ICs for defense, communications, and instrumentation markets.

The HMC836LP6CE belongs to Hittite's PLLs with Integrated VCOs product line, designed specifically for high-data-rate wireless infrastructure requiring low phase noise, fast frequency agility, and single-chip integration.

FAQ

What is the maximum phase detector frequency supported by the HMC836LP6CE in integer mode?

The HMC836LP6CE supports up to 125 MHz phase detector frequency in integer mode, provided the minimum N-divider value is respected (e.g., N ≥ fvco/125 MHz). This enables wide loop bandwidths for fast lock times in dynamic frequency-hopping systems. The HMC836LP6CE datasheet specifies this limit under "Electrical Specifications" with note referencing N-value constraints.

Does the HMC836LP6CE require an external loop filter, and what topology is recommended?

Yes, the HMC836LP6CE requires an external passive loop filter connected to the CP pin (Pin 4) to stabilize the PLL and shape closed-loop response. A third-order passive filter is recommended per Hittite Application Note AN-1112; component values depend on desired loop bandwidth (e.g., ~80 kHz for fractional mode) and charge pump current setting. The HMC836LP6CE evaluation board uses factory-optimized values documented in the schematic.

How does the autocalibration subsystem in the HMC836LP6CE improve VCO performance?

The HMC836LP6CE autocalibration subsystem dynamically adjusts VTUNE voltage to center the VCO frequency within its tuning range, compensating for process, voltage, and temperature (PVT) variations. It executes on power-up and can be triggered manually via register write. This ensures consistent start-up behavior and reduces system-level calibration overhead - critical for unattended repeater and femtocell deployments using the HMC836LP6CE.

Can the HMC836LP6CE generate output frequencies outside the 3365–3705 MHz range?

No - the HMC836LP6CE's integrated VCO and x2 doubler are specified only for 3365–3705 MHz RF output. While the fundamental VCO operates from 1682.5–1852.5 MHz, the internal doubler and matching network are optimized for this band. Operation outside this range risks degraded phase noise, reduced output power, or failure to lock. The HMC836LP6CE datasheet explicitly defines these limits in the "RF Output Characteristics" table.

What is the purpose of the BIAS pin (Pin 40) on the HMC836LP6CE, and how should it be used?

The BIAS pin (Pin 40) provides access to an internal 1.920 V ±20 mV precision reference voltage used for biasing internal analog circuits. It is not intended to drive external loads and must be measured with a ≥10 GΩ impedance meter (e.g., Agilent 34410A); standard 10 MΩ DVMs will read erroneously low. No external connection is required - the HMC836LP6CE relies on this internal reference for accurate charge pump and phase detector operation.