Monolithic Power Systems Inc. HR1000AGS

Overview

HR1000AGS from Monolithic Power Systems is a resonant half-bridge controller IC designed for high-efficiency AC-DC power supplies. It delivers complementary 50% duty-cycle gate drive signals with 350 ns fixed dead-time, supports up to 600 kHz switching frequency, integrates a 600 V high-side driver with bootstrap diode, and provides 1.5 A/2 A source/sink capability for both high-side and low-side MOSFETs. It is used in LCD TV and telecom SMPS designs requiring zero-voltage switching and light-load burst-mode operation.

For engineers reviewing the HR1000AGS datasheet, HR1000AGS pinout, HR1000AGS application, or HR1000AGS equivalent, key selection criteria include its resonant topology support, programmable oscillator range (max 600 kHz), dual-level over-current protection (frequency-shift + latched shutdown), integrated PFC disable interface, and SO-16 package compatibility with high dV/dt immunity.

Technical Context

The HR1000AGS implements a fixed-frequency-to-variable-frequency control architecture where output voltage regulation is achieved by modulating switching frequency via opto-coupler feedback into the Fset pin. Its oscillator uses CT capacitor charge/discharge with peak (3.8 V) and valley (0.9 V) thresholds, driven by a precision 2.0 V reference at Fset and current-mirrored internal sources.

It features two independent protection paths: a fast frequency-shift response triggered at 0.8 V on CS pin (with 250 ns leading-edge blanking), and a latched shutdown at 1.5 V with programmable duration set by TIMER pin RC network. The BO pin enables non-latching brown-out detection at 1.25 V with 12 µA hysteresis current, while LATCH pin provides external hard-disable at 1.85 V threshold.

Key Specifications

Pinout & Package

HR1000AGS is housed in a standard SOIC-16 (SO-16) package with 1.27 mm pitch, creepage-enhanced layout including N.C. pin (Pin 13) for high-voltage isolation. Pin 14 (SW) and Pin 16 (BST) are rated for floating 600 V operation; Pin 10 (GND) serves as low-side return and bias ground reference.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar resonant half-bridge controller applications.

Compared with UCC256301DR and ICE2HS01G, HR1000AGS uniquely combines 600 kHz capability, integrated bootstrap diode, and hardware-based burst-mode in a SO-16 package-enabling faster time-to-market for analog-controlled resonant supplies targeting <300 mW no-load power.

Availability

HR1000AGS is available at Aetrix Electronics and suitable for LCD TV power supplies, telecom rectifiers, desktop PC ATX units, and universal AC-DC adapters requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.

Supply support for HR1000AGS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global distribution through authorized partners.

The HR1000AGS belongs to MPS's resonant topology controller product line, engineered specifically for high-efficiency, high-density AC-DC conversion in consumer and telecom power supplies where ZVS, light-load efficiency, and system-level protection coordination are critical.

FAQ

What is the maximum recommended switching frequency for HR1000AGS in continuous operation?

The HR1000AGS is characterized for stable operation up to 600 kHz, with oscillator accuracy maintained across -40°C to +125°C junction temperature. At this frequency, gate drive rise/fall times remain ≤20 ns, and thermal dissipation stays within SO-16 θJA = 80°C/W limits when PCB copper area meets JESD51-7 4-layer guidelines.

How does the HR1000AGS implement zero-voltage switching (ZVS) assurance?

ZVS is ensured by the fixed 350 ns dead-time between complementary HG and LG outputs, which guarantees sufficient time for resonant tank voltage reversal before next switching edge. This dead-time is internally generated and unaffected by process or temperature variation, enabling reliable ZVS across full load and line ranges.

Can the HR1000AGS operate without an external PFC stage?

Yes - the BO pin supports direct AC rectified bus sensing, and the PFC pin can be left unconnected or tied high. The controller functions fully in standalone resonant half-bridge mode; PFC disable functionality is optional and only engaged when the PFC pin is actively driven low by an external controller.

What is the purpose of the N.C. pin (Pin 13) in the SO-16 package?

Pin 13 is a non-connected spacer placed between VCC (Pin 12) and SW (Pin 14) to increase creepage distance on the PCB. It has no internal connection and must remain unconnected to meet IEC 60950-1 and UL 62368-1 reinforced insulation requirements for 600 V floating circuits.

How does the soft-start function interact with the current-sense protection during startup?

During startup, rising SS pin voltage gradually reduces the effective Fset resistance, lowering switching frequency from max toward steady-state value. If CS exceeds 0.8 V before regulation is established, the SS capacitor discharges immediately - forcing frequency back to maximum and limiting inrush energy without triggering latched shutdown.

Is the 2.0 V reference at the Fset pin buffered and load-independent?

Yes - the Fset pin provides a precision 2.0 V (±4%) reference with ≤1 µA load current capability. Its output impedance is low enough to drive typical 10–100 kΩ feedback resistors without droop, and it remains stable during burst-mode or fault conditions, retaining regulation memory.

What happens to gate outputs during thermal shutdown?

Upon reaching 150°C junction temperature, the HR1000AGS disables both HG and LG outputs, pulls PFC pin low, and enters latched state. Outputs remain inactive until junction temperature falls below 120°C recovery threshold and VCC cycles below 8.2 V UVLO threshold to reset the latch.