Monolithic Power Systems Inc. HR1002GS-Z

Overview

HR1002GS-Z from Monolithic Power Systems is an enhanced LLC resonant half-bridge controller IC with adaptive dead-time adjustment (ADTA), capacitive mode protection (CMP), and two-level over-current protection. It delivers 50% duty cycle, variable-frequency control up to 600 kHz, integrated 600 V high-side gate driver with bootstrap diode, and operates from 13–15.5 V VCC in AC/DC server power supplies.

For engineers reviewing the HR1002GS-Z datasheet, HR1002GS-Z pinout, HR1002GS-Z application, or HR1002GS-Z equivalent, key selection criteria include ADTA-enabled EMI reduction, dV/dt-sensed dead-time tuning via HBVS, configurable burst-mode threshold at BURST pin, and robust capacitive-mode fault handling for short-circuit resilience in high-reliability SMPS designs.

Technical Context

The HR1002 implements a dual-loop oscillator architecture: FSET sets CT charge current to define minimum frequency, while optocoupler-modulated RFMAX adjusts frequency dynamically for output regulation. Its ADTA circuit senses dV/dt at HBVS to adaptively insert 180–290 ns dead time between HG and LG outputs-ensuring zero-voltage switching without external timing components.

Capacitive mode protection operates independently per switching edge: after LG turns off, VCS is compared to VCSPR (−131 to −50 mV); after HG turns off, VCS is compared to VCSNR (50–131 mV). A 35–80 µs CMP timer prevents false triggering, and only initiates SS discharge if fault persists beyond tDMAX (1.3–2 µs).

Key Specifications

Pinout & Package

HR1002GS-Z is housed in a standard SOIC-16 package with creepage-enhancing NC pin (Pin 13) isolating SW (Pin 14) from adjacent low-voltage terminals. The layout prioritizes high-voltage separation and thermal dissipation (θJA = 80°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LLC controller applications.

Compared with UCC256301DR and ICE2HS01G, HR1002GS-Z provides superior ZVS assurance via ADTA, eliminates external CMP circuitry, and achieves higher light-load efficiency through hardware-configurable burst mode - reducing BOM count by 3–5 passive components in new 600 V LLC designs.

Availability

HR1002GS-Z is available at Aetrix Electronics and suitable for server power supplies, telecom rectifiers, AC/DC adapters, and electronic lighting ballasts requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for HR1002GS-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with over 20 years of expertise in DC/DC, AC/DC, motor drivers, and battery solutions.

The HR1002 belongs to MPS's enhanced LLC controller product line, engineered specifically for high-efficiency, high-reliability resonant converters in datacenter, telecom, and industrial power systems where adaptive timing and fault resilience are critical.

FAQ

What is the purpose of the NC pin (Pin 13) on HR1002GS-Z?

Pin 13 is a no-connect spacer designed to increase creepage distance between the high-voltage SW pin (Pin 14) and adjacent low-voltage pins like VCC (Pin 12). It has no internal connection and must remain unconnected on the PCB to meet IEC 62368-1 safety requirements for reinforced insulation in AC/DC applications.

How does HR1002GS-Z implement adaptive dead-time adjustment without external components?

HR1002GS-Z uses its HBVS pin (Pin 9) to sense dV/dt at the half-bridge switching node via an external high-voltage capacitor. Internal comparators detect slope polarity and timing, automatically adjusting dead time between HG and LG outputs from 180–290 ns - eliminating need for fixed RC networks or digital timing ICs.

Can HR1002GS-Z operate without the bootstrap diode on BST?

Yes - HR1002GS-Z integrates a bootstrap diode, but an external diode between VCC and BST is strongly recommended. It accelerates BST capacitor charging during startup and fault recovery, ensuring reliable high-side gate turn-on when LG duty cycle is low or during repeated restart attempts.

What happens during capacitive mode protection activation?

When CMP triggers, HR1002GS-Z blocks HG or LG turn-on based on detected VCS polarity, enforces a 35–80 µs blanking window, and discharges SS only if the condition persists beyond tDMAX (1.3–2 µs). This prevents false trips from noise while maintaining regulation - unlike latch-only controllers that halt operation entirely.

Is the HR1002GS-Z compatible with synchronous rectification controllers?

Yes - HR1002GS-Z provides clean, phase-aligned LG and HG signals with precise dead-time control, making it compatible with common SR controllers like MP6908 or NCP4306. Its 50% duty cycle and low propagation delay (<150 ns) ensure accurate SR MOSFET timing without additional phase compensation.

How is burst mode configured, and what is its impact on regulation accuracy?

Burst mode is enabled by applying a voltage below VBURST (1.17–1.28 V) to the BURST pin, typically via a resistor divider from the optocoupler cathode. Regulation remains tight (±1%) because the controller resumes switching immediately when feedback exceeds VBURST + VBURST_HYS (30–100 mV), avoiding large output excursions.

Does HR1002GS-Z support frequency foldback during over-temperature conditions?

No - HR1002GS-Z implements hard thermal shutdown at TJ = 150°C with recovery hysteresis at 120°C. It does not reduce switching frequency as a cooling measure. Instead, OTP disables all gate outputs and forces residual current draw of 240–420 µA until die temperature falls below the recovery threshold.