Monolithic Power Systems Inc. HR1213GY-0000-P

Overview

HR1213GY-0000-P from Monolithic Power Systems is a multi-mode PFC and current-mode LLC combo controller supporting AC/DC inputs, featuring digital average current control (CCM/DCM), adaptive dead-time adjustment (ADTA), capacitive mode protection (CMP), and UART-configurable bias options. It delivers up to 250kHz PFC switching and 500kHz LLC steady-state operation with integrated 600V high-side gate driver, used in high-efficiency ATX and gaming power supplies.

For engineers reviewing the HR1213GY-0000-P datasheet, HR1213GY-0000-P pinout, HR1213GY-0000-P application, or HR1213GY-0000-P equivalent, key selection considerations include hybrid CCM/DCM PFC efficiency optimization, digital burst-mode control for audible noise reduction, configurable brown-in/out thresholds, SO-pin external thermal shutdown interface, and dual-package availability (SOIC-20/TSSOP-20).

Technical Context

The HR1213 implements a digitally controlled, hybrid PFC stage using average current mode with real-time transition between CCM (for peak current reduction at heavy loads) and DCM (for frequency reduction at light loads). Its LLC stage uses current-mode control with ADTA and CMP to enforce zero-voltage switching while preventing capacitive-mode operation.

Configuration occurs via UART interface with user-friendly GUI support; internal HV start-up current source (7.9–12.5mA) eliminates external start-up resistors. Protections include OVP (1.475–1.52V on FBP/SO), OCP (1.475–1.52V on CSHB), thermal shutdown (145°C), and auto-restart/latch-off selectable modes.

Key Specifications

Pinout & Package

HR1213GY-0000-P is packaged in SOIC-20 (MSL Level 3), with 0.65mm pitch, 12.8mm × 7.5mm body, and exposed pad not present. Pin functions are validated per MPS HR1213 Rev. 1.0 datasheet Figure 4 and Pin Functions table (pp. 6–7).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PFC+LLC combo controller applications.

Compared with UCC28070DWR and ICE5QSAG, HR1213GY-0000-P uniquely integrates digital hybrid-mode PFC, current-mode LLC with ADTA/CMP, and UART-based configuration-enabling higher efficiency across wider load ranges, lower audible noise, and fewer external components in 200–1000W applications.

Availability

HR1213GY-0000-P is available at Aetrix Electronics and suitable for desktop PC ATX PSUs, gaming power supplies, and notebook adapters requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for HR1213GY-0000-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with over 20 years of expertise in DC–DC converters, LED drivers, and AC–DC controllers.

The HR1213 product line targets high-density, high-efficiency AC–DC power conversion systems-designed specifically for next-generation computing, gaming, and portable power applications demanding digital configurability and robust protection.

FAQ

What is the purpose of the CSHB pin and how does it enable capacitive mode protection?

The CSHB pin senses half-bridge primary current via a resistor or capacitive divider. It compares the sensed voltage against VCSPR (+80mV) and VCSNR (−80mV) polarity thresholds. If current polarity reverses during switching-indicating capacitive mode-the IC terminates HSG or LSG drive to prevent hard-switching and device stress, ensuring reliable ZVS operation.

Can HR1213GY-0000-P operate with a DC input only, and what pins are involved?

Yes-HR1213GY-0000-P supports DC input operation. VCC is supplied externally (12–35V), HV is left unconnected or tied to PGND, and UART is shorted to GND per datasheet Figure 2. ACIN and FBP remain active for DC brown-in/out and bus regulation, enabling seamless AC/DC dual-input designs.

How does the UART interface affect system startup timing and reliability?

UART is not intended for real-time control; it operates at power-up after VCC exceeds 14.4V and VREG stabilizes. Configuration data is stored in MTP memory and applied at each reset. Startup remains deterministic because critical functions (PFC/LLC control, protections) operate independently of UART initialization.

What is the role of the ADTA function and how is it implemented without external components?

ADTA monitors the SW node's dV/dt (>85 V/µs) to detect zero-voltage crossing and dynamically adjusts HSG/LSG dead time. Implemented entirely within the digital control core using internal comparators and timing logic, it requires no external sensors or compensation networks-reducing BOM count and layout sensitivity.

Does HR1213GY-0000-P support both auto-restart and latch-off protection modes, and how are they selected?

Yes-OCP, OPP, OVP, and SO-triggered faults can be configured for either auto-restart (brief shutdown then resume) or latch-off (requires power cycle). Selection is done via UART register writes or MTP programming during production; default behavior is auto-restart unless explicitly changed.

What thermal management considerations apply to the SOIC-20 package at full load?

At TA = 25°C, SOIC-20 θJA is 65°C/W. With 1.92W max dissipation and 125°C max junction temperature, allowable ambient rise is 60°C-limiting continuous full-load operation to ≤85°C ambient without forced airflow or PCB copper pour. Thermal vias under PGND/GNDD pads are strongly recommended.