Analog Devices Inc./Maxim Integrated ICL7665ACSA+

Overview

The ICL7665ACSA+ from Maxim Integrated is a dual over/undervoltage monitor IC for microprocessor supervision, featuring two independently programmable comparators with 2% threshold accuracy at +25°C, 3µA typical quiescent current, and operation from 2.0V to 16V supply voltage while monitoring input voltages ≥1.3V. It delivers open-drain N-channel OUT1/OUT2 and open-drain P-channel HYST1/HYST2 outputs for wire-OR power-OK signaling in battery-backed memory systems.

For engineers reviewing the ICL7665ACSA+ datasheet, ICL7665ACSA+ pinout, ICL7665ACSA+ application, or ICL7665ACSA+ equivalent, this device supports precise low-power voltage fault detection in single/multiple supply rails, brownout warning before 7805 regulator dropout, NiCd battery discharge protection, and high/low temperature alarm interfaces using V_BE multipliers.

Technical Context

The ICL7665ACSA+ integrates a precision 1.3V bandgap reference, two low-bias-current comparators (±0.01nA input leakage), and on-chip hysteresis control outputs. Its comparator trip points are set externally via resistor dividers on SET1/SET2 pins, with hysteresis added via HYST1/HYST2 current-source outputs tied to V+.

Propagation delay is 75µs typical; output saturation voltages are 0.10V (OUT1, V+ = 5V, I_OUT = 2mA) and –0.43V (HYST1, V+ = 5V, I_HYST = –0.5mA). Temperature coefficient of V_SET is 100 ppm/°C, and supply voltage sensitivity is 0.004%/V.

Key Specifications

Pinout & Package

ICL7665ACSA+ uses an 8-pin SO (Small Outline) package with 1.27mm pitch, RoHS-compliant and lead-free.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual voltage monitor applications.

Compared with TLV809E33DBZR and MAX6326UT29D3+, the ICL7665ACSA+ uniquely supports two independently adjustable voltage thresholds, on-chip hysteresis current sources, and ultra-low 3µA quiescent current - making it irreplaceable for battery-powered dual-rail supervision where precision, flexibility, and power efficiency are jointly required.

Availability

ICL7665ACSA+ is available at Aetrix Electronics and suitable for microprocessor voltage monitoring, low-battery detection, and power-fail warning applications requiring stable component supply across commercial temperature range and long-lifecycle support.

Supply support for ICL7665ACSA+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, computing, and communications systems.

The ICL7665ACSA+ belongs to Maxim's microprocessor supervisor product line, engineered specifically for low-power, dual-threshold voltage monitoring in battery-critical and multi-rail embedded systems.

FAQ

What is the primary function of the ICL7665ACSA+ in a microprocessor system?

The ICL7665ACSA+ serves as a dual over/undervoltage supervisor that warns the microprocessor of supply rail faults. It uses two independent comparators to monitor separate voltage thresholds - for example, detecting 5.55V overvoltage on OUT1 and 4.45V undervoltage on OUT2 - and asserts open-drain outputs to trigger reset, disable peripherals, or initiate backup power switchover. Its 2% V_SET1 accuracy and 3µA quiescent current make it ideal for reliable, low-power supervision in commercial-grade systems.

How does the ICL7665ACSA+ implement hysteresis, and why is it important?

The ICL7665ACSA+ implements hysteresis using dedicated HYST1 and HYST2 open-drain P-channel outputs that source current from V+. When a comparator trips, its corresponding HYST pin pulls up part of the external resistor divider on SET1 or SET2, raising the effective trip threshold for release and preventing oscillation near the threshold due to noise or slow-moving transients. This built-in hysteresis eliminates the need for external components and ensures clean, chatter-free output transitions - critical for stable reset signaling in noisy industrial environments.

Can the ICL7665ACSA+ monitor voltages higher than its V+ supply?

Yes - the ICL7665ACSA+ can monitor input voltages significantly higher than its V+ supply by using external resistor dividers on the SET1 and SET2 pins. The internal comparators reference a 1.3V bandgap, so any input voltage ≥1.3V can be scaled down to that level. For instance, a 24V rail can be monitored using a 18.7:1 divider (e.g., 1.87MΩ/100kΩ), ensuring the SET pin sees ≤1.3V at the trip point. Absolute maximum ratings allow SET inputs up to (V+ + 0.3V), but external attenuation protects the pin from overvoltage.

What are the key differences between the ICL7665ACSA+ and the base ICL7665CSA?

The ICL7665ACSA+ is the improved version of the ICL7665CSA, featuring 2% V_SET1 threshold accuracy at +25°C (vs. ±11.5% for the base part), guaranteed performance over temperature (100 ppm/°C tempco), and tighter V_SET2 tolerance. It also specifies minimum supply voltage as 2.0V (vs. 1.6V), reflecting enhanced low-V_CC stability. These improvements make the ICL7665ACSA+ suitable for precision applications like battery cutoff and regulated supply monitoring where threshold repeatability is critical.

How do the OUT and HYST outputs interact in a typical overvoltage detection circuit?

In a typical overvoltage circuit, OUT1 (N-channel sink) and HYST1 (P-channel source) operate complementarily: when V_SET1 exceeds 1.3V, OUT1 pulls low to signal overvoltage, while HYST1 pulls high (toward V+) to inject current into the SET1 divider, raising the release threshold and adding hysteresis. This interaction ensures the output remains asserted until the monitored voltage falls well below the trip point - for example, from 5.55V trip to 5.45V release - preventing false toggling caused by ripple or noise on the supply rail being monitored.