Renesas IDT72V90823JG8

Overview

IDT72V90823 from Integrated Device Technology, Inc. is a 3.3 V, 2,048 × 2,048 non-blocking time slot interchange (TSI) digital switch optimized for ST-BUS®/GCI and wide frame pulse (WFP) telecommunication interfaces. It supports serial data rates of 2.048 Mb/s, 4.096 Mb/s, or 8.192 Mb/s with per-channel variable or constant throughput delay, IEEE-1149.1 JTAG test support, and 5V-tolerant I/O - deployed in carrier-grade TDM switching systems requiring precise channel-level timing control.

For engineers reviewing the IDT72V90823 datasheet, IDT72V90823 pinout, IDT72V90823 application, or IDT72V90823 equivalent, key selection considerations include frame alignment mode (ST-BUS®/GCI vs. WFP), microprocessor interface configuration (multiplexed/non-multiplexed), per-channel delay mode (V/C bit), ODE-controlled output enable, and CCO bit synchronization with TX streams.

Technical Context

The IDT72V90823 implements a dual-mode serial interface: ST-BUS®/GCI auto-detection (via F0i/FE/HCLK) and WFP mode (enabled by WFPS = HIGH), each with distinct clocking and frame alignment requirements. Its internal architecture includes parallelized serial-to-parallel converters, 8 KB data memory, connection memory with per-channel control bits (PC, V/C, LPBK, OE, CCO), and a timing unit supporting 125 µs frame boundaries at 8 kHz.

Switching operation is governed by connection memory mapping: in Connection Mode, source addresses (SAB/CAB) route data from data memory to TX outputs; in Processor Mode, direct write-to-connection-memory values are output on TX streams one timeslot before transmission. Frame offset calibration (±4.5 CLK periods resolution) compensates for inter-stream skew in multi-chip backplane deployments.

Key Specifications

Pinout & Package

Package: 84-pin Plastic Leaded Chip Carrier (PLCC), 0.05″ pitch, 1.15″ × 1.15″ (order code J). Pin 1 marked by index notch; IC pin tied to GND for normal IEEE-1149.1 compliance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar time slot interchange applications.

Compared with IDT72V90822JG8 and PMC432-1024, the IDT72V90823 uniquely delivers full 2,048 × 2,048 non-blocking switching with ST-BUS®/GCI auto-detection, WFP mode, and IEEE-1149.1 JTAG - making it the only option for scalable, standards-compliant carrier-class TDM switching requiring deterministic multi-device synchronization.

Availability

IDT72V90823 is available at Aetrix Electronics and suitable for telecom line card design, multi-service access platforms, carrier-grade VoIP gateways, and distributed TDM switch fabrics requiring stable component supply across extended product lifecycles.

Supply support for IDT72V90823 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Integrated Device Technology, Inc. (IDT) was a fabless semiconductor company specializing in timing, memory interface, RF, and high-performance interconnect solutions before its acquisition by Renesas Electronics in 2019.

The IDT72V90823 belongs to IDT's TSI digital switch product line, designed specifically for carrier-class TDM infrastructure requiring precise time-slot routing, multi-standard frame alignment, and deterministic low-latency switching in voice and data transport networks.

FAQ

What is the maximum serial data rate supported by the IDT72V90823?

The IDT72V90823 supports three configurable serial data rates: 2.048 Mb/s (512 × 512 switching capacity), 4.096 Mb/s (1,024 × 1,024), and 8.192 Mb/s (2,048 × 2,048). At 8.192 Mb/s, the device requires a 16.384 MHz master clock (CLK) and operates with 128 time-slots per 125 µs frame. The IDT72V90823 automatically configures internal timing and memory addressing based on the DR0/DR1 bits in the IMS register.

How does the IDT72V90823 handle frame synchronization for ST-BUS® versus GCI interfaces?

The IDT72V90823 automatically detects and adapts to ST-BUS® or GCI frame formats using the F0i input. In ST-BUS®, it aligns to the falling edge of the 8 kHz frame pulse and samples data on the rising edge of CLK; in GCI, it uses the rising edge of F0i and samples on CLK's falling edge. This auto-detection occurs at power-up or after reset and requires no software configuration - a core capability of the IDT72V90823's timing unit.

Can the IDT72V90823 operate in both variable and constant throughput delay modes simultaneously?

Yes - the IDT72V90823 supports per-channel selection of variable or constant delay mode via the V/C bit in each location of its connection memory. One channel may use variable delay (e.g., for voice paths requiring minimal latency), while another uses constant delay (e.g., for CAS signaling requiring strict frame alignment). The IDT72V90823 hardware executes both modes concurrently without performance penalty or mode-switching overhead.

What is the function of the CCO pin on the IDT72V90823, and how is it synchronized?

The CCO pin outputs a serial control bit stream derived from the CCO bit in each connection memory location, running at the same data rate as the TX streams (4.096/8.192/16.384 Mb/s). It is synchronized to transmit the CCO bit from connection memory location N one time-slot before the corresponding TX data - e.g., in 2.048 Mb/s mode, CCO bit for TX0,CH0 appears during channel 31 of the prior frame. This allows real-time per-channel control signaling alongside payload data on the IDT72V90823.

Is the IDT72V90823 compatible with 5 V microprocessor buses?

Yes - all I/O pins of the IDT72V90823 (except TMS, TDI, and TRST) are 5V tolerant, enabling direct interfacing with 5 V Motorola or Intel microprocessors without level-shifting circuitry. The device itself operates from a 3.3 V supply (VCC), and its microprocessor interface supports both multiplexed and non-multiplexed bus protocols via the IM pin. This dual-voltage capability simplifies integration into mixed-supply telecom systems using the IDT72V90823.