Renesas IDT79RV4650-267DP
- Part No.:
- IDT79RV4650-267DP
- Manufacturer:
- Renesas
- Category:
- Microprocessors
- Package:
- 208-BFQFP Exposed Pad
- Datasheet:
-
IDT79RV4650-267DP.pdf
- Description:
- IC MPU 267MHZ 208QFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,971
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Product details
Overview
IDT79RV4650-267DP from Integrated Device Technology is a 3.3V, 267 MHz, 64-bit RISC microprocessor implementing the MIPS-III ISA with integrated integer multiply-accumulate (133.5 M MAC/sec), dual 8KB instruction/data caches, and on-chip single-precision floating-point co-processor. It targets embedded networking, multimedia, and real-time control systems requiring deterministic response and high integer throughput.
For engineers reviewing the IDT79RV4650-267DP datasheet, IDT79RV4650-267DP pinout, IDT79RV4650-267DP application, or IDT79RV4650-267DP equivalent, key selection criteria include its 267 MHz pipeline clock, 32-bit/64-bit configurable system interface, cache locking support for real-time code, and software compatibility with IDT RC3000/RC4000 families.
Technical Context
The IDT79RV4650-267DP uses a 5-stage integer pipeline with autonomous multiply/divide unit and dedicated MAD (multiply-add) instruction supporting atomic 16-/32-bit integer MAC operations at 267 MHz. Its CP0 system control co-processor implements base-bounds virtual-to-physical address translation without TLB, enabling multi-tasking in constrained memory systems.
It integrates separate 8KB two-way set-associative instruction and data caches, both parity-protected and lockable per set (Set A), with write-back/write-through policies controlled via CP0 CAlg register. The on-chip single-precision FPU executes IEEE 754 operations with 4-cycle ADD/SUB latency and 8-cycle MUL latency, but signals traps on double-precision instructions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Clock Frequency | 267 MHz pipeline clock (generated by internal PLL from 50–125 MHz reference) |
| CPU Architecture | MIPS-III 64-bit RISC with full upward binary compatibility to RC3000/RC4000 families |
| Integer Performance | 352 Dhrystone MIPS; 133.5 million integer multiply-accumulate operations/sec |
| Cache | 8KB instruction cache + 8KB data cache; both 2-way set-associative, lockable Set A |
| Floating-Point Unit | On-chip single-precision IEEE 754 FPU; no native double-precision (traps to software) |
| System Interface | Configurable 32-bit or 64-bit synchronous bus; 1000 MB/sec peak bandwidth |
| Power Supply | 3.3V core (RV prefix denotes 3.3V operation); active power management for idle units |
Pinout & Package
Package: 352-pin Ceramic Pin Grid Array (CPGA), 52.32 mm × 52.32 mm, 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SysAD[63:0] | System Address/Data Bus | 64-bit multiplexed address/data bus; operates as 32-bit when configured for lower-cost memory interface |
| SysCmd[8:0] | System Command Bus | 9-bit bidirectional bus indicating transaction type (read/write), data validity, and cache state |
| RdRdy*, WrRdy* | Read/Write Ready Handshake | Asynchronous flow control: external device asserts to indicate readiness for next read/write cycle |
| ExtRqst*, Release* | Bus Arbitration Control | Enables external masters (e.g., DMA controllers) to seize bus control from CPU |
| ValidOut*, ValidIn* | Bus Valid Strobe | Indicates valid command/data on SysAD/SysCmd; enables synchronous timing without fixed wait states |
Key Features
| Feature | Design Value |
|---|---|
| Cache Locking (Set A) | Enables deterministic real-time execution by preventing eviction of time-critical code from instruction or data cache |
| MAD Instruction | Atomic multiply-accumulate avoids separate load/store overhead-critical for DSP kernels in imaging and telecom |
| Base-Bounds Address Translation | Eliminates need for external TLB; supports multiple user tasks sharing virtual address space with physical isolation |
| Configurable System Bus Width | Reduces BOM cost: 32-bit mode interfaces directly to low-cost SDRAM/Flash without glue logic |
| CP0 Watch Registers (IWatch/DWatch) | Hardware-assisted debug: triggers exception on instruction/data access to specified virtual address range |
Applications
| Network Packet Processing | Real-Time Media Decoding |
|---|---|
|
Use Scenario: Line-rate forwarding of IPv4/IPv6 packets in Layer 3 switches with ACL and QoS processing. IC Role / Device Role / Timing Role: Primary control processor executing packet classification, header modification, and statistics collection in deterministic sub-microsecond cycles. Use Value: Cache locking ensures interrupt service routines and fast-path code remain resident; 133.5 M MAC/sec accelerates CRC and hash computation. |
Use Scenario: MPEG-2 video decode acceleration in set-top boxes with real-time audio/video synchronization. IC Role / Device Role / Timing Role: Host CPU managing stream buffering, display timing, and peripheral I/O while offloading motion compensation to custom coprocessor. Use Value: 267 MHz pipeline and 3200 MB/sec cache bandwidth sustain 40+ MB/sec video frame throughput; base-bounds MMU isolates decoder task memory. |
| Industrial Motion Control | Print Engine Controller |
|
Use Scenario: Closed-loop servo control for multi-axis CNC machines with nanosecond jitter tolerance. IC Role / Device Role / Timing Role: Real-time kernel executing PID loops, trajectory planning, and safety monitoring with guaranteed worst-case latency. Use Value: CP0 Count/Compare timer provides precise 10 ns resolution cycle counting; locked instruction cache eliminates cache-miss jitter in ISR execution. |
Use Scenario: High-speed raster image processing and halftone generation in laser printers operating at 60 ppm. IC Role / Device Role / Timing Role: Embedded controller managing page rendering, toner density calibration, and motor sequencing with tight interlock timing. Use Value: 8KB data cache buffers large bitmaps; MAD instruction accelerates dither matrix convolution; 3.3V operation reduces thermal load in compact print engine enclosure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 64-bit embedded microprocessor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IDT79RC4650-267DP | 5V supply; identical architecture, cache, and instruction set; same pinout and socket compatibility | Higher power and thermal output; requires level-shifting for 3.3V peripherals | Select when legacy 5V system infrastructure exists and thermal headroom permits |
| IDT79RC64475-266DP | Includes native double-precision FPU, TLB, and enhanced FP exception handling; higher die complexity | Required for scientific computing or Ada-certified systems needing precise FP exceptions | Select only if double-precision arithmetic or TLB-based virtual memory is mandatory; otherwise over-spec'd |
Compared with IDT79RC4650-267DP and IDT79RC64475-266DP, the IDT79RV4650-267DP delivers identical 267 MHz integer performance and cache architecture at 3.3V, reducing system power and simplifying voltage regulation-making it optimal for thermally constrained embedded designs where double-precision FP is emulated in software.
Availability
IDT79RV4650-267DP is available at Aetrix Electronics and suitable for network infrastructure, industrial motion control, and digital media processing applications requiring stable component supply across extended product lifecycles.
Supply support for IDT79RV4650-267DP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Integrated Device Technology (IDT) was a fabless semiconductor company specializing in high-performance timing, memory interface, and embedded processor solutions before its acquisition by Renesas in 2019.
The IDT79RV4650-267DP belongs to IDT's RISController family of 64-bit embedded microprocessors, designed specifically for cost-sensitive, real-time embedded systems requiring high integer throughput, deterministic cache behavior, and software compatibility across generations.
FAQ
What is the core voltage requirement for IDT79RV4650-267DP?
IDT79RV4650-267DP operates at a nominal 3.3V core supply, as indicated by the "RV" prefix in its part number (per IDT documentation). This distinguishes it from the 5V "R"-suffixed variants like IDT79RC4650-267DP. The 3.3V operation reduces power consumption and thermal dissipation, making IDT79RV4650-267DP suitable for compact, fanless embedded systems where thermal management is critical.
Does IDT79RV4650-267DP support double-precision floating-point arithmetic?
IDT79RV4650-267DP does not implement double-precision floating-point operations in hardware. When double-precision instructions are executed, the processor signals a trap to the CPU, allowing software emulation. This design choice reduces die size and power versus the IDT79RC64475, which includes native double-precision FPU. For applications requiring double-precision, IDT79RV4650-267DP relies on compiler-inserted library calls or runtime trap handlers.
Is IDT79RV4650-267DP pin-compatible with other IDT RISController processors?
IDT79RV4650-267DP is socket-compatible with IDT RC64475 and RC64575 processors, as confirmed in the official IDT documentation. It shares the same 352-pin CPGA package and pinout, enabling direct migration paths. However, electrical differences (e.g., 3.3V vs. 5V supply, timing margins) require validation of surrounding circuitry-including voltage regulators, termination, and clock distribution-before drop-in replacement.
How does cache locking function in IDT79RV4650-267DP?
IDT79RV4650-267DP allows locking of Set A in both instruction and data caches via dedicated bits in CP0 registers. Once locked, lines in Set A cannot be evicted by cache misses, ensuring time-critical code or data remains resident. This guarantees bounded interrupt latency and deterministic execution-essential for hard real-time applications such as motion control or packet forwarding where cache-induced jitter must be eliminated.
What system bus widths does IDT79RV4650-267DP support?
IDT79RV4650-267DP supports both 32-bit and 64-bit synchronous system interfaces, configurable at boot time. In 32-bit mode, the SysAD bus operates as a multiplexed address/data path with reduced pin count and lower-cost memory subsystems (e.g., 32-bit SDRAM). In 64-bit mode, it achieves up to 1000 MB/sec bandwidth-enabling high-throughput applications like video processing or multi-gigabit networking without external bus bridging.
IDT79RV4650-267DP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 208-BFQFP Exposed Pad
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- MIPS-I
- Number of Cores/Bus Width:
- 1 Core, 64-Bit
- Speed:
- 267MHz
- Co-Processors/DSP:
- System Control; CP0
- RAM Controllers:
- DRAM
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- -
- SATA:
- -
- USB:
- -
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- 0°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 208-PQFP (28x28)
- Additional Interfaces:
- -
IDT79RV4650-267DP FAQ
1.How can I place an order for IDT79RV4650-267DP through Aetrix?
Please submit a Request for Quotation (RFQ) for IDT79RV4650-267DP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for IDT79RV4650-267DP reliable?
The price and inventory of IDT79RV4650-267DP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for IDT79RV4650-267DP is usually 5 days.
3.What payment methods are accepted for IDT79RV4650-267DP?
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4.How is shipping managed for IDT79RV4650-267DP?
IDT79RV4650-267DP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your IDT79RV4650-267DP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for IDT79RV4650-267DP?
For technical support, including IDT79RV4650-267DP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your IDT79RV4650-267DP requirements.
6.How does Aetrix verify that IDT79RV4650-267DP is sourced from the original manufacturer or authorized distributors?
All IDT79RV4650-267DP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that IDT79RV4650-267DP meets industry standards.
7.What is the process for return or replacement of IDT79RV4650-267DP?
All IDT79RV4650-267DP units undergo pre-shipment inspection (PSI). If there is an issue with IDT79RV4650-267DP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The IDT79RV4650-267DP part is unused and in its original packaging.
Return procedure for IDT79RV4650-267DP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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