Renesas IDT79RV4700-133DP

Overview

IDT79RV4700-133DP from Integrated Device Technology is a 64-bit RISC microprocessor with 64-bit integer and floating-point execution units, 16KB instruction and 16KB data caches, and full MIPS-III ISA compliance. It operates at 133 MHz on a 3.3V supply, targets embedded networking and printing systems, and delivers 173 Dhrystone MIPS and ~66 peak MFLOP/s.

For engineers reviewing the IDT79RV4700-133DP datasheet, IDT79RV4700-133DP pinout, IDT79RV4700-133DP application, or IDT79RV4700-133DP equivalent, key selection criteria include its 3.3V operation, 179-pin PGA package, 64GB physical address space, software/pin compatibility with R4XXX family, and support for standby mode power management.

Technical Context

The IDT79RV4700-133DP implements a simple 5-stage pipeline with two-way set associative caches and a flexible MMU featuring a 96-entry fully associative JTLB plus separate 2-entry ITLB and 4-entry DTLB. Its integer unit supports single-cycle ALU operations and autonomous multiply/divide via HI/LO registers.

The on-chip floating-point co-processor complies with IEEE Std 754 for single/double precision, includes 32×64-bit FP registers, and executes ADD/SUB in 4 cycles, MUL in 5 cycles (double), and DIV in 74 cycles (double). System interface uses a non-overlapping 64-bit SysAD bus with 8-bit parity and 9-bit SysCmd bus supporting block transfers and external request arbitration.

Key Specifications

Pinout & Package

Package: 179-pin Pin Grid Array (PGA), cavity-down construction optimized for thermal dissipation in embedded applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 64-bit RISC microprocessor applications.

Compared with IDT79R4700-133DP, the IDT79RV4700-133DP reduces system-level power delivery complexity and thermal design burden while maintaining identical performance and software footprint; IDT79RC4700-133DP offers no measurable electrical or architectural deviation but may reflect internal IDT part-numbering conventions rather than a distinct silicon variant.

Availability

IDT79RV4700-133DP is available at Aetrix Electronics and suitable for LAN switches, routers, and color printer controllers requiring stable component supply across extended production lifecycles.

Supply support for IDT79RV4700-133DP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Integrated Device Technology (IDT) was a fabless semiconductor company specializing in high-performance timing, memory interface, and embedded processor solutions before its acquisition by Renesas Electronics in 2019.

The IDT79RV4700-133DP belongs to IDT's RC4700 family of 64-bit MIPS-compatible microprocessors designed for cost-sensitive, thermally constrained embedded networking and imaging applications.

FAQ

What is the operating voltage requirement for the IDT79RV4700-133DP?

The IDT79RV4700-133DP requires a nominal 3.3V ±0.3V supply for core and I/O operation. This distinguishes it from the 5V IDT79R4700-133DP variant and enables lower power consumption and simplified power delivery in space-constrained embedded designs. The "RV" prefix explicitly denotes reduced-voltage operation per IDT's naming convention.

Is the IDT79RV4700-133DP pin-compatible with other members of the R4XXX processor family?

Yes, the IDT79RV4700-133DP is fully pin-compatible with the R4XXX family including R4640, R4650, and R5000 processors. This allows direct PCB reuse and migration paths for existing designs targeting MIPS-III architecture, provided the 179-pin PGA footprint and 3.3V supply constraints are met. Compatibility extends to both signal assignment and timing interface behavior.

Does the IDT79RV4700-133DP support big-endian or little-endian data ordering?

The IDT79RV4700-133DP supports both endianness modes, configured at boot time via bit 8 of the 256-bit serial mode stream. When bit 8 = 0, the processor operates in little-endian mode; when bit 8 = 1, it operates in big-endian mode. This flexibility enables deployment in heterogeneous systems where peripheral IP or legacy software mandates specific byte ordering.

What cache architecture does the IDT79RV4700-133DP implement?

The IDT79RV4700-133DP implements separate 16KB two-way set associative instruction and data caches, each with 32-byte line sizes and physical tagging. The instruction cache uses word parity protection; the data cache uses byte parity. Both caches operate at full processor speed with single-cycle access latency, enabling sustained 800 MB/s instruction fetch and 1.6 GB/s data bandwidth at 133 MHz.

How does the IDT79RV4700-133DP manage power during idle periods?

The IDT79RV4700-133DP enters low-power standby mode upon execution of the WAIT instruction when the SysAD bus is idle. In this state, internal core clocks halt while retaining PLL operation, timer functionality, and interrupt responsiveness. Exit occurs on any interrupt, including the internal timer interrupt, enabling precise duty-cycled operation for battery-sensitive or thermally limited embedded applications.