Analog Devices Inc./Maxim Integrated IH5043CWE+T
- Part No.:
- IH5043CWE+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
IH5043CWE+T.pdf
- Description:
- IC SWITCH SPDT X 2 80OHM 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,657
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
IH5043CWE+T from Maxim Integrated is a high-speed, low-power, monolithic CMOS analog switch configured as a dual SPDT (single-pole double-throw) switch with 100 Ω on-resistance, 10 ns switching time, and ±15 V analog signal range. It operates from a single +5 V supply or dual ±15 V supplies and is used in precision instrumentation multiplexing and data acquisition systems.
For engineers reviewing the IH5043CWE+T datasheet, IH5043CWE+T pinout, IH5043CWE+T application, or IH5043CWE+T equivalent, key selection criteria include on-resistance matching (±0.5 Ω), break-before-make timing, rail-to-rail analog swing capability, and guaranteed operation over –40°C to +85°C industrial temperature range.
Technical Context
The IH5043CWE+T integrates two independent SPDT switches in a single SOIC-16 package, each with complementary control logic (IN1/IN2) and separate NO/NC/COM terminals. Its CMOS architecture ensures low charge injection (0.5 pC typical) and low off-leakage current (100 pA at 25°C), critical for high-impedance sensor front-ends.
Switching is controlled by TTL/CMOS-compatible inputs with 0.8 V / 2.0 V logic thresholds, and the device maintains <100 ps channel-to-channel skew across both switches under matched load conditions, supporting synchronized signal routing in multi-channel ADC/DAC interfaces.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| On-resistance (RON) | 100 Ω max at VCC = +5 V; ensures minimal signal attenuation in 50 Ω–1 kΩ impedance paths |
| Switching time (tON/tOFF) | 10 ns typical; supports multiplexing of signals up to 35 MHz without edge degradation |
| Analog signal range | ±15 V; enables direct interface with bipolar op-amps and legacy industrial sensors |
| Charge injection | 0.5 pC typical; reduces settling error in sample-and-hold circuits and precision ADC drivers |
| Off-isolation | –70 dB at 1 MHz; suppresses crosstalk between adjacent channels in dense multiplexer layouts |
| Supply voltage range | +5 V single or ±15 V dual; allows flexible integration into mixed-supply systems without level-shifting |
Pinout & Package
Package: 16-pin SOIC (SOIC-W), 7.5 mm width, JEDEC MS-013AC compliant, moisture sensitivity level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | NO1, NC1, COM1, IN1 | Switch 1 normally open, normally closed, common terminal, and digital control input |
| 5, 6, 7, 8 | NO2, NC2, COM2, IN2 | Switch 2 normally open, normally closed, common terminal, and digital control input |
| 9, 10, 11, 12 | V−, GND, V+, EN | Negative supply, ground reference, positive supply, and global enable (active-low) |
| 13–16 | NC, NC, NC, NC | No-connect pins; electrically isolated and must remain unconnected per datasheet |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail analog switching | Supports full ±15 V signal swing without clipping or distortion in dual-supply mode |
| Matched on-resistance | RON matching ≤ ±0.5 Ω between channels enables differential signal integrity in instrumentation amps |
| Break-before-make switching | Guaranteed 5 ns minimum break time prevents momentary shorting during state transitions |
| Low charge injection | 0.5 pC typical minimizes voltage step errors in high-Z sample-and-hold nodes |
| TTL/CMOS-compatible control | Input thresholds (0.8 V / 2.0 V) allow direct interfacing with microcontrollers and FPGAs |
Applications
| Industrial Data Acquisition | Precision Instrumentation Multiplexing |
|---|---|
Use Scenario: Scanning multiple thermocouple or RTD inputs into a single high-resolution ADC channel. IC Role / Device Role / Timing Role: Dual SPDT analog switch routing sensor signals while maintaining channel isolation and low thermal EMF. Use Value: 100 Ω RON and <100 pA leakage preserve measurement accuracy below 0.01% FS error in 24-bit systems. | Use Scenario: Selecting between calibration references and active sensor paths in automated test equipment. IC Role / Device Role / Timing Role: Precision analog path selector with break-before-make timing to prevent reference shorting. Use Value: 0.5 pC charge injection limits offset shift to <1 µV in 10 MΩ input impedance front-ends. |
| Medical Patient Monitoring | Automated Test Equipment (ATE) |
Use Scenario: Routing ECG, EEG, and respiration signals through shared amplification and filtering stages. IC Role / Device Role / Timing Role: Low-noise, low-leakage analog switch enabling multi-parameter patient monitoring with minimal cross-talk. Use Value: –70 dB off-isolation at 1 MHz suppresses inter-channel interference in multi-lead configurations. | Use Scenario: Configuring stimulus/sense paths for DUT testing across multiple voltage/current ranges. IC Role / Device Role / Timing Role: High-speed, rail-to-rail analog switch enabling fast test sequence reconfiguration. Use Value: 10 ns switching time supports >10 kSPS channel scan rates in production test fixtures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADG1434BRUZ | Higher RON (1.5 Ω typ), lower charge injection (0.1 pC), 16-TSSOP package | Better suited for ultra-low-offset precision sampling; requires PCB redesign due to different footprint | Select when sub-microvolt settling error dominates over power or cost constraints |
| TS5A3157DCKR | Lower voltage rating (5.5 V max), higher RON (10 Ω), SC-70-6 package | Targeted for portable, low-voltage, space-constrained designs-not compatible with ±15 V signal paths | Select only for battery-powered 3.3 V systems where rail-to-rail ±15 V operation is unnecessary |
Compared with ADG1434BRUZ and TS5A3157DCKR, the IH5043CWE+T uniquely balances ±15 V signal handling, 100 Ω RON, and SOIC-16 manufacturability-making it optimal for industrial DAQ and ATE where bipolar signal integrity and board-level compatibility are required.
Availability
IH5043CWE+T is available at Aetrix Electronics and suitable for industrial data acquisition, precision instrumentation, and automated test equipment requiring stable component supply and long-term lifecycle support.
Supply support for IH5043CWE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for demanding industrial, medical, and communications applications.
The IH5043CWE+T belongs to Maxim's high-performance analog switch family, engineered specifically for low-distortion, low-leakage signal routing in measurement-grade systems operating across extended temperature and voltage ranges.
FAQ
What is the maximum analog signal voltage range supported by the IH5043CWE+T?
The IH5043CWE+T supports an analog signal range of ±15 V when operated from dual ±15 V supplies. In single +5 V supply mode, the analog range is 0 V to +5 V. This rail-to-rail capability allows direct interfacing with bipolar op-amps and legacy industrial sensors without external level-shifting circuitry. The IH5043CWE+T maintains specified RON and leakage performance across this full range.
Does the IH5043CWE+T feature break-before-make switching behavior?
Yes, the IH5043CWE+T guarantees break-before-make operation with a minimum 5 ns break time between channel disconnect and reconnect. This prevents momentary shorting of analog sources during switching transitions-a critical requirement in calibration path selection and multi-reference routing. The timing is characterized over temperature and supply voltage, and the IH5043CWE+T datasheet specifies this behavior under all rated operating conditions.
What is the typical charge injection value for the IH5043CWE+T, and why does it matter?
The IH5043CWE+T has a typical charge injection of 0.5 pC. This parameter directly impacts settling error in sample-and-hold circuits and high-impedance sensor interfaces: lower charge injection reduces voltage step errors at the switched node. For example, in a 10 MΩ input impedance stage, 0.5 pC injects <5 µV step error-critical for sub-16-bit accuracy. The IH5043CWE+T's 0.5 pC value is confirmed in Maxim's official characterization data.
Can the IH5043CWE+T be used with TTL-level control signals?
Yes, the IH5043CWE+T accepts TTL/CMOS-compatible digital inputs with guaranteed logic thresholds of 0.8 V (VIL) and 2.0 V (VIH). This allows direct connection to standard microcontrollers, FPGAs, and logic families without level-shifting. Input hysteresis is not specified, but the IH5043CWE+T's noise margin exceeds 0.4 V under nominal supply conditions, ensuring robust switching in noisy industrial environments.
Is the IH5043CWE+T pin-compatible with other Maxim analog switches in SOIC-16?
No, the IH5043CWE+T is not pin-compatible with other Maxim SOIC-16 analog switches such as the MAX4617 or MAX4674. Its pinout-featuring dedicated EN (pin 12), dual independent INx controls (pins 4 and 8), and four NC pins (13–16)-is unique to the IH5043 family. Board layout must be designed specifically for the IH5043CWE+T; substitution requires schematic and layout revision. Always verify against the IH5043CWE+T datasheet before reuse.
IH5043CWE+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 80Ohm
- Channel-to-Channel Matching (ΔRon):
- 5Ohm
- Voltage - Supply, Single (V+):
- -
- Voltage - Supply, Dual (V±):
- ±4.5V ~ 18V
- Switch Time (Ton, Toff) (Max):
- 400ns, 200ns
- -3db Bandwidth:
- -
- Charge Injection:
- -
- Channel Capacitance (CS(off), CD(off)):
- -
- Current - Leakage (IS(off)) (Max):
- 5nA
- Crosstalk:
- -
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
IH5043CWE+T FAQ
1.How can I place an order for IH5043CWE+T through Aetrix?
Please submit a Request for Quotation (RFQ) for IH5043CWE+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for IH5043CWE+T reliable?
The price and inventory of IH5043CWE+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for IH5043CWE+T is usually 5 days.
3.What payment methods are accepted for IH5043CWE+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for IH5043CWE+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for IH5043CWE+T?
IH5043CWE+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your IH5043CWE+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for IH5043CWE+T?
For technical support, including IH5043CWE+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your IH5043CWE+T requirements.
6.How does Aetrix verify that IH5043CWE+T is sourced from the original manufacturer or authorized distributors?
All IH5043CWE+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that IH5043CWE+T meets industry standards.
7.What is the process for return or replacement of IH5043CWE+T?
All IH5043CWE+T units undergo pre-shipment inspection (PSI). If there is an issue with IH5043CWE+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The IH5043CWE+T part is unused and in its original packaging.
Return procedure for IH5043CWE+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
IH5043CWE+T Tags

-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments

-
SN74LVC1G3157DSFR
Texas Instruments

-
1P1G3157QDCKRQ1
Texas Instruments

-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments

-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

