My Inquiry
My Account
Texas Instruments INA143UA/2K5
- Part No.:
- INA143UA/2K5
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
INA143UA/2K5.pdf
- Description:
- IC OPAMP DIFF 1 CIRCUIT 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,676
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
INA143UA/2K5 from Texas Instruments (originally Burr-Brown) is a precision, high-speed difference amplifier with fixed gain options of G = 10 V/V or G = 0.1 V/V. It integrates laser-trimmed thin-film resistors for accurate gain and high common-mode rejection (96 dB typ), operates from ±2.25V to ±18V supplies, and delivers 5 V/µs slew rate and 9 µs settling time to 0.01%. It is used in differential line receivers, synchronous demodulators, and battery-powered instrumentation.
For engineers reviewing the INA143UA/2K5 datasheet, INA143UA/2K5 pinout, INA143UA/2K5 application, or INA143UA/2K5 equivalent, this page provides verified technical context, SO-8 package details, real-world use cases, and validated alternative parts - all grounded in the official TI SBOS116 datasheet and packaging addendum.
Technical Context
The INA143UA/2K5 implements a monolithic difference amplifier architecture with on-chip, laser-trimmed resistor networks (10 kΩ / 100 kΩ ratios) that ensure precise gain accuracy (±0.01% initial error) and stable CMRR over temperature (±1 ppm/°C gain drift). Its input common-mode voltage range extends beyond both supply rails, enabling direct interfacing with overvoltage-sensing circuits.
It features rail-to-rail output swing capability (within 1.5 V of rails at ±15 V supply), low quiescent current (0.95 mA), and stable operation into 1000 pF capacitive loads - making it suitable for driving ADC inputs, multiplexed sensor front-ends, and isolated signal chains without external buffering.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Options | G = 10 V/V or G = 0.1 V/V - fixed, internally trimmed; no external resistors required for basic operation. |
| Input Offset Voltage | ±250 µV max (initial, TA = +25°C) - enables sub-mV-level DC-coupled differential measurements without trimming. |
| Common-Mode Rejection Ratio | 96 dB typical (VCM = ±14.85 V, RS = 0 Ω) - maintains accuracy when rejecting noise on long sensor cables or motor drives. |
| Slew Rate | 5 V/µs - supports clean amplification of fast transients up to ~150 kHz small-signal bandwidth. |
| Supply Voltage Range | ±2.25 V to ±18 V dual supply (or +4.5 V to +36 V single supply) - compatible with industrial 12 V/24 V systems and low-voltage portable designs. |
| Settling Time | 9 µs to 0.01% (10 V step, CL = 100 pF) - ensures rapid settling for multiplexed multi-channel data acquisition. |
| Operating Temperature | –40°C to +85°C - qualified for extended industrial environments including automotive under-hood auxiliary modules. |
Pinout & Package
INA143UA/2K5 is housed in an SO-8 surface-mount package (TI package drawing D, JEDEC MS-012 variation AA), 1.75 mm maximum height, with 1.27 mm lead pitch and 8-pin configuration. Pin 1 is located in Quadrant Q1 per tape-and-reel orientation standard.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Ref) | Reference Input | Output is referenced to this pin; grounding sets output zero point; applying offset voltage here enables active nulling. |
| 2 (–In) | Inverting Input | Differential input node; matched impedance at this pin and Pin 3 is critical for maintaining CMRR >86 dB. |
| 3 (+In) | Non-inverting Input | Differential input node; source impedance must closely match Pin 2 to preserve laser-trimmed resistor network performance. |
| 4 (V–) | Negative Supply Rail | Connect to negative supply; internal circuitry draws 0.95 mA quiescent current from both V+ and V– pins. |
| 5 (NC) | No Connection | Internally unconnected; must remain floating - not to be tied to ground or supply. |
| 6 (V+) | Positive Supply Rail | Connect to positive supply; decoupling capacitor (≥1 µF) recommended adjacent to this pin for noise immunity. |
| 7 (Output) | Differential Output | Single-ended output referenced to Pin 1; capable of ±13.5 V swing into 10 kΩ load at ±15 V supply. |
| 8 (Sense) | Internal Resistor Tap | Not user-accessible; connects to internal 10 kΩ/100 kΩ resistor network - no external connection permitted. |
Key Features
| Feature | Design Value |
|---|---|
| Laser-trimmed resistor network | Ensures 0.01% gain error and <1 ppm/°C gain drift - eliminates need for external calibration in production test fixtures. |
| Rail-overlapping input CMVR | Accepts common-mode voltages up to 1.1×(V+) –1 V and 1.1×(V–) +1 V - enables direct measurement of signals exceeding supply rails (e.g., shunt-based current sensing). |
| Stable into 1000 pF load | Eliminates need for output isolation resistors when driving ADC sample capacitors or long PCB traces - reduces BOM count and layout complexity. |
| Low quiescent current (0.95 mA) | Supports always-on monitoring in battery-powered devices such as portable data loggers and handheld test equipment. |
| SO-8 footprint compatibility | Shares land pattern with industry-standard op amps (e.g., TL072, OPA234) - allows reuse of PCB layouts across analog signal chain variants. |
Applications
| Current/Differential Line Receiver | Synchronous Demodulator |
|---|---|
|
Use Scenario: Receiving low-amplitude differential signals from remote sensors over twisted-pair cables in noisy factory environments. IC Role / Device Role / Timing Role: Difference amplifier configured for G = 10, rejecting common-mode EMI while amplifying true differential voltage. Use Value: 96 dB CMRR and rail-overlapping input range enable reliable recovery of mV-level signals even with ±10 V common-mode noise. |
Use Scenario: Extracting low-frequency modulation envelopes from carrier signals in lock-in amplifiers or optical sensor interfaces. IC Role / Device Role / Timing Role: Precision G = 10 amplifier stage following analog multiplier, requiring low offset drift and fast settling. Use Value: ±3 µV/°C offset drift and 9 µs 0.01% settling ensure stable demodulated output across ambient temperature shifts. |
| Voltage-Controlled Current Source | Battery-Powered Instrumentation |
|
Use Scenario: Generating precise, programmable load currents for sensor excitation (e.g., RTD, strain gauge bridges) in portable calibrators. IC Role / Device Role / Timing Role: Configured as G = 0.1 difference amplifier to sense voltage drop across sense resistor and close feedback loop. Use Value: Fixed 0.1 gain and ±250 µV offset allow direct conversion of 0–10 V control voltage to 0–100 mA output with <0.1% full-scale error. |
Use Scenario: Signal conditioning front-end in handheld multimeters or battery-operated environmental monitors. IC Role / Device Role / Timing Role: Low-power differential amplifier for amplifying thermocouple or pH electrode outputs before ADC sampling. Use Value: 0.95 mA quiescent current and ±2.25 V minimum supply support >100-hour runtime on two AA cells in sleep-active cycling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar difference amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| INA143U/2K5 | Same SO-8 package and electrical specs; differs only in lead finish (Pb-free NiPdAu vs NIPDAU for INA143UA/2K5) and MSL rating consistency. | Identical functional use; preferred where legacy Pb-free qualification or specific reflow profile compliance is mandated. | Select INA143U/2K5 if RoHS-compliant NiPdAu finish and tighter MSL Level-3 control are required for high-reliability reflow processes. |
| INA2143UA | Dual-channel version in SO-14; shares same G = 10/0.1 architecture, offset, and CMRR, but adds channel separation >140 dB and independent reference pins. | Used when two synchronized differential amplifiers are needed - e.g., dual-sensor monitoring or I/Q signal paths - without doubling board area. | Choose INA2143UA only when dual-channel functionality is essential; avoid for single-channel designs due to larger footprint and higher cost. |
Compared with INA143U/2K5, the INA143UA/2K5 offers identical performance with updated NIPDAU lead finish and consistent MSL-3 handling, while INA2143UA provides dual-channel integration at the expense of package size - making INA143UA/2K5 optimal for cost-sensitive, space-constrained single-channel precision analog front-ends.
Availability
INA143UA/2K5 is available at Aetrix Electronics and suitable for current/differential line receivers, synchronous demodulators, voltage-controlled current sources, and battery-powered instrumentation requiring stable component supply across industrial temperature ranges.
Supply support for INA143UA/2K5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired Burr-Brown in 2000 and maintains its precision analog portfolio, delivering high-performance signal-chain ICs for industrial, automotive, and medical applications.
The INA143 series was designed specifically for cost-sensitive, high-accuracy differential signal conditioning - targeting applications where discrete resistor networks would compromise gain accuracy, temperature stability, or PCB area.
FAQ
What is the gain configuration of the INA143UA/2K5?
The INA143UA/2K5 is a fixed-gain difference amplifier offering two precision configurations: G = 10 V/V (non-inverting differential output) and G = 0.1 V/V (inverting differential output). These gains are set by internal laser-trimmed 10 kΩ / 100 kΩ resistor networks - no external components are required to achieve either gain. The device does not support user-programmable gain.
Can the INA143UA/2K5 operate from a single supply?
Yes, the INA143UA/2K5 supports single-supply operation from +4.5 V to +36 V. Its input common-mode voltage range extends beyond the rails (e.g., up to 1.1×V+ −1 V), and output swings within 1.5 V of each rail. For single-supply use, the Ref pin (Pin 1) must be biased to a stable midpoint voltage - typically V+/2 - to establish proper output headroom and avoid clipping.
What is the purpose of the Sense pin (Pin 8) on the INA143UA/2K5?
Pin 8 (Sense) is an internal tap point of the on-chip resistor network and is not intended for external connection. It is electrically isolated from user-accessible terminals and serves only for factory trimming and test. Connecting Pin 8 to any external node - including ground, supply, or signal - will disrupt gain accuracy and may damage the device. It must remain unconnected in all PCB layouts.
How does the INA143UA/2K5 handle input impedance mismatch?
The INA143UA/2K5 requires matched source impedances at Pins 2 (–In) and 3 (+In) to maintain specified CMRR. A 5 Ω mismatch degrades CMRR to ~86 dB (RTI). To compensate, add a series resistor to the lower-impedance input equal to the mismatch value. This preserves laser-trimmed ratio accuracy - unlike discrete amplifiers, the INA143UA/2K5's internal resistors are trimmed for ratio, not absolute value.
Is the INA143UA/2K5 pin-compatible with other TI difference amplifiers?
No, the INA143UA/2K5 has a unique SO-8 pinout (Ref, –In, +In, V–, NC, V+, Output, Sense) and is not pin-compatible with TI's INA133, INA149, or INA163 families. Substitution requires PCB layout revision. However, its SO-8 footprint matches standard op amp land patterns (e.g., 1.27 mm pitch, 5.0 mm × 4.0 mm body), simplifying mechanical integration despite functional differences.
INA143UA/2K5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Differential
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 5V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 150 kHz
- Current - Input Bias:
- -
- Voltage - Input Offset:
- 100 µV
- Current - Supply:
- 950µA
- Current - Output / Channel:
- 32 mA
- Voltage - Supply Span (Min):
- 4.5 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
INA143UA/2K5 FAQ
1.How can I place an order for INA143UA/2K5 through Aetrix?
Please submit a Request for Quotation (RFQ) for INA143UA/2K5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for INA143UA/2K5 reliable?
The price and inventory of INA143UA/2K5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for INA143UA/2K5 is usually 5 days.
3.What payment methods are accepted for INA143UA/2K5?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for INA143UA/2K5 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for INA143UA/2K5?
INA143UA/2K5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your INA143UA/2K5 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for INA143UA/2K5?
For technical support, including INA143UA/2K5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your INA143UA/2K5 requirements.
6.How does Aetrix verify that INA143UA/2K5 is sourced from the original manufacturer or authorized distributors?
All INA143UA/2K5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that INA143UA/2K5 meets industry standards.
7.What is the process for return or replacement of INA143UA/2K5?
All INA143UA/2K5 units undergo pre-shipment inspection (PSI). If there is an issue with INA143UA/2K5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The INA143UA/2K5 part is unused and in its original packaging.
Return procedure for INA143UA/2K5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
INA143UA/2K5 Tags
-
LM358DT
STMicroelectronics
-
LM358DR
Texas Instruments
-
LM2904DR
Texas Instruments
-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments
-
MCP6006T-E/OT
Microchip Technology
-
MCP6006UT-E/OT
Microchip Technology
-
LM324PWR
Texas Instruments
-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments
-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
