Renesas IPM6220ACAZ
- Part No.:
- IPM6220ACAZ
- Manufacturer:
- Renesas
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 24-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
IPM6220ACAZ.pdf
- Description:
- IC REG 5OUT BUCK/LNR SYNC 24SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,407
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
IPM6220ACAZ from Intersil is an advanced triple PWM and dual linear power controller in a 24-lead SSOP package, designed for notebook PC power systems. It delivers five regulated outputs: +5V ALWAYS (50 mA), +3.3V ALWAYS (50 mA), +5V Main (5 A), +3.3V Main (5 A), and +12V boost (120 mA), with synchronous buck converters, hysteretic light-load mode, and integrated current sensing via MOSFET rDS(ON). It operates from 5.6 V to 24 V battery input and supports ACPI-compliant shutdown sequencing.
For engineers reviewing the IPM6220ACAZ datasheet, IPM6220ACAZ pinout, IPM6220ACAZ application, or IPM6220ACAZ equivalent, key selection considerations include its fixed 300 kHz switching frequency on main outputs, out-of-phase operation for reduced input ripple, Pb-free SSOP packaging, UVLO at 4.7 V, and integrated PGOOD monitoring across four regulated rails.
Technical Context
The IPM6220ACAZ integrates two synchronous buck controllers (5V/3.3V Main) with current-mode control, input voltage feed-forward ramp modulation, and adaptive dead-time gate drivers - enabling fast transient response and high efficiency across wide line/load ranges. Its third channel is a 100 kHz boost controller with 33% max duty cycle and leading-edge PWM for stable 12V generation from the 5V Main rail.
It features dual low-current linear regulators (+5V/+3.3V ALWAYS) with internal bypass switching: when +5V Main is active, it supersedes the 5V ALWAYS LDO via a 1.3 Ω internal MOSFET, reducing dissipation. Shutdown is managed through three independent pins (SDWN1, SDWN2, SDWNALL) for precise ACPI-compatible power sequencing and stand-by mode with only 300 µA quiescent current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 5.6 V to 24.0 V - Directly accepts wide-range notebook battery inputs without pre-regulation. |
| Main PWM Frequency | 300 kHz ±15% - Fixed-frequency current-mode control ensures predictable EMI profile and stable loop compensation. |
| Boost PWM Frequency | 100 kHz - Derived from main clock via 3:1 divider; enables stable discontinuous-mode 12V boost operation. |
| Output Accuracy (5V/3.3V Main) | ±2% line/load regulation - Ensures reliable core I/O rail compliance under dynamic CPU load changes. |
| Current Sensing Method | rDS(ON)-based, no external sense resistor required - Eliminates sense resistor losses and PCB area; optional resistor supported for higher precision. |
| Thermal Protection | 150°C shutdown with 25°C hysteresis - Prevents latch-up during sustained overload or poor heatsinking in compact notebooks. |
| PGOOD Monitoring | Monitors 5V Main, 3.3V Main, and 12V rails; asserts open-drain low if any falls >10% below nominal - Enables system-level power sequencing and fault isolation. |
Pinout & Package
IPM6220ACAZ is housed in a 24-lead SSOP (Small Outline Package), Pb-free, with 0.635 mm lead pitch and M24.15 package drawing. Thermal resistance θJA = 110°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBATT (1) | Battery input supply | Primary power source for all internal circuitry and gate drivers; enables operation above 4.7 V UVLO threshold. |
| 3.3V ALWAYS (2) | Linear regulator output | Low-noise 3.3 V supply for keyboard controller or always-on logic; sourced from 5V ALWAYS LDO. |
| BOOT2 (3) | Bootstrap supply for PWM2 high-side driver | Connects to bootstrap capacitor/diode network tied to 5V ALWAYS; enables floating gate drive for upper MOSFET in 3.3V Main buck. |
| UGATE2 (4) | PWM2 upper MOSFET gate driver | Drives gate of high-side switch in 3.3V Main converter; pull-up/pull-down resistances 5–12 Ω ensure fast switching. |
| PHASE2 (5) | PWM2 phase node | Junction of upper MOSFET source, lower MOSFET drain, and output inductor; used for current sensing and mode detection. |
| 5V ALWAYS (6) | Linear regulator output / bypassed rail | Primary always-on supply; automatically switches to +5V Main output when enabled, reducing LDO power loss. |
| LGATE2 (7) | PWM2 lower MOSFET gate driver | Drives gate of synchronous rectifier in 3.3V Main buck; includes adaptive dead-time control to prevent shoot-through. |
| PGND2 (8) | PWM2 lower MOSFET source return | Local ground reference for PWM2 gate driver; must be connected directly to lower MOSFET source to minimize noise coupling. |
| ISEN2 (9) | PWM2 current sense input | Measures voltage drop across lower MOSFET rDS(ON) for current feedback and overcurrent protection. |
| VSEN2 (10) | PWM2 output voltage feedback | Monitors 3.3V Main output for regulation, PGOOD, OVP, and UVP; internal 66 kΩ pull-down aids stability. |
| SDWN2 (11) | PWM2 enable/shutdown control | ACPI-compatible active-high signal; controls soft-start and independent turn-off of 3.3V Main output. |
| PGOOD (12) | Power-good status indicator | Open-drain output pulled low if 5V Main, 3.3V Main, or 12V outputs deviate >10% from nominal or enter fault state. |
| SDWNALL (13) | Global shutdown control | Master enable/disable for entire IC; pulls all outputs off when low; 2.4 V logic threshold with 40 mV hysteresis. |
| GND (14) | Signal ground reference | Common reference for all analog and digital functions; must be low-impedance connection to system ground plane. |
| VSEN3 (15) | 12V boost feedback input | Regulates 12V output to 2.472 V reference via external resistor divider; can disable boost by tying to 5V ALWAYS. |
| GATE3 (16) | Boost MOSFET gate driver | Drives external N-channel MOSFET in boost stage; 6–12 Ω pull-up/down resistances support fast edge rates. |
| SDWN1 (17) | PWM1 enable/shutdown control | ACPI-compatible active-high signal; controls soft-start and independent turn-off of 5V Main output. |
| VSEN1 (18) | PWM1 output voltage feedback | Monitors 5V Main output for regulation, PGOOD, OVP, and UVP; internally switched to 5V ALWAYS when enabled. |
| PGND1 (19) | PWM1 lower MOSFET source return | Local ground reference for PWM1 gate driver; must connect directly to lower MOSFET source for accurate current sensing. |
| LGATE1 (20) | PWM1 lower MOSFET gate driver | Drives synchronous rectifier in 5V Main buck; adaptive dead-time prevents shoot-through under varying MOSFET parameters. |
| ISEN1 (21) | PWM1 current sense input | Measures voltage drop across lower MOSFET rDS(ON); supports optional external sense resistor for tighter current limit accuracy. |
| PHASE1 (22) | PWM1 phase node | Junction of upper/lower MOSFETs and inductor; critical for hysteretic mode detection and out-of-phase timing control. |
| UGATE1 (23) | PWM1 upper MOSFET gate driver | Drives high-side switch in 5V Main buck; optimized for low RDS(ON) MOSFETs with fast rise/fall times. |
| BOOT1 (24) | Bootstrap supply for PWM1 high-side driver | Connects to bootstrap capacitor/diode network tied to 5V ALWAYS; enables floating gate drive for upper MOSFET in 5V Main buck. |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous buck converters on 5V/3.3V Main | Eliminates external Schottky diodes, improving full-load efficiency by ~5–8% versus asynchronous designs. |
| Hysteretic light-load operation | Reduces quiescent current to 300 µA in stand-by mode while maintaining regulation via diode-emulation behavior. |
| Out-of-phase PWM1/PWM2 switching | Cuts input ripple current amplitude by ~30%, relaxing input capacitor requirements and extending battery life. |
| Integrated current sensing via rDS(ON) | Removes need for 2× current-sense resistors (saving ~3 mm² PCB area and ~150 mW conduction loss per rail). |
| ACPI-compliant multi-pin shutdown | Enables flexible power-state transitions (S0–S5) using SDWN1/SDWN2/SDWNALL without external logic or firmware intervention. |
| Internal 5V ALWAYS bypass switch | Switches 5V ALWAYS output from LDO to 5V Main rail when active, reducing thermal load by up to 1.2 W at 500 mA load. |
Applications
| Notebook PC Power Subsystem | Sub-notebook / Ultra-Mobile PC |
|---|---|
Use Scenario: Centralized power management for Intel Pentium M/Core Solo-based notebooks requiring tightly sequenced 5V/3.3V/12V rails and always-on logic supplies. IC Role / Device Role / Timing Role: Primary multi-rail power controller managing CPU I/O, chipset, and peripheral voltage domains with ACPI-compliant shutdown coordination. Use Value: Reduces BOM count by integrating five regulators into one SSOP package, cuts board space by 40% vs discrete solutions, and enables <10 ms soft-start sequencing. |
Use Scenario: Compact portable computing platform with aggressive thermal constraints and battery runtime optimization. IC Role / Device Role / Timing Role: Dual-buck + boost controller delivering 5V/3.3V Main with out-of-phase switching and 12V backlight supply, plus always-on 3.3V/5V for RTC and wake logic. Use Value: Hysteretic light-load mode extends battery life by 12–18% during idle/suspend states; 300 kHz fixed frequency simplifies EMI filter design. |
| Mobile Industrial Terminal | Hand-Held Test Instrument |
Use Scenario: Ruggedized field terminal requiring reliable multi-voltage operation from 12 V nominal battery with brown-out resilience. IC Role / Device Role / Timing Role: System power manager providing isolated 5V/3.3V Main for ARM processor and FPGA, 12V for analog front-end, and always-on rails for real-time clock and CAN interface. Use Value: 4.7 V UVLO and 150°C thermal shutdown ensure robust operation in automotive-grade temperature environments (-10°C to 85°C). |
Use Scenario: Battery-powered handheld oscilloscope or multimeter needing low-noise analog supplies and fast wake-from-sleep capability. IC Role / Device Role / Timing Role: Precision power controller generating clean 3.3V ALWAYS for microcontroller and ADC reference, plus 5V Main for display backlight driver. Use Value: Integrated PGOOD and individual SDWN pins allow deterministic power-up sequence and rapid fault recovery (<50 µs PGOOD pulse width). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail power controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6220CRZ | Same die, RoHS-compliant revision with updated thermal specs (θJA = 105°C/W); identical pinout and electrical behavior. | No functional change; intended for new designs where Pb-free compliance and improved thermal margin are prioritized. | Select ISL6220CRZ for new designs requiring documented RoHS-6 compliance and marginally better thermal performance. |
| RT8205AZQW | Dual-buck + boost controller with 500 kHz main frequency, no linear regulators; requires external LDOs for always-on rails. | Lacks integrated 5V/3.3V ALWAYS LDOs - necessitates two additional ICs and increases board area by ~25%. | Choose RT8205AZQW only if higher switching frequency (500 kHz) and lower quiescent current (<100 µA) outweigh loss of integration and added component count. |
Compared with ISL6220CRZ, IPM6220ACAZ offers identical functionality but with legacy Pb-free qualification; compared with RT8205AZQW, IPM6220ACAZ provides full five-rail integration including linear regulators, reducing total solution size and complexity at the cost of slightly higher standby current.
Availability
IPM6220ACAZ is available at Aetrix Electronics and suitable for notebook PC power subsystems, mobile industrial terminals, handheld test instruments, and sub-notebook platforms requiring stable component supply and long-term lifecycle support.
Supply support for IPM6220ACAZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation (now part of Renesas Electronics) is a U.S.-based analog and power management IC designer known for high-performance power solutions targeting computing and portable electronics.
The IPM6220ACAZ belongs to Intersil's Advanced Notebook Power Controller product line, engineered specifically to consolidate multiple voltage rails and replace discrete power ICs in space-constrained, thermally sensitive mobile computing platforms.
FAQ
What is the maximum continuous output current supported by the IPM6220ACAZ on its 5V Main and 3.3V Main rails?
The IPM6220ACAZ supports up to 5.0 A continuous output current on both the 5V Main and 3.3V Main synchronous buck outputs, as specified under recommended operating conditions with 5.6 V to 22.0 V input and ambient temperatures from –10°C to 85°C. Current limit thresholds are set via ISEN1/ISEN2 pins using either MOSFET rDS(ON) or optional external sense resistors, with typical trip points at 135 µA corresponding to ~5 A depending on MOSFET selection. The IPM6220ACAZ datasheet confirms this rating across its full operating range.
Does the IPM6220ACAZ require external current-sense resistors for basic operation?
No, the IPM6220ACAZ does not require external current-sense resistors for basic operation. It uses the lower MOSFET's rDS(ON) as the primary current-sensing element for both 5V Main and 3.3V Main buck converters - eliminating sense resistor losses and saving PCB area. External resistors are optional and only needed when higher current-limit accuracy is required beyond the ±30% tolerance inherent in rDS(ON)-based sensing. The IPM6220ACAZ datasheet explicitly states "No Current-Sense Resistor Required" as a key feature.
How does the IPM6220ACAZ handle power sequencing between its five output rails?
The IPM6220ACAZ implements precise power sequencing via three dedicated control pins: SDWNALL (global enable), SDWN1 (5V Main enable), and SDWN2 (3.3V Main enable). When SDWNALL is high, the 5V ALWAYS and 3.3V ALWAYS linear regulators activate immediately; 5V Main and 3.3V Main then ramp up based on soft-start capacitors tied to SDWN1/SDWN2. The IPM6220ACAZ supports four distinct power states defined in Table 1 of its datasheet, enabling ACPI S0–S5 compatibility without external sequencing ICs. This built-in logic ensures repeatable, glitch-free startup and shutdown sequences for the IPM6220ACAZ.
Can the 12V boost output of the IPM6220ACAZ be disabled independently of the other rails?
Yes, the 12V boost output of the IPM6220ACAZ can be disabled independently by connecting the VSEN3 pin to the 5V ALWAYS supply. According to the IPM6220ACAZ datasheet, this action forces the boost controller into shutdown while leaving all other outputs - including 5V ALWAYS, 3.3V ALWAYS, 5V Main, and 3.3V Main - fully operational. This flexibility allows designers to omit the external boost components (MOSFET, inductor, diode, capacitor) when 12V is not required, reducing BOM cost and board area without affecting the rest of the IPM6220ACAZ functionality.
What thermal protection mechanisms are implemented in the IPM6220ACAZ?
The IPM6220ACAZ incorporates thermal shutdown protection that activates at 150°C junction temperature, with 25°C hysteresis to prevent oscillation near the trip point. Once triggered, the IC disables all PWM outputs while keeping the 5V ALWAYS and 3.3V ALWAYS linear regulators active - preserving basic system functionality during thermal events. The IPM6220ACAZ also includes input undervoltage lockout (UVLO) at 4.7 V and overvoltage protection (OVP) on all monitored rails (5V Main, 3.3V Main, 12V), latching off the affected converter upon fault detection. These protections are fully integrated and require no external components to function.
IPM6220ACAZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 24-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (3), Linear (LDO) (2)
- Number of Outputs:
- 5
- Frequency - Switching:
- 300kHz
- Voltage/Current - Output 1:
- Controller
- Voltage/Current - Output 2:
- Controller
- Voltage/Current - Output 3:
- Controller
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 5.6V ~ 24V
- Operating Temperature:
- -10°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QSOP
IPM6220ACAZ FAQ
1.How can I place an order for IPM6220ACAZ through Aetrix?
Please submit a Request for Quotation (RFQ) for IPM6220ACAZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for IPM6220ACAZ reliable?
The price and inventory of IPM6220ACAZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for IPM6220ACAZ is usually 5 days.
3.What payment methods are accepted for IPM6220ACAZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for IPM6220ACAZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for IPM6220ACAZ?
IPM6220ACAZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your IPM6220ACAZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for IPM6220ACAZ?
For technical support, including IPM6220ACAZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your IPM6220ACAZ requirements.
6.How does Aetrix verify that IPM6220ACAZ is sourced from the original manufacturer or authorized distributors?
All IPM6220ACAZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that IPM6220ACAZ meets industry standards.
7.What is the process for return or replacement of IPM6220ACAZ?
All IPM6220ACAZ units undergo pre-shipment inspection (PSI). If there is an issue with IPM6220ACAZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The IPM6220ACAZ part is unused and in its original packaging.
Return procedure for IPM6220ACAZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
IPM6220ACAZ Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

