Infineon Technologies IR1152STRPBF

Overview

IR1152STRPBF from International Rectifier is a fixed-frequency (66 kHz) continuous conduction mode (CCM) boost-type power factor correction (PFC) IC implementing proprietary One Cycle Control (OCC) architecture, featuring average current mode control, brown-out protection (BOP), output overvoltage protection (OVP), and 750 mA peak gate drive. It operates across 85–264 VAC universal input and delivers DC bus regulation in AC-DC front-end stages of industrial SMPS.

For engineers reviewing the IR1152STRPBF datasheet, IR1152STRPBF pinout, IR1152STRPBF application, or IR1152STRPBF equivalent, key selection criteria include its fixed 66 kHz oscillator, BOP threshold (0.68–0.88 V), OVP reset hysteresis (101–105% VREF), micropower sleep mode (<75 µA), and SO-8 package compatibility with high-density PFC board layouts.

Technical Context

The IR1152STRPBF implements a dual-loop OCC architecture: an outer voltage loop (via VFB/COMP) generating a DC error signal (Vm) for output regulation, and an inner current loop using amplified ISNS signal (gDC = 2.65–3.55 V/V) subtracted from a resettable integrator ramp to derive instantaneous duty cycle. The 5 kHz corner frequency of the on-chip RC filter enables robust 120 Hz ripple rejection while preserving switching ripple suppression.

Its oscillator is fully integrated and untrimmed, delivering ±8.5% frequency tolerance (53.8–73 kHz) over –25°C to +125°C, eliminating external timing components and reducing EMI susceptibility. Brown-out detection uses direct line-sensing at BOP pin with enable threshold (1.46–1.66 V) and fault threshold (0.68–0.88 V), decoupling protection from auxiliary supply monitoring.

Key Specifications

Pinout & Package

IR1152STRPBF is housed in an industry-standard SO-8 package (MSL2, 260°C reflow compatible), with exposed pad not electrically connected. Thermal resistance R_θJA is 128°C/W under board-mounted, still-air conditions.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PFC controller applications.

Compared with UCC28070DR and FAN6982MY, IR1152STRPBF uniquely integrates brown-out protection, micropower sleep mode, and a jitter-free fixed-frequency oscillator - making it optimal for cost-sensitive, single-phase industrial and lighting PFC designs requiring regulatory-compliant standby behavior.

Availability

IR1152STRPBF is available at Aetrix Electronics and suitable for industrial AC-DC power supplies, LED driver front-end stages, and medical equipment power modules requiring stable component supply and long-term lifecycle support.

Supply support for IR1152STRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

International Rectifier (now part of Infineon Technologies) is a semiconductor pioneer specializing in power management ICs and discrete power devices, with decades of leadership in PFC, motor control, and high-efficiency power conversion.

The IR1152 product line was developed specifically for cost-optimized, high-reliability CCM boost PFC in universal-input AC-DC converters - emphasizing integration, low standby power, and simplified EMI compliance.

FAQ

What is the purpose of the BOP pin, and how is it configured?

The BOP (Brown-Out Protection) pin monitors scaled AC line voltage to detect undervoltage faults. It triggers protection when voltage falls below 0.78 V (typ), with an enable threshold of 1.56 V (typ). Configuration requires a resistive divider from rectified AC line to BOP, referenced to COM, with values selected to meet the 0.78 V trip point at minimum valid input voltage (e.g., 85 VAC).

Can IR1152STRPBF drive GaN or SiC MOSFETs directly?

Yes - its 750 mA peak gate drive, 25 ns rise time (1 nF load), and 14 V gate clamp support direct driving of low-Qg GaN HEMTs and SiC MOSFETs used in high-frequency PFC stages. Layout best practices (short gate traces, local 100 nF bypass at VCC/GATE) are required to maintain switching integrity.

How does the OVP/EN pin support both overvoltage protection and sleep mode?

OVP/EN serves dual roles: when biased above 1.04 V (104% VREF), it enables overvoltage detection via internal comparators tied to VFB; when pulled below 0.8 V, it forces the IC into micropower sleep mode (<75 µA). These functions are mutually exclusive and internally prioritized - sleep mode overrides OVP functionality.

What is the significance of the "resettable integrator" in One Cycle Control?

The resettable integrator generates a sawtooth PWM ramp whose amplitude equals the voltage loop error (Vm) and period equals 1/fSW. By comparing this ramp to the amplified ISNS signal, the IC computes instantaneous duty cycle D = (Vm − gDC·VISNS)/Vm - achieving sinusoidal input current without line voltage sensing, thereby simplifying design and improving reliability.