Infineon Technologies IR1153STRPBF

Overview

IR1153STRPBF from Infineon Technologies (formerly International Rectifier) is a fixed-frequency, average-current-mode PFC controller IC implementing proprietary One Cycle Control (OCC) for continuous conduction mode (CCM) boost converters. It operates at 22.2 kHz (typ), delivers 750 mA peak gate drive, features brown-out protection (0.76 V BOP threshold), OVP/EN sleep mode (<75 µA), and VCC UVLO (10.1 V turn-off). Used in AC-DC front-end power supplies for server PSUs and industrial SMPS.

For engineers reviewing the IR1153STRPBF datasheet, IR1153STRPBF pinout, IR1153STRPBF application, or IR1153STRPBF equivalent, key selection criteria include fixed 22.2 kHz switching frequency, ISNS current-sense voltage threshold of –0.51 V, VFB reference of 5.0 V, OVP/EN sleep enable below 0.8 V, and SO-8 package compatibility with thermal resistance R_θJA = 128 °C/W.

Technical Context

The IR1153STRPBF implements a dual-loop OCC architecture: a slow outer voltage loop (VFB → COMP error amplifier) regulating DC bus voltage via VCOMP, and a fast inner current loop using resettable integrator-based PWM generation driven by amplified ISNS signal and VCOMP-derived ramp slope (V_m × f_SW). This eliminates input voltage sensing while achieving sinusoidal line current shaping.

Its internal oscillator fixes f_SW at 22.2 kHz with ±2 kHz tolerance over temperature, enabling jitter-free gate drive and audible-noise suppression. Protection functions are hardware-asserted: BOP triggers at 0.76 V on BOP pin, OVP latches at 106% of VREF (5.3 V), and cycle-by-cycle current limit activates at –0.51 V on ISNS - all independent of microcontroller intervention.

Key Specifications

Pinout & Package

IR1153STRPBF is housed in an industry-standard SO-8 surface-mount package with exposed pad for enhanced thermal performance. Pin assignments are validated per IR's official lead assignment diagram (Rev. Feb 2011).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PFC controller applications.

Compared with UCC28070DR and FAN7930C, IR1153STRPBF uniquely integrates brown-out sensing, OVP-initiated sleep, and jitter-free 22.2 kHz operation in SO-8 - making it optimal for industrial and medical 300–1000 W PFC stages where reliability, low audible noise, and regulatory standby compliance are critical.

Availability

IR1153STRPBF is available at Aetrix Electronics and suitable for server power supplies, industrial AC-DC converters, medical equipment power modules, and LED driver front-end stages requiring stable component supply and long-term lifecycle support.

Supply support for IR1153STRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a global semiconductor leader specializing in power management, automotive, and industrial control ICs, with deep expertise in high-voltage analog and mixed-signal design.

The IR1153STRPBF belongs to Infineon's μPFC product line, engineered specifically for cost-effective, high-reliability continuous conduction mode boost PFC in 300–1500 W AC-DC power supplies targeting industrial, medical, and computing applications.

FAQ

What is the purpose of the BOP pin on IR1153STRPBF?

The BOP (Brown-Out Protection) pin monitors a scaled version of the rectified AC input voltage. When the voltage at this pin drops below 0.76 V (typ), the IC disables the gate driver to prevent unstable PFC operation during low-line conditions. It provides hardware-level line-failure response without software involvement, enhancing system safety in industrial environments.

Can IR1153STRPBF operate without an external VCC supply capacitor?

No - a minimum 10 µF low-ESR capacitor must be placed between VCC and COM pins. The IC draws up to 5 mA during operation and experiences transient current spikes during gate switching. Without adequate local decoupling, VCC droop can trigger unintended UVLO events or cause COMP instability, leading to erratic duty cycle modulation and potential OVP faults.

How does the OVP/EN pin function in both protection and sleep modes?

The OVP/EN pin serves dual roles: when pulled above 104% of VREF (5.3 V), it triggers latched overvoltage shutdown; when pulled below 0.8 V, it forces the IC into micropower sleep mode (<75 µA). These are mutually exclusive states - the pin voltage determines mode priority, with OVP taking precedence if both thresholds are violated simultaneously.

What is the significance of the ISNS pin's negative voltage threshold?

The ISNS pin accepts a negative-going voltage from a source-connected current sense resistor. Its –0.51 V (typ) threshold enables direct sensing of boost inductor current without polarity inversion circuitry. This simplifies layout, reduces component count, and avoids offset errors introduced by op-amp-based current amplifiers - critical for accurate cycle-by-cycle peak current limiting in CCM operation.