Infineon Technologies IR1155STRPBF

Overview

IR1155STRPBF from Infineon Technologies (formerly International Rectifier) is a programmable-frequency, average-current-mode PFC controller IC implementing One Cycle Control (OCC) for continuous conduction mode (CCM) boost converters. It delivers 48–200 kHz switching frequency, 1.5 A peak gate drive, and <200 µA sleep current, targeting AC-DC front-end stages in industrial power supplies compliant with Energy Star and Blue Angel standby regulations.

For engineers reviewing the IR1155STRPBF datasheet, IR1155STRPBF pinout, IR1155STRPBF application, or IR1155STRPBF equivalent, key selection criteria include its programmable frequency range, OVP/EN pin dual-function interface, cycle-by-cycle current limiting, open-loop protection threshold at 19% VREF, and micropower sleep mode activation via OVP/EN pin biasing below 0.67 V.

Technical Context

The IR1155STRPBF integrates a precision 5.0 V internal reference (±2% over temperature), transconductance error amplifier (gm = 35–65 µS), and oscillator with ±10% total frequency variation across line and temperature. Its OCC architecture eliminates multiplier and divider circuits, directly shaping input current using sensed ISNS voltage and VFB feedback to achieve >0.99 PF and low THD.

Protection logic includes dedicated comparators for output overvoltage (106.5% VREF trip), open-loop fault (19% VREF on VFB), and peak current limit (−0.77 V on ISNS), all with internal blanking (220–520 ns) and latch immunity. The OVP/EN pin serves as both overvoltage detector and sleep-mode enable with hysteresis (0.60 V off / 0.90 V on).

Key Specifications

Pinout & Package

IR1155STRPBF is housed in an 8-pin SOIC package (SO-8, 150 mil width) with standard JEDEC MS-012AC footprint and MSL2 moisture sensitivity rating.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PFC controller applications.

Compared with UCC28070DR and FAN6982MY, IR1155STRPBF uniquely combines programmable frequency, integrated sleep mode activation via OVP/EN, and OCC architecture-reducing BOM count by eliminating multiplier circuits while meeting stringent global standby regulations without external components.

Availability

IR1155STRPBF is available at Aetrix Electronics and suitable for industrial AC-DC power supplies, LED driver front-end stages, and medical equipment power systems requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for IR1155STRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, and industrial control ICs, with leadership in high-voltage gate drivers and PFC solutions.

The IR1155STRPBF belongs to Infineon's μPFC family, designed specifically for high-efficiency, low-THD, and regulatory-compliant CCM boost PFC stages in universal-input offline power supplies.

FAQ

What is the minimum external capacitor value required to achieve 200 kHz switching frequency?

The IR1155STRPBF achieves 200 kHz with approximately 430 pF on the FREQ pin, as confirmed in the oscillator section of the datasheet. Using a 430 pF ±5% NP0/C0G capacitor ensures initial accuracy within ±8% and maintains stability across temperature. Larger values reduce frequency linearly; undersized capacitors may cause instability or exceed maximum rating.

How does the OVP/EN pin differentiate between overvoltage detection and sleep mode activation?

The OVP/EN pin uses two distinct voltage thresholds: overvoltage trips at 106.5% VREF (≈5.22 V), while sleep mode activates when pulled below 0.60–0.67 V. Internal hysteresis (0.3 V gap) prevents chatter. External resistor dividers must be designed so normal OVP monitoring stays above 1 V, reserving sub-0.7 V exclusively for intentional sleep signaling.

Can IR1155STRPBF drive a 600 V MOSFET directly without a gate driver IC?

Yes-the 1.5 A peak gate drive and 12–14 V internal clamp allow direct driving of typical 600 V superjunction MOSFETs (e.g., IPW60R041P7) with Qg ≤ 45 nC. Layout must minimize source inductance and use Kelvin-source connection for ISNS to avoid false current-limit triggering during fast switching transitions.

What is the purpose of the 220–520 ns blanking time on the ISNS pin?

The blanking time disables current sensing for 220–520 ns after each GATE turn-on to ignore switch-node ringing and layout-induced voltage spikes on the ISNS node. This prevents false overcurrent trips during MOSFET turn-on transients, ensuring reliable cycle-by-cycle limiting without compromising response to actual fault conditions.