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Infineon Technologies IR3820AMTRPBF

Part No.:
IR3820AMTRPBF
Manufacturer:
Infineon Technologies
Category:
Voltage Regulators - DC DC Switching Regulators
Package:
15-PowerVQFN
Datasheet:
AetrixIR3820AMTRPBF.pdf
Description:
IC REG BUCK ADJ 14A PQFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:882

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Product details

Overview

IR3820AMTRPBF from Infineon Technologies is a highly integrated synchronous buck regulator with integrated high- and low-side MOSFETs, delivering up to 14A continuous output current. It operates from 2.5V–21V input, regulates output from 0.6V–12V, and features fixed 300kHz switching frequency, programmable over-current protection, and pre-bias start-up-used in DDR memory voltage regulation for server and graphics card power delivery.

For engineers reviewing the IR3820AMTRPBF datasheet, IR3820AMTRPBF pinout, IR3820AMTRPBF application, or IR3820AMTRPBF equivalent, key selection criteria include its thermally enhanced 5mm×6mm QFN-15 package, dual UVLO thresholds (VCC and VC), precision 0.6V reference ±1.5%, hiccup-mode current limiting, and open-drain PGood with external threshold programming via Vsns.

Technical Context

The IR3820AMTRPBF implements voltage-mode PWM control with a fixed 300kHz oscillator and internal linear sawtooth ramp generator. Feedback is taken at FB against a trimmed 0.6V reference, and error amplifier output (COMP) drives the gate drivers through trailing-edge modulation.

Current sensing uses RDS(on) of the internal low-side MOSFET (6.9–8.7mΩ typ.), eliminating external sense resistors. Protection includes non-latching thermal shutdown at 140°C (20°C hysteresis), dual UVLO (VCC_UVLO: 4.0–4.4V rising; VC_UVLO: 3.1–3.5V rising), and programmable soft-start via SS capacitor.

Key Specifications

Parameter Value and Actual Design Meaning
Input Voltage Range 2.5V to 21V - supports wide-input industrial and computing rails including 12V and 19V systems.
Output Current 14A continuous - enables single-chip point-of-load regulation for DDR3/DDR4 VDDQ and GPU core supplies.
Switching Frequency 300kHz (±10%) - allows compact 1µH inductors and reduces EMI compared to lower-frequency alternatives.
Reference Voltage 0.6V ±1.5% (–40°C to +105°C) - ensures tight output regulation accuracy across temperature for low-voltage logic rails.
Thermal Shutdown 140°C trip with 20°C hysteresis - prevents permanent damage during sustained overload while enabling automatic recovery.
Package 5mm × 6mm QFN-15 with exposed thermal pad - delivers 2.5°C/W θJA for high-power density without heatsinks.
Protection Features Hiccup-mode OCP, pre-bias start-up, UVLO on VCC & VC, open-drain PGood - ensures robust system-level fault handling.

Pinout & Package

IR3820AMTRPBF is housed in a thermally enhanced 5mm × 6mm Power QFN package with 15 terminals and an exposed thermal pad (pin 0). The package supports high-current routing and efficient heat dissipation into PCB copper planes.

Pin/Terminal Circuit Role Design Meaning
VIN (12) Main input supply connection Accepts 2.5V–21V DC; connects directly to bulk input capacitor and high-side MOSFET source.
SW (11) Switch node Connects to output inductor; carries high di/dt switching waveform; requires tight layout to minimize ringing.
PGnd (10) Power ground Return path for MOSFET drivers and high-current paths; must be separated from AGnd and tied at single point.
AGnd (4,5,15) Signal ground Reference for FB, COMP, SS, OCSet, Vsns; must be routed separately from PGnd and joined only at package thermal pad.
FB (2) Feedback input Inverting input of error amplifier; sets output voltage via resistor divider from VOUT to AGnd.
SS (6) Soft-start/shutdown Capacitor-to-AGnd sets startup time; pulled below 0.3V to force shutdown with immediate gate driver disable.
OCSet (7) Over-current threshold Resistor from OCSet to SW programs current limit based on low-side RDS(on) sensing.
PGood (9) Power-good status Open-collector output; requires external pull-up to VCC; asserts when Vsns ≥ 0.38V (typ.) after soft-start delay.
Vsns (1) Power-good sense Inputs to PGood comparator; threshold set by external resistor divider from VOUT to AGnd.
VCC (8) Bias supply Powers internal logic and low-side driver; requires ≥0.1µF ceramic capacitor to PGnd.
VC (14) High-side driver supply Must be ≥VIN+5V (up to 28V); powers bootstrap circuit; requires ≥0.1µF ceramic capacitor to PGnd.
HG (13) High-side gate drive Outputs gate signal to internal high-side MOSFET; connects to small RC snubber to SW for EMI reduction.
COMP (3) Error amplifier output Compensates loop stability; connects to Type-II or Type-III compensation network between FB and AGnd.

Key Features

Feature Design Value
Integrated dual MOSFETs Top and bottom N-channel switches with RDS(on) ≤8.7mΩ each - eliminates discrete FETs and gate drivers, reducing BOM count and layout area.
Pre-bias start-up Enables safe startup into pre-charged output rails - avoids reverse current flow and output voltage collapse in multi-rail systems.
Programmable hiccup OCP Current limit set via OCSet resistor; fault response limits average power dissipation during short-circuit events.
Dual independent UVLO Separate VCC_UVLO (4.0–4.4V) and VC_UVLO (3.1–3.5V) prevent partial operation - ensures both drivers are disabled if either supply drops out.
Thermally optimized QFN Exposed pad and 15-pin layout enable <2.5°C/W junction-to-ambient thermal resistance - sustains 14A load at 70°C ambient without forced air.

Applications

DDR Memory Power Supply Graphics Card Core Regulator

Use Scenario: Delivering tightly regulated 1.2V/1.35V to DDR4/DDR5 memory modules in servers and workstations.

IC Role / Device Role / Timing Role: Primary synchronous buck regulator with fast transient response and ±1.5% VREF accuracy for memory VDDQ rail.

Use Value: Pre-bias start-up prevents data corruption during hot-plug memory insertion; hiccup OCP avoids thermal runaway during memory initialization faults.

Use Scenario: Providing dynamic 0.8–1.2V core voltage to GPU ASICs under rapidly varying load (0–14A).

IC Role / Device Role / Timing Role: High-current POL regulator with 300kHz fixed frequency and integrated MOSFETs for minimal footprint on PCIe add-in cards.

Use Value: Dual UVLO ensures clean power sequencing with GPU's auxiliary supplies; thermal shutdown with 20°C hysteresis enables reliable restart after thermal throttling events.

Server Point-of-Load Converter Embedded System CPU Core Supply

Use Scenario: Distributed 1.8V/2.5V regulation for FPGA I/O banks and ASIC peripherals in 1U rack servers.

IC Role / Device Role / Timing Role: Standalone buck controller with programmable soft-start and PGood signaling for system power sequencing.

Use Value: Programmable PGood threshold (via Vsns divider) aligns with server platform power-good timing requirements; 5×6mm QFN fits dense motherboard layouts.

Use Scenario: Single-chip 1.0V core supply for ARM-based SoCs in industrial gateways and edge AI devices.

IC Role / Device Role / Timing Role: Integrated regulator supporting wide-input (5–21V) front-end conversion and precise low-voltage output regulation.

Use Value: Wide VIN range accommodates unregulated 12V or PoE-derived inputs; thermal protection ensures reliability in sealed enclosures without airflow.

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck regulator applications.

Alternative Part Technical Difference Application Difference Selection Advice
MP8765GQ-Z (Monolithic Power) 4.5–18V input, 12A, 500kHz, no VC pin, integrated boot capacitor Lacks separate VC supply - unsuitable for >18V input or ultra-low dropout; simpler biasing but less flexible for high-VIN designs Select when input ≤18V and board space is constrained; avoid for 19V/21V inputs requiring VC >VIN+5V.
TPS544B20RJER (TI) 4.5–20V input, 15A, 350–700kHz adjustable, PMBus interface, no pre-bias start-up Requires external MOSFETs and digital configuration; lacks native pre-bias capability - risks output oscillation on hot-plug loads Choose for digitally managed systems needing telemetry; avoid where pre-bias safety is mandatory (e.g., memory modules).

Compared with MP8765GQ-Z and TPS544B20RJER, the IR3820AMTRPBF uniquely combines 21V max input, dedicated VC biasing, pre-bias start-up, and hiccup OCP in a single 5×6mm package - making it optimal for high-reliability, wide-input, hot-plug-sensitive applications like DDR and GPU power.

Availability

IR3820AMTRPBF is available at Aetrix Electronics and suitable for server point-of-load converters, graphics card core regulators, and embedded CPU core supplies requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for IR3820AMTRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive ICs, and industrial control solutions, with global manufacturing and quality certification to ISO/TS 16949 and IECQ QC 080000.

The IR3820A belongs to Infineon's SupIRBuck™ family of fully integrated synchronous buck regulators, designed specifically for high-efficiency, space-constrained point-of-load applications in computing, storage, and graphics infrastructure.

FAQ

What is the minimum output voltage supported by the IR3820AMTRPBF?

The IR3820AMTRPBF supports a minimum output voltage of 0.6V, set by its internal precision reference. This value is guaranteed over –40°C to +105°C with ±1.5% accuracy, enabling direct regulation of modern low-voltage logic rails such as DDR4 VDDQ (1.2V), GPU cores (0.8V), and ARM SoC cores (0.9–1.1V).

How does the pre-bias start-up function protect the system?

Pre-bias start-up disables the synchronous rectifier until the first control MOSFET gate pulse is generated, preventing reverse current flow into a pre-charged output capacitor. This avoids output voltage collapse, bus contention, and potential data corruption - critical for hot-pluggable memory modules and multi-rail systems with staggered power sequencing.

Can the IR3820AMTRPBF operate without an external bootstrap capacitor?

No - the VC pin requires an external ≥0.1µF high-frequency ceramic capacitor connected to PGnd to sustain high-side gate drive. Unlike some controllers with integrated boot capacitors, the IR3820AMTRPBF relies on this external component to maintain gate voltage above VIN during high-duty-cycle operation, especially near 12V output.

What is the recommended PCB layout practice for AGnd and PGnd?

AGnd (pins 4, 5, 15) and PGnd (pin 10) must be routed as separate copper polygons on the PCB and joined only at the package's exposed thermal pad. Mixing these grounds introduces noise coupling into the feedback and current-sense paths, degrading regulation accuracy and causing instability in the COMP loop.

IR3820AMTRPBF Specifications

Product attributes
Attribute value
Manufacturer:
Infineon Technologies
Series:
SupIRBuck®
Package/Case:
15-PowerVQFN
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Function:
Step-Down
Output Configuration:
Positive
Topology:
Buck
Output Type:
Adjustable
Number of Outputs:
1
Voltage - Input (Min):
2.5V
Voltage - Input (Max):
21V
Voltage - Output (Min/Fixed):
0.6V
Voltage - Output (Max):
12V
Current - Output:
14A
Frequency - Switching:
300kHz
Synchronous Rectifier:
Yes
Operating Temperature:
-40°C ~ 125°C (TJ)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
PQFN (5x6)

IR3820AMTRPBF FAQ

1.How can I place an order for IR3820AMTRPBF through Aetrix?

Please submit a Request for Quotation (RFQ) for IR3820AMTRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for IR3820AMTRPBF reliable?

The price and inventory of IR3820AMTRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for IR3820AMTRPBF is usually 5 days.

3.What payment methods are accepted for IR3820AMTRPBF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for IR3820AMTRPBF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for IR3820AMTRPBF?

IR3820AMTRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your IR3820AMTRPBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for IR3820AMTRPBF?

For technical support, including IR3820AMTRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your IR3820AMTRPBF requirements.

6.How does Aetrix verify that IR3820AMTRPBF is sourced from the original manufacturer or authorized distributors?

All IR3820AMTRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that IR3820AMTRPBF meets industry standards.

7.What is the process for return or replacement of IR3820AMTRPBF?

All IR3820AMTRPBF units undergo pre-shipment inspection (PSI). If there is an issue with IR3820AMTRPBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The IR3820AMTRPBF part is unused and in its original packaging.

Return procedure for IR3820AMTRPBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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