Infineon Technologies IR3823MTR1PBF

Overview

IR3823MTR1PBF from Infineon Technologies (formerly International Rectifier) is a 3A synchronous buck regulator with integrated high- and low-side MOSFET drivers, voltage-mode control, and internal LDO. It operates from 5V–21V input (or 1.0V–21V with external VCC bias), delivers 0.6V–0.86×PVin output, supports up to 1.5MHz switching, and targets Point-of-Load regulation in computing and telecom power rails.

For engineers reviewing the IR3823MTR1PBF datasheet, IR3823MTR1PBF pinout, IR3823MTR1PBF application, or IR3823MTR1PBF equivalent, key selection criteria include its thermally compensated current limit, programmable soft-start options (1.5/3/6ms), open-drain PGood signaling, feedforward-enhanced line/load regulation, and PQFN thermal performance at 3.5mm × 3.5mm.

Technical Context

The IR3823 employs voltage-mode PWM control with a proprietary modulator delivering high bandwidth and fast loop response-enabling stable regulation with fewer output capacitors. Its error amplifier features 100–120dB DC gain, 20–40MHz GBWP, and ±0.6% reference accuracy over 0°C–70°C.

It integrates bootstrap diode, thermal shutdown, hiccup-mode overcurrent protection, and output overvoltage protection. The Rt/Sync pin enables either resistor-set frequency (300–1500kHz) or external clock synchronization (270–1650kHz), while SS_Select configures soft-start time via voltage level on pin 2.

Key Specifications

Pinout & Package

IR3823MTR1PBF uses a 16-pin 3.5mm × 3.5mm PQFN package with exposed thermal pad (pin 10 = PGnd). Pin numbering follows top-view layout per Figure 3 of datasheet Rev. April 2014.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck regulator applications.

Compared with MP2315DJ-LF-Z and TPS54332DDAR, IR3823MTR1PBF uniquely combines programmable soft-start, integrated bootstrap diode, and feedforward line regulation in a thermally optimized PQFN-making it optimal for compact, high-reliability POL designs needing predictable startup and robust transient response.

Availability

IR3823MTR1PBF is available at Aetrix Electronics and suitable for server VR12 core rails, network switch ASIC supplies, and storage controller SoC power delivery requiring stable component supply, long-term lifecycle support, and RoHS6-compliant packaging.

Supply support for IR3823MTR1PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies acquired International Rectifier in 2015 and continues development of its SupIRBuck® family-specializing in highly integrated power management ICs for computing, telecom, and industrial applications.

The IR3823 belongs to Infineon's SupIRBuck® series, designed specifically for efficient, compact Point-of-Load regulation where integration, thermal performance, and precise sequencing are critical-targeting next-generation data center and networking equipment.

FAQ

What is the minimum input voltage supported by IR3823MTR1PBF when using external VCC bias?

The IR3823MTR1PBF supports PVin down to 1.0V when an external VCC supply (4.5–7.5V) is applied to the Vcc/LDO_Out pin. This bypasses the internal LDO and enables operation from ultra-low input rails such as partially discharged batteries or intermediate bus converters. Internal LDO mode requires Vin ≥5.5V.

How does the SS_Select pin configure soft-start time, and what are the voltage thresholds?

SS_Select selects soft-start duration by voltage level: tying to Vcc yields 1.5ms, leaving floating yields 3ms, and connecting to GND yields 6ms. The pin draws only 40–80µA, so standard resistor dividers from Vcc or GND are sufficient-no active drivers needed. No voltage thresholds are specified; logic-level connection suffices.

Can IR3823MTR1PBF synchronize to an external clock, and what are the signal requirements?

Yes-connect the Rt/Sync pin to an external clock through a small-signal diode (e.g., 1N4148) to inject sync pulses. The clock must be 270–1650kHz, with high/low thresholds of 3.0V and 0.6V respectively, and pulse width of 100–200ns. This enables EMI reduction via frequency dithering or alignment with system clocks.

What is the role of the PGnd pin, and how should it be routed on the PCB?

PGnd (Pin 10) is the dedicated power ground return for high-current MOSFET drivers and SW node current paths. It must connect directly to the main power ground plane with minimal trace length and multiple vias-separate from analog Gnd (Pins 4/9/13/16) until joined at a single star point near the IC's thermal pad to avoid noise coupling into control circuitry.