Infineon Technologies IR38365MTRPBFAUMA1

Overview

IR38365MTRPBFAUMA1 from Infineon Technologies is a 15 A synchronous buck regulator with Intel SVID interface, integrated MOSFET drivers and bootstrap diode, operating from 5.3–16 V input and delivering 0.5–0.875×PV_IN output voltage with ±0.5% reference accuracy and -40°C to +125°C junction temperature range. It targets V_mcp CPU rail regulation in Intel VR13/VR12.5 systems.

For engineers reviewing the IR38365MTRPBFAUMA1 datasheet, IR38365MTRPBFAUMA1 pinout, IR38365MTRPBFAUMA1 application, or IR38365MTRPBFAUMA1 equivalent, key selection criteria include SVID compliance (Rev 1.7), absence of PMBus™ support (pin 17 NC), remote differential sensing capability, thermally compensated current limiting, and 5 mm × 7 mm PQFN package with integrated LDO for single-rail 16 V operation.

Technical Context

This device implements a voltage-mode PWM controller with feedforward line regulation and dedicated SVID interface (SV_CLK/SV_DIO/SV_ALERT), supporting Intel VR12.5 and VR13 protocols for dynamic voltage scaling and margining. It integrates high- and low-side OptiMOS™ MOSFETs with R_DS(on) of 2.2 mΩ (top) and 0.78 mΩ (bottom) at T_j = 25°C.

The control loop uses an error amplifier with 100–120 dB DC gain, 20–40 MHz GBWP, and 7–20 V/µs slew rate, paired with true differential remote sense inputs (RS+, RS−) and independent PGood sensing (Vsns). Switching frequency is programmable from 150 kHz to 1.5 MHz via SVID commands only - no PMBus™ functionality is present.

Key Specifications

Pinout & Package

IR38365MTRPBFAUMA1 is housed in a thermally enhanced 5 mm × 7 mm PQFN package with exposed thermal pad and 26-pin layout. Pin 17 is NC (no connect), confirming absence of PMBus™ functionality per datasheet Rev 3.6.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar SVID-based buck regulator applications.

Compared with IR38363MTRPbF, IR38365MTRPBFAUMA1 reduces pin count and eliminates PMBus™ routing overhead while retaining full VR13 compliance; versus MP8765GQ-Z, it delivers native SVID integration and tighter reference accuracy but requires Intel-specific host firmware.

Availability

IR38365MTRPBFAUMA1 is available at Aetrix Electronics and suitable for Intel VR13 V_mcp regulation, server memory I/O supplies, and high-end desktop CPU auxiliary rails requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for IR38365MTRPBFAUMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive MCUs, and industrial control ICs, with global manufacturing and quality certification to ISO 9001 and IATF 16949.

This device belongs to the OptiMOS™ IPOL family - engineered specifically for Intel-compatible CPU voltage regulation, integrating power stages, controllers, and digital interfaces into compact PQFN packages for server and desktop motherboard applications.

FAQ

Does IR38365MTRPBFAUMA1 support PMBus™ communication?

No. IR38365MTRPBFAUMA1 supports only the Intel SVID interface (SV_CLK, SV_DIO, SV_ALERT). Pin 17 is explicitly designated NC (no connect) in the datasheet, and the functional block diagram confirms absence of PMBus™ logic. Configuration and telemetry must be handled exclusively via SVID commands.

What is the maximum allowable input voltage on the PVIN pin?

The absolute maximum rating for PVIN is 25 V, but the recommended operating range is 5.3 V to 16 V. Exceeding 16 V risks violating the 25 V SW node limit under worst-case duty cycle, and the boot circuit requires a 1 Ω series resistor if PVIN > 14 V to prevent overstress of the internal bootstrap diode.

Can IR38365MTRPBFAUMA1 operate with an external 5 V bias instead of the internal LDO?

Yes. The Vin pin accepts an external 5 V supply (4.5–5.5 V) to power the control circuitry, bypassing the internal LDO. When using external bias, tie Vin to the 5 V source and leave PVIN connected to the main 12 V bus. This configuration reduces self-heating and improves light-load efficiency.

How does the remote sense function handle PCB trace resistance between IC and load?

The RS+ and RS− pins form a true differential amplifier that measures voltage directly at the load terminals. With typical PCB trace resistance up to 50 mΩ, this topology rejects common-mode noise and compensates for IR drop, maintaining output regulation accuracy within ±0.5% across full load and temperature range without requiring additional compensation components.