Infineon Technologies IR3859MTRPBF
- Part No.:
- IR3859MTRPBF
- Manufacturer:
- Infineon Technologies
- Package:
- 17-PowerVQFN
- Datasheet:
-
IR3859MTRPBF.pdf
- Description:
- IC REG BUCK ADJ 9A 17PQFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,825
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
IR3859MTRPBF from Infineon Technologies is a highly integrated 9A synchronous buck regulator with co-packaged high- and low-side MOSFETs, PWM controller, and bootstrap diode in a 4mm × 5mm Power QFN package. It delivers 0.7V–0.9×Vin output across 1.5V–21V input, achieves >95% peak efficiency at 1.8V/9A, and supports programmable switching frequency up to 1.5MHz for point-of-load power in server VRMs.
For engineers reviewing the IR3859MTRPBF datasheet, IR3859MTRPBF pinout, IR3859MTRPBF application, or IR3859MTRPBF equivalent, key selection factors include its precision 0.7V ±1% reference, hiccup-mode overcurrent protection, pre-bias start-up capability, dedicated voltage monitoring (Vsns), and thermal shutdown at 140°C junction temperature.
Technical Context
The IR3859 implements a current-mode control architecture with a high-bandwidth error amplifier (GBWP: 20–40 MHz, slew rate: 7–20 V/μs) and internal ramp compensation. Its oscillator supports resistor-programmed frequency (225–1650 kHz) and external synchronization via the Sync pin, enabling multi-rail timing alignment in distributed POL systems.
Protection logic includes programmable OCSet threshold (20.8–172 μA), OVP trip at 110–120% Vref with 150 ns delay, PGood comparator with 80–90% Vref threshold and 256/Fs propagation delay, and thermal shutdown with 20°C hysteresis - all operating across –40°C to +125°C junction range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | Continuous 9A load capability enables single-chip supply for CPU/GPU core rails in servers and storage. |
| Input Voltage Range | 1.5V to 21V supports wide-range intermediate bus architectures including 3.3V, 5V, 12V, and 19V inputs. |
| Output Voltage Range | 0.7V to 0.9×Vin allows precise low-voltage regulation down to 0.7V with ±1% reference accuracy. |
| Switching Frequency | Programmable 225–1650 kHz via Rt resistor or external clock; higher frequencies reduce inductor size but increase switching loss. |
| Efficiency | >95% peak efficiency at 1.8V/9A/600kHz minimizes thermal load and improves system power density. |
| Junction Temperature | Rated –40°C to +125°C with thermal shutdown at 140°C ensures reliability in high-ambient industrial and telecom environments. |
| Package | 4mm × 5mm Power QFN with exposed thermal pad provides low θJA = 45°C/W for efficient heat dissipation on 4-layer PCBs. |
Pinout & Package
IR3859MTRPBF uses a 17-pin Power QFN package (4mm × 5mm) with exposed thermal pad connected to PGND. Pin 17 and Pin 4 are signal ground (GND); Pin 11 is dedicated power ground (PGND) for MOSFET drivers; Pin 13 is VIN; Pin 12 is SW; Pin 14 is Boot; Pin 10 is VCC; Pin 1 is Fb; Pin 2 is Vsns; Pin 3 is Comp; Pin 5 is Rt; Pin 6 is SS; Pin 7 is OCSet; Pin 8 is PGood; Pin 9 is Sync; Pin 15 is Enable; Pin 16 is Seq.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Fb (Pin 1) | Inverting input of error amplifier | Connects to output via resistor divider to set regulated voltage; determines feedback loop stability and accuracy. |
| Vsns (Pin 2) | Voltage sense for PGood and OVP | Monitors output rail independently for accurate power-good assertion and overvoltage fault detection. |
| Comp (Pin 3) | Error amplifier output | Interface for external RC compensation network to tune loop bandwidth and phase margin. |
| GND (Pins 4, 17) | Signal ground reference | Reference node for internal bias, reference, and control circuitry; must be low-impedance connection. |
| Rt (Pin 5) | Oscillator frequency set | Resistor-to-GND sets switching frequency; 9.31kΩ yields ~1.5MHz, 59kΩ yields ~250kHz. |
| SS (Pin 6) | Soft-start/shutdown control | Capacitor-to-GND sets startup time; pulled below 0.3V to force shutdown with hiccup recovery. |
| OCSet (Pin 7) | Overcurrent threshold set | Resistor from OCSet to SW defines current limit; value scales linearly with sensed current. |
| PGood (Pin 8) | Open-drain power-good status | Asserts after output reaches 80–90% Vref with programmable delay; requires external pull-up to VCC. |
| Sync (Pin 9) | External clock input | Accepts TTL/CMOS clock signal to synchronize multiple regulators and suppress beat frequencies. |
| VCC (Pin 10) | IC supply and driver bias | Must be decoupled with ≥1μF ceramic capacitor to PGND; UVLO thresholds at 3.95V (start) / 3.65V (stop). |
| PGND (Pin 11) | Power ground return | Dedicated low-inductance path for high-side/low-side MOSFET sources; separate from signal GND. |
| SW (Pin 12) | Switch node | Connects to inductor; carries high dv/dt switching waveform; critical for layout and EMI control. |
| VIN (Pin 13) | Main input supply | Accepts 1.5–21V input; internal protection limits absolute max to 25V DC. |
| Boot (Pin 14) | High-side gate driver supply | 0.1μF capacitor to SW generates floating bias for top FET; max boot-to-SW voltage is 8V. |
| Enable (Pin 15) | Startup enable control | UVLO thresholds at 1.14–1.36V (start), 0.9–1.06V (stop); resistive divider sets turn-on voltage. |
| Seq (Pin 16) | Power sequencing input | Two-resistor divider sets tracking behavior for coordinated multi-rail startup with other regulators. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated high- and low-side MOSFETs | Top FET RDS(on) = 21–29 mΩ, bottom FET RDS(on) = 11–16 mΩ at 25°C - eliminates external FET selection and layout complexity. |
| Programmable hiccup overcurrent protection | Configurable OCSet pin sets current limit; fault triggers 4096-cycle hiccup mode - prevents thermal runaway during sustained overload. |
| Enhanced pre-bias start-up | Allows safe start-up into pre-charged output capacitors without reverse current flow - essential for hot-swap and multi-phase sequencing. |
| Dedicated Vsns pin for output monitoring | Independent sensing path enables accurate PGood assertion and OVP detection without loading the main feedback divider. |
| Thermal protection with hysteresis | Shuts down at 140°C junction temperature and restarts only after cooling by 20°C - avoids oscillatory cycling near thermal limit. |
Applications
| Server VRM Core Rail | Storage Controller Supply |
|---|---|
Use Scenario: Powers CPU/GPU core voltage (e.g., 0.8–1.2V @ 6–9A) in 1U/2U rack servers with tight thermal constraints. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering tightly regulated low-voltage, high-current output with fast transient response. Use Value: >95% efficiency at full load reduces board-level heat by ~2.1W vs. discrete solutions, enabling denser packaging and lower fan speed. | Use Scenario: Supplies 1.2V/3.3V rails to NVMe SSD controllers and SAS/SATA host bus adapters in enterprise storage enclosures. IC Role / Device Role / Timing Role: Point-of-load regulator with programmable soft-start and sequencing (via Seq pin) for controlled power-up of multi-rail storage subsystems. Use Value: Pre-bias start-up and hiccup OCP prevent damage during hot-plug insertion and ensure reliable operation under variable load transients. |
| Embedded Telecom Baseband | Industrial Edge AI Module |
Use Scenario: Provides 0.7–1.0V core supply to FPGA-based baseband processors in small-cell radio units operating at –40°C to +85°C ambient. IC Role / Device Role / Timing Role: Highly integrated buck converter with extended temperature rating and robust protection for unattended telecom deployments. Use Value: Thermal shutdown at 140°C and –40°C to +125°C junction range ensure continuous operation in sealed outdoor cabinets without active cooling. | Use Scenario: Delivers 1.8V/9A to edge AI inference accelerators (e.g., NPU cores) in ruggedized industrial gateways with limited airflow. IC Role / Device Role / Timing Role: High-efficiency POL regulator with external sync capability to align switching with system clock and reduce EMI in noise-sensitive analog sections. Use Value: 1.5MHz max switching frequency allows use of compact 0.68μH inductors, reducing solution footprint by >30% vs. 500kHz designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2315DJ-LF-Z | 6A rated, 4.5–24V input, fixed 500kHz fSW, no external sync or Seq pin, smaller 3mm × 4mm QFN | Lacks programmable frequency, sequencing, and independent Vsns - suitable only for simpler, lower-current non-sequenced rails | Select when cost and size are prioritized over flexibility and multi-rail coordination. |
| TPS549D22RQFT | 9A rated, 3–16V input, 300–2000kHz programmable fSW, PMBus interface, integrated telemetry, larger 5mm × 6mm QFN | Includes digital interface and real-time telemetry but requires external MOSFETs and more complex layout | Select when system-level monitoring, dynamic voltage scaling, or firmware-controlled configuration is required. |
Compared with MP2315DJ-LF-Z and TPS549D22RQFT, the IR3859MTRPBF uniquely balances integration (co-packaged FETs), analog programmability (Rt, OCSet, Seq), and robust protection - making it optimal for analog-controlled, space-constrained, high-reliability POL applications without digital infrastructure.
Availability
IR3859MTRPBF is available at Aetrix Electronics and suitable for server VRMs, storage controller supplies, embedded telecom baseband power, and industrial edge AI modules requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for IR3859MTRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, and industrial control ICs, with leadership in silicon and silicon carbide power devices.
The IR3859 belongs to Infineon's SupIRBuck™ family of integrated POL regulators, designed specifically for high-efficiency, low-voltage, high-current point-of-load conversion in datacenter, networking, and telecom infrastructure.
FAQ
What is the minimum recommended output capacitance for stable operation at 9A?
The IR3859MTRPBF datasheet specifies a minimum 220μF total output capacitance using low-ESR ceramic or polymer capacitors. For 9A loads with <1% output ripple, a typical design uses three 100μF/6.3V X5R ceramics in parallel with 2mΩ ESR, placed within 3mm of the SW and PGND pins to minimize loop inductance and ensure stability across the full load range.
Can the IR3859MTRPBF operate with an input voltage below 1.5V?
No. The absolute minimum input voltage is 1.5V per the Recommended Operating Conditions table. Operation below this level risks failure to regulate, unstable switching, or undervoltage lockout activation. The device's internal gate drivers and control circuitry require sufficient headroom above the 0.7V reference to maintain proper MOSFET bias and error amplifier function.
How does the OCSet pin determine current limit threshold?
The OCSet pin sinks a fixed current (20.8–172 μA depending on switching frequency) that flows through an external resistor connected between OCSet and the SW node. The resulting voltage drop across the resistor sets the current-sense threshold for the valley-current limit comparator. A 10kΩ resistor yields ~1.2A limit at 125kHz; scaling follows linear relationship per Table 1 in the datasheet.
Is the exposed thermal pad on the Power QFN electrically connected to any internal node?
Yes. The exposed thermal pad is internally connected to PGND (Pin 11), not GND (Pins 4/17). It must be soldered to a dedicated PGND copper pour on the PCB with ≥4 thermal vias (0.3mm diameter) to a solid inner ground plane. Connecting it to signal GND or leaving it floating degrades thermal performance and may cause instability or premature thermal shutdown.
IR3859MTRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- SupIRBuck®
- Package/Case:
- 17-PowerVQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 1.5V
- Voltage - Input (Max):
- 21V
- Voltage - Output (Min/Fixed):
- 0.7V
- Voltage - Output (Max):
- 18.9V
- Current - Output:
- 9A
- Frequency - Switching:
- 225kHz ~ 1.65MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 17-PQFN (4x5)
IR3859MTRPBF FAQ
1.How can I place an order for IR3859MTRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for IR3859MTRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for IR3859MTRPBF reliable?
The price and inventory of IR3859MTRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for IR3859MTRPBF is usually 5 days.
3.What payment methods are accepted for IR3859MTRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for IR3859MTRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for IR3859MTRPBF?
IR3859MTRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your IR3859MTRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for IR3859MTRPBF?
For technical support, including IR3859MTRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your IR3859MTRPBF requirements.
6.How does Aetrix verify that IR3859MTRPBF is sourced from the original manufacturer or authorized distributors?
All IR3859MTRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that IR3859MTRPBF meets industry standards.
7.What is the process for return or replacement of IR3859MTRPBF?
All IR3859MTRPBF units undergo pre-shipment inspection (PSI). If there is an issue with IR3859MTRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The IR3859MTRPBF part is unused and in its original packaging.
Return procedure for IR3859MTRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
IR3859MTRPBF Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…

