Renesas ISL22346UFRT20Z
- Part No.:
- ISL22346UFRT20Z
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
ISL22346UFRT20Z.pdf
- Description:
- IC DGT POT 50KOHM 128TAP 20TQFN
- Quantity:
- Payment:

- Shipping:

Inventory:725
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Product details
Overview
ISL22346UFRT20Z from Renesas (formerly Intersil) is a quad digitally controlled potentiometer (XDCP™) with I²C interface, 128-tap resolution, 50 kΩ end-to-end resistance, and non-volatile wiper position storage. It operates from 2.7V to 5.5V, supports -40°C to +125°C, and uses a 20-lead 4×4 mm TQFN package. It enables precise, reprogrammable analog adjustment in sensor calibration and power supply feedback loops.
For engineers reviewing the ISL22346UFRT20Z datasheet, ISL22346UFRT20Z pinout, ISL22346UFRT20Z application, or ISL22346UFRT20Z equivalent, this page delivers verified electrical specs, validated pin functions, confirmed I²C timing compliance, real-world use cases, and two technically documented alternative parts - all specific to the ISL22346UFRT20Z variant with 50 kΩ resistance and TQFN packaging.
Technical Context
The ISL22346UFRT20Z integrates four independent DCPs sharing a single I²C bus, each with a volatile Wiper Register (WR) and non-volatile Initial Value Register (IVR). Wiper positioning is achieved via resistor ladder + CMOS switch architecture with make-before-break switching, ensuring monotonicity and glitch-free transitions.
It implements full I²C slave functionality at up to 400 kHz, supports three address pins (A0–A2) for up to eight devices per bus, and features dual shutdown control - hardware (SHDN pin) and software (ACR[6] bit). Power-up recalls IVR contents into WRs, and shutdown disconnects RH terminals while shorting RW to RL.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Total Resistance | 50 kΩ ±20% - defines maximum adjustable range in voltage divider or rheostat mode |
| Tap Resolution | 128 positions (7-bit WR) - enables 0.78% step resolution across full scale |
| Wiper Resistance | 70 Ω typical @ 3.3 V - contributes minimal series error in precision gain/offset circuits |
| I²C Clock Frequency | Up to 400 kHz - compatible with standard-mode I²C controllers without timing redesign |
| Shutdown Current | 2 µA @ 3.6 V / +85°C - enables ultra-low-power sleep states in battery-backed systems |
| Temperature Range | -40°C to +125°C - qualified for under-hood automotive and industrial motor control environments |
| Non-volatile Endurance | 1,000,000 write cycles - supports field calibration updates over product lifetime |
Pinout & Package
ISL22346UFRT20Z uses a 20-lead 4×4 mm TQFN package (RoHS-compliant, exposed pad connected to GND). Pin numbering follows top-view layout with EPAD internally tied to GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RH0–RH3 | High terminal of DCP0–DCP3 | Fixed end of resistor ladder; connects to VCC or reference voltage in divider mode |
| RL0–RL3 | Low terminal of DCP0–DCP3 | Fixed end of resistor ladder; connects to GND or signal return in divider mode |
| RW0–RW3 | Wiper terminal of DCP0–DCP3 | Adjustable tap point; output node for voltage division or variable resistance |
| SCL / SDA | I²C clock/data bidirectional lines | Open-drain interface requiring external pull-ups; supports multi-master arbitration |
| A0–A2 | I²C device address inputs | Set LSBs of 7-bit slave address; enable up to eight ISL22346 devices on one bus |
| SHDN | Active-low hardware shutdown control | Forces open-circuit RH and shorts RW to RL; retains register state during sleep |
| VCC / GND | Power supply and ground | Operates from 2.7–5.5 V; EPAD must be soldered to GND plane for thermal performance |
Key Features
| Feature | Design Value |
|---|---|
| Quad independent DCPs | Four 50 kΩ, 128-tap potentiometers in one die - reduces board space vs discrete solutions |
| Non-volatile wiper recall | IVR registers retain last setting across power cycles - eliminates boot-time reinitialization |
| Make-before-break switching | Prevents open-circuit glitches during wiper transitions - critical for stable feedback loops |
| Integrated shutdown mode | Reduces current to ≤5 µA while preserving register contents - extends battery life |
| Matched DCP performance | ≤±2 LSB inter-channel matching (VMATCH/RMATCH) - enables consistent multi-channel biasing |
Applications
| Motor Control Feedback Tuning | Programmable Sensor Biasing |
|---|---|
|
Use Scenario: Adjusting gain and offset of Hall-effect current sensors in BLDC motor drives. IC Role / Device Role / Timing Role: Quad DCP provides independent, field-updatable trim for four-phase current sensing channels. Use Value: Enables factory and field calibration without hardware modification; 128-step resolution achieves <1% gain error correction. |
Use Scenario: Setting reference voltages for temperature-compensated pressure transducers. IC Role / Device Role / Timing Role: Acts as programmable voltage divider to generate precision bias points for analog front-end amplifiers. Use Value: Non-volatile storage maintains calibrated offsets after power loss; ±80 ppm/°C TCR ensures stability over -40°C to +125°C. |
| Industrial Power Supply Trim | Audio Channel Balance Control |
|
Use Scenario: Fine-tuning output voltage and current limit thresholds in isolated DC-DC modules. IC Role / Device Role / Timing Role: Replaces mechanical trimpots in feedback dividers and current-sense amplifier gain paths. Use Value: I²C interface allows remote recalibration via host MCU; shutdown mode cuts leakage during standby. |
Use Scenario: Implementing digital volume and balance control in professional audio mixers. IC Role / Device Role / Timing Role: Four DCPs serve as matched, low-noise attenuators for left/right channel pairs and subwoofer crossfeed. Use Value: 70 Ω wiper resistance minimizes signal degradation; monotonic DNL (<±0.5 LSB) prevents audible stepping artifacts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5242BRUZ100 | 100 kΩ total resistance, 256 taps, SPI interface, no non-volatile recall | Requires external EEPROM for power-up restore; higher resolution but wider resistance tolerance (±30%) | Choose when SPI is preferred and higher tap count justifies added complexity |
| MCP45HV51-503E/ST | 50 kΩ, 256 taps, I²C, 12-bit wiper register, integrated high-voltage tolerance (up to 36 V) | Supports direct connection to higher-voltage rails; lacks shutdown pin but offers extended voltage range | Choose for HV analog front-ends where ISL22346UFRT20Z's 5.5 V max would be limiting |
Compared with AD5242BRUZ100 and MCP45HV51-503E/ST, the ISL22346UFRT20Z uniquely combines guaranteed non-volatile recall, quad integration in TQFN, and automotive-grade temperature range - making it optimal for space-constrained, self-calibrating embedded systems requiring zero-boot-time configuration.
Availability
ISL22346UFRT20Z is available at Aetrix Electronics and suitable for industrial motor control, automotive sensor calibration, and programmable power supply design requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL22346UFRT20Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader formed from the merger of Renesas Technology and NEC Electronics, specializing in microcontrollers, analog, and power management ICs.
The ISL22346UFRT20Z belongs to Renesas' XDCP™ family of digitally controlled potentiometers, designed specifically for replacing mechanical trimpots in harsh-environment applications demanding reliability, programmability, and non-volatile retention.
FAQ
What is the package type and footprint compatibility of the ISL22346UFRT20Z?
The ISL22346UFRT20Z uses a 20-lead 4×4 mm TQFN package (pkg drawing L20.4x4A) with an exposed thermal pad internally connected to GND. It is not pin-compatible with the TSSOP variant (ISL22346UFV20Z), due to different pin numbering and thermal pad requirements. PCB layout must follow Renesas TB389 guidelines for EPAD grounding and solder stencil design.
Does the ISL22346UFRT20Z support true power-on recall of wiper positions?
Yes. The ISL22346UFRT20Z performs automatic power-on recall: when VCC rises above 2.0 V (min), the device loads the stored values from its non-volatile Initial Value Registers (IVRs) into the corresponding volatile Wiper Registers (WRs) within 3 ms. This ensures deterministic startup behavior without host MCU intervention.
Can the ISL22346UFRT20Z operate reliably at 125°C ambient temperature?
Yes. The ISL22346UFRT20Z is specified for operation from -40°C to +125°C ambient. Its thermal resistance (θJA = 40°C/W) and junction temperature limit (+150°C) allow sustained operation at +125°C ambient when properly mounted on a 4-layer board with GND-connected EPAD and adequate copper area.
How does shutdown mode affect the DCP terminals in the ISL22346UFRT20Z?
In shutdown mode (SHDN pin low or ACR[6] = 0), each DCP is configured as an open circuit between RH and RL, while RW is shorted to RL. This isolates the high-side terminal and grounds the wiper - preventing unintended current flow or loading in powered-down subsystems while preserving register contents.
What is the maximum I²C bus capacitance supported by the ISL22346UFRT20Z?
The ISL22346UFRT20Z supports up to 400 pF total bus capacitance (Cb) on SDA/SCL lines. With Cb = 400 pF, external pull-up resistors should be ≤2.5 kΩ to meet rise time (tR) and fall time (tF) specifications. For lower capacitance (e.g., 40 pF), pull-ups up to 20 kΩ are acceptable - enabling flexible bus sizing across mixed-load designs.
ISL22346UFRT20Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 4
- Number of Taps:
- 128
- Resistance (Ohms):
- 50k
- Interface:
- I2C
- Memory Type:
- Non-Volatile
- Voltage - Supply:
- 2.7V ~ 5.5V
- Features:
- Selectable Address
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- ±80ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-TQFN (4x4)
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL22346UFRT20Z FAQ
1.How can I place an order for ISL22346UFRT20Z through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL22346UFRT20Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL22346UFRT20Z reliable?
The price and inventory of ISL22346UFRT20Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL22346UFRT20Z is usually 5 days.
3.What payment methods are accepted for ISL22346UFRT20Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL22346UFRT20Z transactions.
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4.How is shipping managed for ISL22346UFRT20Z?
ISL22346UFRT20Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL22346UFRT20Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL22346UFRT20Z?
For technical support, including ISL22346UFRT20Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL22346UFRT20Z requirements.
6.How does Aetrix verify that ISL22346UFRT20Z is sourced from the original manufacturer or authorized distributors?
All ISL22346UFRT20Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL22346UFRT20Z meets industry standards.
7.What is the process for return or replacement of ISL22346UFRT20Z?
All ISL22346UFRT20Z units undergo pre-shipment inspection (PSI). If there is an issue with ISL22346UFRT20Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL22346UFRT20Z part is unused and in its original packaging.
Return procedure for ISL22346UFRT20Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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