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Renesas ISL23325UFRUZ-T7A
- Part No.:
- ISL23325UFRUZ-T7A
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 16-UFQFN
- Datasheet:
-
ISL23325UFRUZ-T7A.pdf
- Description:
- IC DGT POT 50KOHM 256TAP 16UTQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,978
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Product details
Overview
ISL23325UFRUZ-T7A from Renesas (formerly Intersil) is a dual, volatile, 256-tap digitally controlled potentiometer with I²C interface, 50kΩ total resistance, 16-lead µTQFN package, -40°C to +125°C operation, and independent 1.2V–5.5V VLOGIC supply. It serves as precision programmable voltage divider or rheostat in battery-powered sensor trimming and power supply margining circuits.
For engineers reviewing the ISL23325UFRUZ-T7A datasheet, ISL23325UFRUZ-T7A pinout, ISL23325UFRUZ-T7A application, or ISL23325UFRUZ-T7A equivalent, key selection criteria include wiper resistance (70Ω typ), shutdown mode behavior, DCP-to-DCP matching (±0.5 LSB), ratiometric temperature coefficient (4 ppm/°C), and I²C address flexibility (3 hardware pins).
Technical Context
The ISL23325UFRUZ-T7A integrates two independent DCP cores on a monolithic CMOS die, each with an 8-bit volatile wiper register (WR0/WR1) directly accessible via I²C. Wiper movement follows make-before-break switching, ensuring monotonic resistance transitions with ±0.15 LSB DNL (U option) and ±0.5 LSB INL in voltage divider mode.
Its dual-supply architecture separates analog power (VCC = 1.7V–5.5V) from logic power (VLOGIC = 1.2V–5.5V), enabling direct interfacing with low-voltage microcontrollers without level shifters. Shutdown mode forces end-to-end open circuit while internally connecting RW to RL through a 2kΩ resistor, reducing leakage and isolating the DCP network.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Total Resistance | 50kΩ - defines full-scale adjustment range for gain/offset tuning in sensor and amplifier circuits. |
| Wiper Resistance | 70Ω typical at VCC = 3.3V - limits insertion error and signal attenuation in precision voltage divider configurations. |
| Integral Non-linearity | ±0.5 LSB (voltage divider mode) - ensures <0.2% full-scale linearity error across 256 taps for calibration-critical applications. |
| Ratiometric Tempco | 4 ppm/°C - guarantees stable tap-to-tap ratio over -40°C to +125°C, critical for ratiometric sensor bridges. |
| Standby Current | 1.2µA at VCC = 1.7V / VLOGIC = 1.2V - enables multi-year battery life in always-on IoT sensor nodes. |
| Shutdown Leakage | <0.4µA on DCP pins - maintains high-impedance isolation during system sleep, preventing unintended bias path conduction. |
| I²C Address Pins | A0/A1/A2 - support up to eight devices on one bus, simplifying multi-channel calibration in modular instrumentation. |
Pinout & Package
ISL23325UFRUZ-T7A uses a 16-lead 2.6mm × 1.8mm µTQFN package (RoHS-compliant, e4 NiPdAu termination, MSL3). Pinout is validated per FN7870 Rev 1.00, Page 2 (µTQFN top view) and Page 3 (ordering table confirming L16.2.6x1.8A package drawing).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 6, 15) | Ground reference | Common return for analog and digital sections; must be low-impedance to minimize noise coupling into DCP terminals. |
| VLOGIC (Pin 16) | I²C logic supply | Enables 1.2V–5.5V bus compatibility; decoupling required near pin to suppress digital switching noise affecting wiper stability. |
| SDA (Pin 14) | I²C bidirectional data | Open-drain output requiring external pull-up; shares bus with up to seven other ISL23325s using A0–A2 address pins. |
| SCL (Pin 11) | I²C clock input | Accepts up to 400kHz clock; timing margins (tSU:STA = 600ns, tHD:STA = 600ns) constrain MCU GPIO drive strength and trace length. |
| A0–A2 (Pins 13, 12, 5) | Slave address inputs | Hardwired to VLOGIC or GND to set 3 LSBs of 7-bit I²C address (0x50–0x57); no floating states permitted. |
| RH0/RH1 (Pins 11, 3) | DCP0/DCP1 high terminal | Fixed end of resistor string; voltage must remain within 0–VCC to avoid latch-up or parametric degradation. |
| RL0/RL1 (Pins 13, 7) | DCP0/DCP1 low terminal | Fixed end referenced to GND or negative rail; sets lower bound of adjustable voltage range in divider mode. |
| RW0/RW1 (Pins 12, 9) | DCP0/DCP1 wiper | Programmable tap point; output impedance varies with position (70Ω typ at mid-scale); drives high-Z loads only. |
| VCC (Pin 8) | Analog power supply | 1.7V–5.5V analog rail; powers resistor array and wiper switches; independent of VLOGIC for mixed-supply systems. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 256-tap DCPs | Enables simultaneous calibration of two independent signal paths (e.g., differential sensor channels) with matched tempcos (±0.5 LSB matching). |
| VLOGIC = 1.2V support | Eliminates level shifters when interfacing with ultra-low-voltage MCUs (e.g., ARM Cortex-M0+ at 1.2V core), reducing BOM count and layout area. |
| Power-on reset to mid-scale | Guarantees known 25kΩ default resistance (for 50kΩ part) at startup, preventing undefined bias conditions in power-up sensitive circuits like RF amplifiers. |
| Shutdown mode | Disconnects DCP resistor string from circuit while preserving WR register state, enabling zero-power configuration storage during deep sleep. |
| Extended temperature range | -40°C to +125°C operation supports under-hood automotive, industrial motor control, and outdoor infrastructure deployments without derating. |
Applications
| Power Supply Margining | Sensor Circuit Trimming |
|---|---|
|
Use Scenario: Adjusting feedback voltage thresholds in DC-DC converters to validate tolerance margins during production test. IC Role / Device Role / Timing Role: Dual DCP acts as programmable resistor divider on FB pin, enabling automated sweep of ±5% output voltage deviation. Use Value: Replaces manual trim pots with repeatable, software-controlled calibration; 50kΩ resistance minimizes current draw from high-impedance FB node. |
Use Scenario: Compensating offset and gain drift in bridge-based pressure sensors across temperature. IC Role / Device Role / Timing Role: One DCP tunes zero-point offset (RW0–RL0 path), the other adjusts span (RW1–RH1 path) in real time via host MCU. Use Value: 4 ppm/°C ratiometric tempco ensures stable calibration over -40°C to +125°C; 0.5 LSB matching aligns dual-path corrections. |
| Battery-Powered Instrument Gain | RF Power Amplifier Bias |
|
Use Scenario: Setting programmable gain in portable oscilloscope front-end amplifiers with minimal standby power consumption. IC Role / Device Role / Timing Role: Configured as rheostat between op-amp feedback and ground, adjusting closed-loop gain without loading signal path. Use Value: 1.2µA standby current at 1.7V extends coin-cell battery life beyond 5 years; 70Ω wiper resistance avoids gain error in high-Z feedback networks. |
Use Scenario: Dynamically optimizing quiescent current in GaN RF PAs to balance efficiency vs. linearity across operating bands. IC Role / Device Role / Timing Role: DCP0 sets gate bias voltage (RW0–RL0), DCP1 adjusts source degeneration (RW1–RH1) for multi-point PA linearization. Use Value: 300ns large-signal settling enables fast band-switching calibration; shutdown mode isolates bias network during PA idle periods. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL23325TFRUZ-TK | Same 16-lead µTQFN package, identical pinout, but 100kΩ total resistance (vs. 50kΩ). | Higher resistance increases sensitivity to PCB leakage and parasitic capacitance; reduces wiper current capability (±3mA max). | Select when higher impedance interface is needed (e.g., high-Z sensor buffers); verify layout parasitics do not degrade 120kHz cutoff frequency. |
| AD5175BRMZ-50 | Single-channel, 256-tap, 50kΩ DCP in 10-lead MSOP; SPI interface (not I²C); 2.7–5.5V single supply (no VLOGIC pin). | Lacks dual-channel integration and independent logic supply; requires SPI host and level shifting for sub-2.7V controllers. | Choose for space-constrained designs needing only one DCP; avoid when dual-channel synchronization or 1.2V bus compatibility is required. |
Compared with ISL23325TFRUZ-TK and AD5175BRMZ-50, the ISL23325UFRUZ-T7A uniquely delivers dual 50kΩ DCPs with 1.2V I²C compatibility and shutdown isolation-enabling compact, low-power, multi-parameter calibration in battery-operated and automotive environments without interface translation.
Availability
ISL23325UFRUZ-T7A is available at Aetrix Electronics and suitable for power supply margining, sensor circuit trimming, battery-powered instrument gain adjustment, RF power amplifier bias compensation, and industrial temperature-compensated calibration requiring stable component supply across extended temperature ranges.
Supply support for ISL23325UFRUZ-T7A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains full technical and supply chain support for legacy Intersil precision analog products including the ISL23325 family.
The ISL23325 series was designed specifically for high-accuracy, low-power, software-configurable resistance tuning in battery-operated and thermally demanding applications-emphasizing dual-channel integration, wide supply flexibility, and robust I²C interoperability.
FAQ
What is the total resistance value of the ISL23325UFRUZ-T7A?
The ISL23325UFRUZ-T7A has a nominal total resistance of 50kΩ between RH and RL terminals for both integrated potentiometers. This value is confirmed in the Ordering Information table (Page 3 of FN7870) and Analog Specifications (Page 4), where "U option" corresponds to 50kΩ. Tolerance is ±2%, and end-to-end temperature coefficient is 65 ppm/°C.
Does the ISL23325UFRUZ-T7A retain wiper settings after power cycling?
No-the ISL23325UFRUZ-T7A is volatile: wiper registers (WR0 and WR1) reset to 128 (mid-scale) on every power-up, as stated in the datasheet "When powered on, the wiper of each DCP will always commence at mid-scale (128 tap position)." Non-volatile alternatives require external EEPROM or host MCU storage.
Can the ISL23325UFRUZ-T7A operate with VLOGIC = 1.2V and VCC = 5.5V simultaneously?
Yes-this dual-supply independence is a core feature. The datasheet specifies VLOGIC = 1.2V to 5.5V and VCC = 1.7V to 5.5V as separate, non-interdependent ranges. Page 1 confirms "VLOGIC allowing down to 1.2V bus operation, independent from the VCC value," enabling direct connection to 1.2V I²C masters while powering DCPs from 5.5V rails.
What is the maximum allowable wiper current for the ISL23325UFRUZ-T7A?
The absolute maximum wiper current is ±6mA for short durations (≤10 seconds), but the recommended operating limit is ±3mA under continuous operation, as specified in the Recommended Operating Conditions table (Page 4). Exceeding ±3mA risks parametric shift or long-term reliability degradation, especially at high temperatures.
How does shutdown mode affect the wiper terminals of the ISL23325UFRUZ-T7A?
In shutdown mode (SHDN bit = 0 in ACR register), each DCP is forced into end-to-end open circuit, and the wiper (RW) is internally connected to the low terminal (RL) through a 2kΩ resistor, as shown in Figure 25. This isolates the RH–RL path while maintaining a defined, high-impedance state at RW-preventing floating nodes in bias networks.
ISL23325UFRUZ-T7A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 16-UFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 256
- Resistance (Ohms):
- 50k
- Interface:
- I2C
- Memory Type:
- Volatile
- Voltage - Supply:
- 1.2V ~ 5.5V, 1.7V ~ 5.5V
- Features:
- Selectable Address
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 65ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-UTQFN (2.6x1.8)
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL23325UFRUZ-T7A FAQ
1.How can I place an order for ISL23325UFRUZ-T7A through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL23325UFRUZ-T7A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL23325UFRUZ-T7A reliable?
The price and inventory of ISL23325UFRUZ-T7A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL23325UFRUZ-T7A is usually 5 days.
3.What payment methods are accepted for ISL23325UFRUZ-T7A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL23325UFRUZ-T7A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL23325UFRUZ-T7A?
ISL23325UFRUZ-T7A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL23325UFRUZ-T7A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL23325UFRUZ-T7A?
For technical support, including ISL23325UFRUZ-T7A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL23325UFRUZ-T7A requirements.
6.How does Aetrix verify that ISL23325UFRUZ-T7A is sourced from the original manufacturer or authorized distributors?
All ISL23325UFRUZ-T7A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL23325UFRUZ-T7A meets industry standards.
7.What is the process for return or replacement of ISL23325UFRUZ-T7A?
All ISL23325UFRUZ-T7A units undergo pre-shipment inspection (PSI). If there is an issue with ISL23325UFRUZ-T7A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL23325UFRUZ-T7A part is unused and in its original packaging.
Return procedure for ISL23325UFRUZ-T7A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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