Renesas ISL23325WFVZ-TK
- Part No.:
- ISL23325WFVZ-TK
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ISL23325WFVZ-TK.pdf
- Description:
- IC DGT POT 10KOHM 256TAP 14TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL23325WFVZ-TK from Renesas Electronics is a dual, volatile, 256-tap digitally controlled potentiometer (DCP) with I²C interface, 10kΩ total resistance, ±2% end-to-end tolerance, and operation from 1.7V to 5.5V VCC and 1.2V to 5.5V VLOGIC. It delivers 70Ω typical wiper resistance at 3.3V and supports power supply margining in battery-powered instrumentation.
For engineers reviewing the ISL23325WFVZ-TK datasheet, ISL23325WFVZ-TK pinout, ISL23325WFVZ-TK application, or ISL23325WFVZ-TK equivalent, key selection criteria include dual-channel tap resolution, low-voltage I²C compatibility down to 1.2V, shutdown-mode open-circuit isolation, and extended industrial temperature range (-40°C to +125°C).
Technical Context
The ISL23325WFVZ-TK integrates two independent DCP cores on a monolithic CMOS die, each with an 8-bit volatile wiper register (WR0/WR1), make-before-break switching, and direct I²C addressability via A0–A2 pins. Its architecture enables simultaneous or independent control of both potentiometers without shared analog path interference.
It implements voltage-divider and rheostat modes with guaranteed monotonicity, ratiometric temperature coefficient as low as 8 ppm/°C (W option), and digital feed-through suppression of -65 dB. The VLOGIC pin decouples logic-level signaling from analog supply, enabling direct interfacing with 1.2V microcontrollers without level shifters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Total Resistance | 10kΩ - defines full-scale analog range for gain/offset adjustment in sensor front-ends and power supply feedback loops. |
| Tap Count | 256 - provides 0.39% resolution per step for precise calibration of reference voltages or amplifier bias points. |
| VCC Range | 1.7V to 5.5V - supports single-supply operation across Li-ion, USB, and industrial rail voltages without external regulators. |
| VLOGIC Range | 1.2V to 5.5V - enables native I²C communication with ultra-low-voltage MCUs (e.g., ARM Cortex-M0+) without translation circuitry. |
| Wiper Resistance | 70Ω typical @ 3.3V - minimizes loading error in high-impedance voltage divider configurations (e.g., ADC reference trimming). |
| Shutdown Current | 1.2µA @ VCC = 1.7V, VLOGIC = 1.2V - reduces system standby power in always-on battery devices such as portable medical monitors. |
| Temp Range | -40°C to +125°C - qualified for under-hood automotive sensors, industrial motor drives, and outdoor IoT edge nodes. |
Pinout & Package
ISL23325WFVZ-TK uses a 14-lead TSSOP package (RoHS-compliant, M14.173 drawing), with exposed pad not electrically connected. Pin functions are validated per FN7870 Rev 1.00 datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Ground reference | Common return path for analog and digital sections; must be low-impedance to minimize noise coupling between DCP channels. |
| VLOGIC (Pin 2) | I²C logic supply | Defines logic threshold for SDA/SCL; sets minimum bus voltage for reliable communication without level shifting. |
| SDA (Pin 3) | I²C bidirectional data | Open-drain output requiring external pull-up; carries device address, register pointer, and wiper data in standard I²C frame format. |
| SCL (Pin 4) | I²C clock input | Master-generated clock up to 400kHz; timing parameters (tLOW, tHIGH, tSU:STA) ensure robustness against PCB trace capacitance. |
| A0–A2 (Pins 5–7) | Slave address bits | Hardwired inputs selecting one of eight unique I²C addresses (0x50–0x57); enable multi-device daisy-chaining on shared bus. |
| RL1 (Pin 8) | DCP1 low terminal | Fixed end of second potentiometer; connects to ground or signal return in voltage divider mode. |
| RW1 (Pin 9) | DCP1 wiper | Movable contact position set by WR1 register; outputs interpolated voltage/resistance between RL1 and RH1. |
| RH1 (Pin 10) | DCP1 high terminal | Fixed end of second potentiometer; connects to VCC or reference voltage in voltage divider mode. |
| RH0 (Pin 11) | DCP0 high terminal | Fixed end of first potentiometer; used for gain-setting feedback in op-amp circuits or bias voltage generation. |
| RW0 (Pin 12) | DCP0 wiper | Movable contact position set by WR0 register; independently controllable from RW1 for dual-loop systems. |
| RL0 (Pin 13) | DCP0 low terminal | Fixed end of first potentiometer; ties to GND or signal source in rheostat or divider configurations. |
| VCC (Pin 14) | Analog supply | Power for resistor array and CMOS switches; independent of VLOGIC, allowing mixed-voltage system integration. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 256-tap DCPs | Enables independent calibration of two signal paths (e.g., differential sensor offset + gain) within one footprint, reducing BOM count and layout area. |
| Volatile wiper registers | WR0/WR1 reset to mid-scale (128) at power-on, ensuring predictable startup behavior without external initialization firmware. |
| Independent VLOGIC supply | Eliminates need for discrete level shifters when interfacing with 1.2V/1.8V microcontrollers, simplifying schematic design and improving signal integrity. |
| Shutdown mode | Forces end-to-end open circuit and connects RW to RL via 2kΩ resistor, isolating DCP from circuit during sleep-critical for leakage-sensitive battery apps. |
| Extended temp range | -40°C to +125°C operation ensures stable performance in automotive engine control units and industrial PLC analog I/O modules. |
Applications
| Power Supply Margining | Trimming Sensor Circuits |
|---|---|
Use Scenario: Adjusting feedback voltage thresholds in DC-DC converters to verify stability margins across voltage/temp corners during production test. IC Role / Device Role / Timing Role: Dual DCP acts as programmable resistor network in voltage divider leg of error amplifier feedback loop. Use Value: Enables automated, software-controlled margining without manual resistor changes-reducing test time and eliminating soldering errors. | Use Scenario: Compensating offset and sensitivity drift in MEMS pressure transducers used in HVAC and medical flow sensors. IC Role / Device Role / Timing Role: ISL23325WFVZ-TK provides precision rheostat-mode adjustment of bridge excitation current and amplifier gain in analog front-end. Use Value: Achieves <±0.5 LSB INL over -40°C to +125°C, meeting Class I medical sensor calibration requirements without factory recalibration. |
| Gain Adjustment in Battery-Powered Instruments | RF Power Amplifier Bias Compensation |
Use Scenario: Dynamically scaling gain of low-noise amplifiers in handheld spectrum analyzers to maintain SNR across varying input signal levels. IC Role / Device Role / Timing Role: ISL23325WFVZ-TK operates as voltage-controlled resistor in op-amp T-network configuration, modulated via I²C during measurement sweeps. Use Value: Delivers 16 nV/√Hz resistor noise density at mid-tap, preserving instrument dynamic range while enabling real-time gain optimization. | Use Scenario: Stabilizing quiescent current in GaN RF PAs subject to thermal drift across transmit duty cycles in 5G small cells. IC Role / Device Role / Timing Role: Dual DCP configures bias voltage dividers for gate drive and drain current sensing networks, updated dynamically based on temperature telemetry. Use Value: Maintains PA efficiency within ±3% over temperature using 8 ppm/°C ratiometric TCv, reducing thermal derating and extending battery life. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5242BRUZ10 | Single 256-tap DCP, 10kΩ, SPI interface, no VLOGIC pin, 2.7–5.5V only | Lacks dual-channel capability and 1.2V logic compatibility; requires level shifter for sub-2.7V MCUs | Select when SPI-native host exists and single-pot functionality suffices; avoid for dual-loop or ultra-low-voltage systems. |
| MCP45HV51-103E/MS | Dual 256-tap DCP, 10kΩ, I²C, 4.5–20V VDD, no separate VLOGIC, higher wiper R (120Ω) | Higher voltage rating suits industrial AC-DC supplies but incompatible with 1.2V logic; larger wiper resistance degrades precision in high-Z dividers | Prefer for high-voltage analog rails (>5.5V); not suitable for battery-powered 1.2V–3.3V systems where ISL23325WFVZ-TK's low-VLOGIC operation is essential. |
Compared with AD5242BRUZ10 and MCP45HV51-103E/MS, the ISL23325WFVZ-TK uniquely combines dual-channel control, 1.2V I²C compatibility, and 70Ω wiper resistance-making it optimal for space-constrained, multi-rail battery instruments requiring simultaneous calibration of sensor and power paths.
Availability
ISL23325WFVZ-TK is available at Aetrix Electronics and suitable for power supply margining, sensor trimming, battery-powered instrumentation, and RF amplifier bias compensation requiring stable component supply across automotive, industrial, and medical product lifecycles.
Supply support for ISL23325WFVZ-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader delivering microcontrollers, analog power, and connectivity solutions for automotive, industrial, and IoT markets.
The ISL23325 belongs to Renesas' XDCP™ (eXternally Digitally Controlled Potentiometer) family, designed specifically for precision, low-power, software-configurable analog tuning in battery-operated and thermally demanding environments.
FAQ
What is the default wiper position of ISL23325WFVZ-TK at power-on?
At power-on, both wiper registers (WR0 and WR1) of the ISL23325WFVZ-TK reset to 0x80 (128 decimal), positioning each wiper at mid-scale-i.e., 50% of total resistance between RL and RH terminals. This behavior is guaranteed across the full -40°C to +125°C temperature range and requires no firmware initialization.
Does ISL23325WFVZ-TK support true 1.2V I²C bus operation?
Yes, ISL23325WFVZ-TK supports I²C communication with VLOGIC as low as 1.2V, verified per FN7870 Rev 1.00. Its internal level shifter allows direct connection to 1.2V microcontrollers without external translators, and all timing parameters (tLOW, tHIGH, tSU:STA) remain compliant at this voltage.
How does shutdown mode affect the wiper position in ISL23325WFVZ-TK?
In shutdown mode (SHDN bit = 0 in ACR), ISL23325WFVZ-TK forces each DCP into end-to-end open circuit while connecting RW to RL via a 2kΩ internal resistor. Wiper register values (WR0/WR1) are retained, and wipers return to their pre-shutdown positions within 1.5µs after exit-no reprogramming required.
What is the maximum allowable wiper current for ISL23325WFVZ-TK?
The absolute maximum wiper current for ISL23325WFVZ-TK is ±6mA (10-second duration), but the recommended operating limit is ±3mA. Exceeding ±3mA risks increased wiper resistance drift and long-term reliability degradation, especially at elevated temperatures.
Can ISL23325WFVZ-TK be used in rheostat mode with only two terminals?
Yes, ISL23325WFVZ-TK supports rheostat mode by connecting either RH or RL to the wiper (RW) and leaving the other terminal unconnected. In this configuration, it functions as a two-terminal variable resistor with guaranteed monotonicity and ±1 MI DNL for the 10kΩ version at VCC ≥ 2.7V.
ISL23325WFVZ-TK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 256
- Resistance (Ohms):
- 10k
- Interface:
- I2C
- Memory Type:
- Volatile
- Voltage - Supply:
- 1.2V ~ 5.5V, 1.7V ~ 5.5V
- Features:
- Selectable Address
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 125ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 14-TSSOP
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL23325WFVZ-TK FAQ
1.How can I place an order for ISL23325WFVZ-TK through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL23325WFVZ-TK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL23325WFVZ-TK reliable?
The price and inventory of ISL23325WFVZ-TK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL23325WFVZ-TK is usually 5 days.
3.What payment methods are accepted for ISL23325WFVZ-TK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL23325WFVZ-TK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL23325WFVZ-TK?
ISL23325WFVZ-TK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL23325WFVZ-TK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL23325WFVZ-TK?
For technical support, including ISL23325WFVZ-TK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL23325WFVZ-TK requirements.
6.How does Aetrix verify that ISL23325WFVZ-TK is sourced from the original manufacturer or authorized distributors?
All ISL23325WFVZ-TK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL23325WFVZ-TK meets industry standards.
7.What is the process for return or replacement of ISL23325WFVZ-TK?
All ISL23325WFVZ-TK units undergo pre-shipment inspection (PSI). If there is an issue with ISL23325WFVZ-TK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL23325WFVZ-TK part is unused and in its original packaging.
Return procedure for ISL23325WFVZ-TK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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