Renesas ISL23328TFRUZ-T7A
- Part No.:
- ISL23328TFRUZ-T7A
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 16-UFQFN
- Datasheet:
-
ISL23328TFRUZ-T7A.pdf
- Description:
- IC DGTL POT 100KOHM 16UTQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,097
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL23328TFRUZ-T7A from Renesas (formerly Intersil) is a dual, volatile, 128-tap digitally controlled potentiometer (DCP) with I²C interface, 100kΩ total resistance, 16-pin UTQFN package, and extended industrial temperature range (–40°C to +125°C). It serves as programmable analog gain/offset adjustment in battery-powered instrumentation and power supply margining circuits.
For engineers reviewing the ISL23328TFRUZ-T7A datasheet, ISL23328TFRUZ-T7A pinout, ISL23328TFRUZ-T7A application, or ISL23328TFRUZ-T7A equivalent, key selection considerations include its dual-channel architecture, independent wiper registers, VLOGIC=1.2V–5.5V logic supply enabling direct low-voltage bus interfacing, shutdown mode with end-to-end open-circuit behavior, and guaranteed monotonicity in both voltage-divider and rheostat modes.
Technical Context
The ISL23328TFRUZ-T7A integrates two independent DCP cores on a monolithic CMOS die, each with an 8-bit volatile wiper register (WR0/WR1), make-before-break switching, and ratiometric temperature coefficient as low as 2.3 ppm/°C (T-option). Its I²C interface supports up to 400 kHz clock rate, three hardware address pins (A0–A2), and operates with VLOGIC decoupled from VCC - enabling direct connection to 1.2V microcontrollers without level shifters.
Each DCP functions as either a three-terminal potentiometer (RH–RW–RL) or two-terminal variable resistor (RW–RL or RW–RH), with wiper resistance of 70 Ω typical at VCC = 3.3 V and full-scale error ≤ –0.9 LSB for the 100kΩ variant. Power-on defaults both wipers to mid-scale (64 decimal), and shutdown mode disconnects RH while connecting RW to RL via internal 2 kΩ path.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Total Resistance | 100 kΩ - defines maximum end-to-end resistance for gain/offset scaling in sensor bias or amplifier feedback networks. |
| Wiper Resolution | 128 taps (7-bit) - enables fine-grained analog tuning with 0.78% step resolution across full scale. |
| VLOGIC Range | 1.2 V to 5.5 V - allows direct I²C interfacing with ultra-low-voltage MCUs (e.g., ARM Cortex-M0+) without external level translation. |
| Supply Current (Standby) | 1.2 µA @ VCC = 1.7 V / VLOGIC = 1.2 V - supports multi-year operation in energy-harvesting or coin-cell–powered systems. |
| Temperature Range | –40°C to +125°C - qualified for under-hood automotive, industrial motor control, and high-reliability embedded applications. |
| Wiper Settling Time | 3.5 µs (T-option) - ensures rapid reconfiguration during dynamic calibration sequences without signal disruption. |
| Integral Non-linearity | ±0.15 LSB - guarantees precision voltage division accuracy critical for closed-loop trimming in power supply DAC replacement. |
Pinout & Package
ISL23328TFRUZ-T7A is housed in a 16-lead, 2.6 mm × 1.8 mm, 0.5 mm pitch UTQFN package (Pb-free, RoHS compliant, MSL3). Pin 7 is NC (Not Connected); all other pins are electrically functional per datasheet FN7902 Rev 1.00.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Ground reference | Common return for analog (VCC) and digital (VLOGIC) supplies; must be low-impedance for noise-sensitive DCP operation. |
| VLOGIC | I²C logic supply | Independent 1.2–5.5 V rail powers SDA/SCL input buffers and address decoding logic; enables mixed-supply system integration. |
| SDA | I²C bidirectional data | Open-drain output/input requiring external pull-up; carries device address, register address, and wiper data. |
| SCL | I²C clock input | Open-drain input requiring external pull-up; synchronizes all read/write transfers to WR0/WR1/ACR registers. |
| A0–A2 | Slave address inputs | Hardwired to VLOGIC or GND to configure one of eight unique I²C addresses (0x50–0x57) on shared bus. |
| RH0, RL0, RW0 | DCP0 terminals | High/low/wiper connections for first potentiometer; support voltage-divider (RH0–RW0–RL0) or rheostat (RW0–RL0) configurations. |
| RH1, RL1, RW1 | DCP1 terminals | High/low/wiper connections for second independent potentiometer; identical electrical behavior to DCP0. |
| VCC | Analog supply | 1.7–5.5 V rail powers resistor array and CMOS switches; sets maximum DCP terminal voltage range (0 to VCC). |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent DCPs | Enables simultaneous gain and offset trimming in single-ended amplifiers or dual-path signal conditioning without inter-channel crosstalk. |
| VLOGIC/VCC supply separation | Eliminates need for external level shifters when interfacing with sub-1.8 V microcontrollers, reducing BOM count and PCB area. |
| Shutdown mode with RW–RL connection | Forces safe open-circuit state at RH terminals while maintaining known wiper-to-RL path - prevents floating nodes during sleep. |
| Monotonicity guarantee | Ensures no code-dependent glitches in analog output during wiper stepping - essential for closed-loop stability in feedback circuits. |
| Power-on reset to mid-scale | Guarantees predictable initial state (64/127) for both DCPs, avoiding startup transients in bias-sensitive RF or sensor front-ends. |
Applications
| Power Supply Margining | RF Power Amplifier Bias |
|---|---|
|
Use Scenario: Adjusting ±5% output voltage tolerance of DC–DC converters during production test and field calibration. IC Role / Device Role / Timing Role: Dual DCP replaces mechanical trimpots to set feedback divider ratios for VOUT regulation and current limit thresholds. Use Value: Enables automated, software-controlled margin testing without manual intervention; 100kΩ resistance matches standard feedback network impedances. |
Use Scenario: Compensating for process and temperature drift in GaN HEMT gate bias networks across operating temperature range. IC Role / Device Role / Timing Role: DCP1 sets quiescent current (IDQ) via source degeneration resistor; DCP0 adjusts gate voltage (VGS) for optimal linearity. Use Value: Achieves <±0.5 LSB INL over –40°C to +125°C, ensuring stable P1dB and ACPR performance without recalibration. |
| Sensor Circuit Trimming | Battery-Powered Instrument Gain |
|
Use Scenario: Nulling offset and scaling full-scale output of MEMS pressure sensors in portable medical devices. IC Role / Device Role / Timing Role: One DCP configures zero-adjust in Wheatstone bridge excitation; the other scales amplifier gain in instrumentation amplifier stage. Use Value: 1.2 µA standby current extends battery life in handheld diagnostics; VLOGIC=1.8 V compatibility enables direct connection to SoC GPIOs. |
Use Scenario: Calibrating gain of low-noise amplifiers in portable oscilloscopes and multimeters powered by Li-ion cells. IC Role / Device Role / Timing Role: DCP acts as programmable feedback resistor in transimpedance or non-inverting op-amp configuration. Use Value: 70 Ω typical wiper resistance minimizes gain error contribution; 128-tap resolution supports 0.1% calibration granularity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5170BRMZ-100 | Single-channel, SPI interface, 100kΩ, 10-lead MSOP; no VLOGIC/VCC separation; higher 5 µA standby current. | Lacks dual-channel capability and independent logic/analog supplies - requires level shifter for 1.2 V MCU buses. | Select when only one trim function is needed and SPI is preferred over I²C; avoid for dual-parameter calibration. |
| MCP45HV51-103E/MS | Dual-channel, I²C, 10kΩ (not 100kΩ); 12-bit resolution; 5.5 V max VDD; no VLOGIC pin - shares logic/analog supply. | Lower resistance value limits use in high-impedance feedback networks; lacks 1.2 V logic compatibility. | Choose for higher-resolution (4096-step) trimming where 10kΩ fits circuit topology and 1.2 V bus operation is unnecessary. |
Compared with AD5170BRMZ-100 and MCP45HV51-103E/MS, the ISL23328TFRUZ-T7A uniquely delivers dual 100kΩ DCPs with true 1.2 V logic compatibility and sub-2 µA standby current - making it optimal for space-constrained, ultra-low-power, dual-parameter calibration systems.
Availability
ISL23328TFRUZ-T7A is available at Aetrix Electronics and suitable for power supply margining, RF amplifier bias compensation, sensor trimming, and battery-powered instrument gain calibration requiring stable component supply across extended temperature ranges.
Supply support for ISL23328TFRUZ-T7A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation acquired Intersil in 2017 and maintains full product support, documentation, and manufacturing continuity for the ISL23328 family.
The ISL23328 product line was designed specifically for replacing mechanical potentiometers in high-reliability, low-power, and thermally demanding applications - emphasizing I²C configurability, supply flexibility, and guaranteed monotonic analog performance.
FAQ
What is the default wiper position of ISL23328TFRUZ-T7A at power-on?
At power-on, both wiper registers (WR0 and WR1) of the ISL23328TFRUZ-T7A reset to 64 decimal (0x40), positioning each wiper at mid-scale - i.e., 50 kΩ from RH and 50 kΩ from RL in a 100 kΩ DCP. This behavior is guaranteed across the full –40°C to +125°C temperature range and ensures predictable startup in calibration-critical systems.
Does ISL23328TFRUZ-T7A support true 1.2 V I²C bus operation?
Yes, ISL23328TFRUZ-T7A supports true 1.2 V I²C bus operation via its dedicated VLOGIC pin, which powers the SDA/SCL input buffers and address logic independently of VCC. The device meets I²C specification requirements down to 1.2 V VLOGIC, including VIH ≥ 0.7×VLOGIC and VOL ≤ 0.2×VLOGIC at 1.5 mA load - eliminating need for external level shifters.
Can ISL23328TFRUZ-T7A be used in rheostat mode?
Yes, ISL23328TFRUZ-T7A supports rheostat mode by connecting only RW and RL (or RW and RH) terminals while leaving the third terminal unconnected. In this configuration, it provides 128-step variable resistance from 0 Ω to 100 kΩ with guaranteed monotonicity and ±0.15 LSB differential non-linearity - validated for VCC = 1.7 V to 5.5 V.
What happens to the wiper position during ISL23328TFRUZ-T7A shutdown mode?
In shutdown mode (SHDN bit = 0 in ACR register), ISL23328TFRUZ-T7A forces RH terminals into high-impedance open-circuit while internally connecting RW to RL through a 2 kΩ resistor. The wiper register values (WR0/WR1) remain unchanged, and upon exit from shutdown, the wipers return to their pre-shutdown positions after ≤1.5 µs settling time - preserving calibration state.
Is ISL23328TFRUZ-T7A pin-compatible with other ISL23328 variants?
No - ISL23328TFRUZ-T7A uses a 16-lead UTQFN package (2.6 mm × 1.8 mm), whereas TSSOP variants (e.g., ISL23328TFVZ-T7A) use a 14-lead TSSOP package. Pin counts, layouts, thermal characteristics (θJA = 110°C/W vs. 112°C/W), and land patterns differ; PCB redesign is required when substituting between UTQFN and TSSOP versions of the ISL23328 family.
ISL23328TFRUZ-T7A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 16-UFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 128
- Resistance (Ohms):
- 100k
- Interface:
- I2C
- Memory Type:
- Volatile
- Voltage - Supply:
- 1.2V ~ 5.5V, 1.7V ~ 5.5V
- Features:
- Selectable Address
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 45ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-UTQFN (2.6x1.8)
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL23328TFRUZ-T7A FAQ
1.How can I place an order for ISL23328TFRUZ-T7A through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL23328TFRUZ-T7A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL23328TFRUZ-T7A reliable?
The price and inventory of ISL23328TFRUZ-T7A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL23328TFRUZ-T7A is usually 5 days.
3.What payment methods are accepted for ISL23328TFRUZ-T7A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL23328TFRUZ-T7A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL23328TFRUZ-T7A?
ISL23328TFRUZ-T7A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL23328TFRUZ-T7A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL23328TFRUZ-T7A?
For technical support, including ISL23328TFRUZ-T7A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL23328TFRUZ-T7A requirements.
6.How does Aetrix verify that ISL23328TFRUZ-T7A is sourced from the original manufacturer or authorized distributors?
All ISL23328TFRUZ-T7A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL23328TFRUZ-T7A meets industry standards.
7.What is the process for return or replacement of ISL23328TFRUZ-T7A?
All ISL23328TFRUZ-T7A units undergo pre-shipment inspection (PSI). If there is an issue with ISL23328TFRUZ-T7A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL23328TFRUZ-T7A part is unused and in its original packaging.
Return procedure for ISL23328TFRUZ-T7A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL23328TFRUZ-T7A Tags

-
MCP4018T-103E/LT
Microchip Technology

-
MCP4018T-503E/LT
Microchip Technology

-
MCP4011T-103E/SN
Microchip Technology

-
MCP4018T-104E/LT
Microchip Technology

-
MCP4017T-503E/LT
Microchip Technology

-
MCP4018T-502E/LT
Microchip Technology

-
MCP4017T-103E/LT
Microchip Technology

-
MCP4531T-103E/MF
Microchip Technology

-
MCP4021T-202E/SN
Microchip Technology

-
MCP4023T-103E/CH
Microchip Technology

-
MCP4022T-503E/CH
Microchip Technology

-
MCP4551T-502E/MS
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

