Renesas ISL23328TFVZ
- Part No.:
- ISL23328TFVZ
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ISL23328TFVZ.pdf
- Description:
- IC DGT POT 100KOHM 128TP 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,395
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Product details
Overview
ISL23328TFVZ from Renesas Electronics (formerly Intersil) is a dual, volatile, 128-tap digitally controlled potentiometer with I²C interface, 100kΩ end-to-end resistance, 14-lead TSSOP package, and extended industrial temperature range (–40°C to +125°C). It functions as two independent programmable resistive dividers for precision analog trimming in battery-powered instrumentation and power supply margining.
For engineers reviewing the ISL23328TFVZ datasheet, ISL23328TFVZ pinout, ISL23328TFVZ application, or ISL23328TFVZ equivalent, key selection considerations include its dual-channel architecture, 1.2V–5.5V VLOGIC independence, 70Ω typical wiper resistance at 3.3V, shutdown mode with internal RL connection, and guaranteed monotonicity in both voltage divider and rheostat modes.
Technical Context
The ISL23328TFVZ integrates two independent DCP cores on a monolithic CMOS die, each with an 8-bit volatile Wiper Register (WR0/WR1) directly accessible via I²C. Its "make-before-break" switch architecture ensures glitch-free wiper transitions, and power-on reset initializes both wipers to mid-scale (64 decimal).
It supports true dual-rail operation: VCC (1.7V–5.5V) powers the analog resistor array and DCP terminals, while VLOGIC (1.2V–5.5V) supplies the I²C logic and internal level shifter-enabling direct interfacing with low-voltage microcontrollers without external level translation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Total resistance | 100 kΩ - defines full-scale adjustment range for gain/offset trimming circuits |
| Taps per channel | 128 - provides 7.8 mV/LSB resolution in 3.3V divider applications |
| VLOGIC range | 1.2 V to 5.5 V - enables direct I²C connection to 1.2V/1.8V/3.3V/5V controllers |
| Wiper resistance | 70 Ω typical @ 3.3V - minimizes loading error in high-impedance feedback paths |
| Temp range | –40°C to +125°C - qualified for under-hood automotive and industrial control environments |
| Shutdown current | 1.2 µA @ VCC=1.7V/VLOGIC=1.2V - extends battery life in always-on sensor nodes |
| INL/DNL | ±0.15 LSB - ensures monotonic response critical for closed-loop calibration |
Pinout & Package
ISL23328TFVZ is housed in a Pb-free, RoHS-compliant 14-lead TSSOP package (M14.173), optimized for automated assembly and thermal performance (θJA = 112°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Ground reference | Common return for analog and digital sections; must be low-impedance |
| VLOGIC | Digital supply | Powers I²C interface and level shifter; independent of VCC |
| SDA | I²C bidirectional data | Open-drain; requires external pull-up to VLOGIC |
| SCL | I²C clock input | Open-drain; requires external pull-up to VLOGIC |
| A0–A2 | Slave address inputs | Hardwired to VLOGIC or GND; enable up to eight devices on one bus |
| RL0, RW0, RH0 | DCP0 terminals | Form first programmable divider: low/wiper/high |
| RL1, RW1, RH1 | DCP1 terminals | Form second independent divider; identical electrical behavior |
| VCC | Analog supply | Powers resistor array; sets max voltage across DCP terminals (0 to VCC) |
Key Features
| Feature | Design Value |
|---|---|
| Dual 128-tap DCPs | Enables simultaneous trimming of two signal paths (e.g., differential amplifier gain and offset) |
| VLOGIC-independent I²C | Eliminates need for external level shifters when interfacing with sub-1.8V MCUs |
| Power-on mid-scale preset | Guarantees known startup state (64/127) without host initialization delay |
| Shutdown mode | Forces open-circuit between RH–RL and connects RW to RL via 2kΩ, reducing system leakage |
| Monotonic INL/DNL | Ensures predictable, non-decreasing output during wiper sweeps-critical for calibration algorithms |
Applications
| Power Supply Margining | RF Power Amplifier Bias |
|---|---|
Use Scenario: Adjusting reference voltage to verify IC functional limits under over/under-voltage conditions during production test. IC Role / Device Role / Timing Role: Programmable voltage divider setting precise DC bias points on PMIC feedback networks. Use Value: Enables automated, software-controlled margining without manual resistor changes or rework. | Use Scenario: Dynamically compensating for temperature-induced drift in GaAs FET gate bias voltage. IC Role / Device Role / Timing Role: Two-terminal rheostat configuring bias current in RF PA driver stage. Use Value: Maintains stable output power across –40°C to +125°C with <2.3 ppm/°C ratiometric tempco (T-option). |
| Sensor Circuit Trimming | Battery-Powered Instrument Gain |
Use Scenario: Calibrating zero-point offset in MEMS pressure sensor signal chain before deployment. IC Role / Device Role / Timing Role: Three-terminal potentiometer nulling amplifier input offset in bridge-based sensing. Use Value: Achieves <±0.15 LSB linearity error, enabling sub-0.1% full-scale calibration accuracy. | Use Scenario: Scaling ADC input range in portable multimeter to match varying probe attenuation factors. IC Role / Device Role / Timing Role: Dual-channel DCP adjusting gain and offset of programmable-gain amplifier (PGA). Use Value: Delivers 100kΩ resistance with only 3µA standby current at 5V, extending battery runtime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5170BRMZ-100 | Single-channel, SPI interface, 100kΩ, 64-tap, no VLOGIC independence | Lacks dual-channel capability and 1.2V logic compatibility; requires level shifting for low-VIO MCUs | Choose when SPI interface is preferred and single-pot functionality suffices |
| MCP45HV51-103E/ST | Dual-channel, I²C, 10kΩ, 256-tap, 12V tolerant DCP terminals | Higher voltage rating (12V) but lower resistance value; no 100kΩ option available | Choose for higher-voltage analog rails (>5.5V) where 10kΩ matches circuit impedance needs |
Compared with AD5170BRMZ-100 and MCP45HV51-103E/ST, the ISL23328TFVZ uniquely combines dual 100kΩ channels, 1.2V–5.5V VLOGIC flexibility, and guaranteed monotonicity-making it optimal for space-constrained, multi-parameter trimming in ultra-low-power industrial systems.
Availability
ISL23328TFVZ is available at Aetrix Electronics and suitable for power supply margining, RF amplifier bias compensation, sensor trimming, and battery-powered instrument gain adjustment requiring stable component supply across extended temperature ranges.
Supply support for ISL23328TFVZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded design innovation, with heritage from Intersil's precision analog portfolio.
The ISL23328TFVZ belongs to Renesas' XDCP™ (eXternally Digitally Controlled Potentiometer) family, engineered for high-reliability analog parameter adjustment in automotive, industrial, and portable equipment where software-defined trimming replaces mechanical potentiometers.
FAQ
What is the default wiper position of ISL23328TFVZ at power-on?
At power-on, both wipers of the ISL23328TFVZ initialize to mid-scale (64 decimal, or 0x40 hex), ensuring a known, repeatable starting point for analog adjustments without host intervention. This behavior is hardwired and applies regardless of prior shutdown state or register contents.
Does ISL23328TFVZ support true 1.2V I²C bus operation?
Yes, ISL23328TFVZ supports I²C communication with VLOGIC as low as 1.2V while VCC operates independently from 1.7V to 5.5V. Its integrated level shifter eliminates external translation circuitry, enabling direct connection to 1.2V/1.8V microcontrollers without signal integrity loss.
Can ISL23328TFVZ be used in rheostat mode?
Yes, ISL23328TFVZ supports rheostat configuration by connecting either RH or RL to the same node as RW, leaving the unused terminal floating. In this mode, it delivers monotonic resistance variation (±0.15 MI) with 100kΩ total range and 70Ω typical wiper resistance at 3.3V.
What is the maximum allowable voltage on DCP terminals of ISL23328TFVZ?
The absolute maximum voltage on any DCP terminal (RH0, RL0, RW0, RH1, RL1, RW1) is limited to the VCC supply voltage-never exceeding VCC. The datasheet specifies that DCP terminal voltage must remain within 0 V to VCC under all operating and power-up conditions to prevent latch-up or parametric shift.
How does shutdown mode affect the wiper connections in ISL23328TFVZ?
In shutdown mode (SHDN bit = 0 in ACR), ISL23328TFVZ disconnects the internal resistor array between RH and RL, forcing an open circuit, while internally connecting each RW pin to its corresponding RL pin through a 2kΩ series resistor. This preserves bias paths while minimizing leakage current to 1.2 µA.
ISL23328TFVZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 128
- Resistance (Ohms):
- 100k
- Interface:
- I2C
- Memory Type:
- Volatile
- Voltage - Supply:
- 1.2V ~ 5.5V, 1.7V ~ 5.5V
- Features:
- Selectable Address
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 45ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 14-TSSOP
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL23328TFVZ FAQ
1.How can I place an order for ISL23328TFVZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL23328TFVZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL23328TFVZ reliable?
The price and inventory of ISL23328TFVZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL23328TFVZ is usually 5 days.
3.What payment methods are accepted for ISL23328TFVZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL23328TFVZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL23328TFVZ?
ISL23328TFVZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL23328TFVZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL23328TFVZ?
For technical support, including ISL23328TFVZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL23328TFVZ requirements.
6.How does Aetrix verify that ISL23328TFVZ is sourced from the original manufacturer or authorized distributors?
All ISL23328TFVZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL23328TFVZ meets industry standards.
7.What is the process for return or replacement of ISL23328TFVZ?
All ISL23328TFVZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL23328TFVZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL23328TFVZ part is unused and in its original packaging.
Return procedure for ISL23328TFVZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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