Renesas ISL23425TFVZ

Overview

ISL23425TFVZ from Renesas Electronics (formerly Intersil) is a dual, volatile, 256-tap digitally controlled potentiometer with SPI interface, 100kΩ total resistance, 1.7V–5.5V analog supply (VCC), and independent 1.2V–5.5V logic supply (VLOGIC). It delivers ±0.15 LSB integral nonlinearity in voltage divider mode and operates across –40°C to +125°C for precision trimming in battery-powered instrumentation and power supply margining.

For engineers reviewing the ISL23425TFVZ datasheet, ISL23425TFVZ pinout, ISL23425TFVZ application, or ISL23425TFVZ equivalent, key selection criteria include its 14-lead TSSOP package, mid-scale power-on reset (128), shutdown mode with end-to-end open circuit, wiper resistance of 70Ω typical at 3.3V, and daisy-chainable SPI bus supporting 1MHz (1.2V VLOGIC) to 5MHz (≥1.7V VLOGIC) operation.

Technical Context

The ISL23425TFVZ integrates two independent DCP cores on a monolithic CMOS die, each with an 8-bit volatile Wiper Register (WR0/WR1) directly accessible via SPI Mode 0. Wiper positioning uses make-before-break switching, ensuring monotonic resistance transitions between RH, RW, and RL terminals without signal interruption.

Its dual-supply architecture decouples analog (VCC) and digital (VLOGIC) domains: VLOGIC enables direct interfacing with 1.2V microcontrollers without level shifters, while VCC supports up to 5.5V DCP terminal voltages. Shutdown mode disconnects resistor arrays and internally shorts RW to RL through a 2kΩ path, reducing leakage and isolating downstream circuitry.

Key Specifications

Pinout & Package

ISL23425TFVZ is packaged in a 14-lead TSSOP (M14.173), RoHS-compliant, with exposed pad not electrically connected. Pin 7 is NC (Not Connected).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar digitally controlled potentiometer applications.

Compared with AD5242BRUZ100 and MCP42100-E/ST, the ISL23425TFVZ uniquely combines dual 100kΩ DCPs, true 1.2V–5.5V VLOGIC independence, hardware shutdown, and daisy-chain SPI-making it optimal for compact, low-power, multi-parameter calibration systems requiring minimal external components.

Availability

ISL23425TFVZ is available at Aetrix Electronics and suitable for power supply margining, sensor circuit trimming, battery-powered instrument gain adjustment, and RF power amplifier bias compensation requiring stable component supply across extended temperature ranges.

Supply support for ISL23425TFVZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation acquired Intersil in 2017 and maintains full product support, documentation, and manufacturing continuity for the ISL23425 series.

The ISL23425 product line delivers high-precision, low-voltage digitally controlled potentiometers optimized for automated calibration, power management, and sensor signal conditioning in automotive, industrial, and portable electronics.

FAQ

What is the default wiper position of the ISL23425TFVZ at power-up?

The ISL23425TFVZ powers up with both wiper registers (WR0 and WR1) preset to 0x80 (128 decimal), placing each wiper at mid-scale-exactly halfway between RH and RL terminals. This deterministic startup behavior ensures consistent initial gain or offset values without requiring host initialization, critical for fail-safe operation in power supply feedback and sensor bias circuits. The ISL23425TFVZ maintains this behavior regardless of VCC or VLOGIC ramp sequence.

Does the ISL23425TFVZ support daisy-chaining multiple devices on one SPI bus?

Yes, the ISL23425TFVZ supports daisy-chaining via its SPI interface: SCK, SDI, and CS lines can be shared across multiple devices, while each unit uses its own SDO output. This configuration reduces MCU GPIO count and simplifies routing in multi-channel systems like modular test equipment or multi-sensor nodes. The ISL23425TFVZ implements SPI Mode 0 (CPOL=0, CPHA=0) with rising-edge data capture and falling-edge output, ensuring timing compatibility across chained units.

What is the maximum allowable voltage on the DCP terminals (RH, RL, RW) of the ISL23425TFVZ?

The absolute maximum voltage on any DCP terminal (RH0, RL0, RW0, RH1, RL1, RW1) of the ISL23425TFVZ is limited to the VCC supply voltage-not to 6.0V as stated in Absolute Maximum Ratings. Per the datasheet's "Principles of Operation" and "Recommended Operating Conditions", DCP terminal voltage must remain within 0V to VCC at all times during power-up and normal operation. Exceeding VCC risks latch-up or permanent damage, even if below the 6.0V absolute max rating.

How does the shutdown mode function in the ISL23425TFVZ, and what happens to wiper settings?

In shutdown mode (enabled by setting SHDN bit in ACR), the ISL23425TFVZ forces both DCP arrays into an end-to-end open circuit and internally connects each RW terminal to its corresponding RL terminal through a 2kΩ resistor. Crucially, wiper register values (WR0/WR1) are retained in volatile memory. Upon exit from shutdown, the wipers restore to their pre-shutdown positions after a 1.5µs recall time (tShdnRec), ensuring seamless resumption of calibrated states without host reprogramming.

Can the ISL23425TFVZ operate with different supply voltages on VCC and VLOGIC simultaneously?

Yes, the ISL23425TFVZ is explicitly designed for independent VCC and VLOGIC supplies: VCC may range from 1.7V to 5.5V to power the analog DCP arrays, while VLOGIC may simultaneously range from 1.2V to 5.5V to drive the SPI interface. This separation allows direct interfacing with 1.2V logic families without level shifters-e.g., VLOGIC = 1.2V for an ultra-low-power MCU core while VCC = 3.3V powers a precision sensor signal chain. The ISL23425TFVZ validates this operation across its full –40°C to +125°C temperature range.