Renesas ISL23428TFRUZ-T7A
- Part No.:
- ISL23428TFRUZ-T7A
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 16-UFQFN
- Datasheet:
-
ISL23428TFRUZ-T7A.pdf
- Description:
- IC DGTL POT 100KOHM 16UTQFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,486
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Product details
Overview
ISL23428TFRUZ-T7A from Renesas (formerly Intersil) is a dual, volatile, 128-tap digitally controlled potentiometer with SPI interface, 100kΩ total resistance per channel, 1.2V–5.5V logic supply (VLOGIC), and -40°C to +125°C operation. It functions as two independent programmable resistive dividers or rheostats in battery-powered instrumentation, power supply margining, and sensor trimming circuits.
For engineers reviewing the ISL23428TFRUZ-T7A datasheet, ISL23428TFRUZ-T7A pinout, ISL23428TFRUZ-T7A application, or ISL23428TFRUZ-T7A equivalent, key selection criteria include its UTQFN-16 package, dual-channel wiper register control, shutdown mode behavior, 70Ω typical wiper resistance at 3.3V, and independent VLOGIC/VCC supplies enabling low-voltage microcontroller interfacing without level shifters.
Technical Context
The ISL23428TFRUZ-T7A integrates two monolithic DCP cores with make-before-break CMOS switch arrays and volatile 8-bit wiper registers (WR0/WR1), each directly readable/writable via SPI Mode 0. Its architecture supports voltage divider or rheostat configurations with guaranteed monotonicity and ±0.15 LSB INL/DNL over temperature.
It features independent analog (VCC = 1.7V–5.5V) and logic (VLOGIC = 1.2V–5.5V) supplies, enabling direct connection to 1.2V I/O systems. Shutdown mode forces end-to-end open circuit and internally connects RWi to RLi through a 2kΩ resistor, reducing leakage while preserving wiper register contents.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Total resistance | 100kΩ per channel - sets full-scale range for gain/offset adjustment in precision analog signal paths |
| Taps per channel | 128 - provides 7.8mV/LSB resolution in 1V span, enabling fine-grained calibration |
| VLOGIC range | 1.2V to 5.5V - allows direct SPI interface with ultra-low-voltage MCUs without external level translation |
| Wiper resistance | 70Ω typical @ 3.3V - minimizes insertion error in high-impedance feedback networks |
| Temp range | -40°C to +125°C - supports automotive under-hood and industrial motor control applications |
| Shutdown current | 1.2µA @ VCC=1.7V/VLOGIC=1.2V - enables multi-year battery life in always-on sensor nodes |
| Settling time | 300ns large-signal - ensures fast response during dynamic calibration sequences |
Pinout & Package
ISL23428TFRUZ-T7A is housed in a 16-lead 2.6mm × 1.8mm UTQFN package with wettable flanks, RoHS-compliant NiPdAu (e4) termination, and MSL3 rating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (pins 1, 5, 6, 15) | Ground reference | Four dedicated ground connections reduce ground bounce and improve noise immunity in dual-channel operation |
| VLOGIC (pin 2) | Digital supply | Independent 1.2V–5.5V rail powers SPI interface and control logic, decoupled from analog VCC |
| SDO (pin 3) | SPI data output | Configurable push-pull or open-drain output; tri-stated when CS is high for bus sharing |
| SCK (pin 4) | SPI clock input | Rising-edge sampled; supports up to 5MHz (≥1.7V) or 1MHz (1.2–1.6V) for timing-critical updates |
| SDI (pin 5) | SPI data input | Accepts instruction + data bytes; MSB-first protocol with address bits selecting WR0/WR1/ACR |
| CS (pin 6) | Chip select | Active-low enable; rising edge triggers wiper recall from shutdown; must be low before SCK activity |
| RL1 (pin 7) | DCP1 low terminal | Fixed end of second potentiometer; used with RH1/RW1 for 3-terminal divider or RW1-only for rheostat |
| RW1 (pin 8) | DCP1 wiper | Movable contact position set by WR1 register; 70Ω typical resistance enables low-error bias injection |
| RH1 (pin 9) | DCP1 high terminal | Fixed end referenced to VCC; voltage applied here defines upper rail for DCP1 divider function |
| RH0 (pin 10) | DCP0 high terminal | Fixed end of first potentiometer; electrically isolated from RH1 for independent channel operation |
| RW0 (pin 11) | DCP0 wiper | Position controlled by WR0 register; power-on default = 64 (mid-scale) ensures known startup state |
| RL0 (pin 12) | DCP0 low terminal | Fixed end tied to GND or reference; combined with RW0/RH0 forms complete DCP0 network |
| VCC (pin 13) | Analog supply | 1.7V–5.5V rail powers resistor array and switches; independent of VLOGIC for mixed-supply systems |
| SDO (pin 14) | SPI data output | Duplicate SDO pin (shared function) - supports layout routing flexibility in dense PCB designs |
| NC (pin 7) | No connect | Internally unconnected; must be left floating or tied to GND per design guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Dual 128-tap DCPs | Enables simultaneous gain/offset tuning in stereo audio or dual-sensor systems without inter-channel crosstalk |
| VLOGIC = 1.2V support | Eliminates level shifters when interfacing with 1.2V FPGA I/O banks or ultra-low-power MCUs |
| Volatile wiper registers | Allows runtime recalibration during system self-test; no nonvolatile write endurance limits or latency penalties |
| Shutdown mode | Reduces system standby power by disconnecting DCPs from signal path while retaining wiper positions |
| Make-before-break switching | Prevents momentary open-circuits during tap transitions, avoiding glitches in closed-loop control feedback |
Applications
| Power Supply Margining | Sensor Circuit Trimming |
|---|---|
Use Scenario: Adjusting reference voltage thresholds in DC-DC converter feedback loops to validate tolerance margins across voltage/temp corners. IC Role / Device Role / Timing Role: Dual-channel ISL23428TFRUZ-T7A acts as programmable voltage divider on upper/lower feedback resistors, enabling automated margin testing via SPI. Use Value: 100kΩ resistance and ±0.15 LSB linearity ensure <±1.5mV threshold error at 1.2V ref; 128 taps allow 12.5mV step resolution for granular stress testing. | Use Scenario: Calibrating offset and sensitivity drift in MEMS pressure sensors within automotive tire pressure monitoring systems (TPMS). IC Role / Device Role / Timing Role: ISL23428TFRUZ-T7A configures as two independent rheostats in sensor bridge excitation and amplifier gain paths. Use Value: -40°C to +125°C operation and 45ppm/°C end-to-end tempco maintain calibration stability; 70Ω wiper resistance avoids loading high-Z bridge outputs. |
| RF Power Amplifier Bias | Battery-Powered Instrument Gain |
Use Scenario: Dynamically compensating thermal drift in GaAs FET drain bias networks to maintain constant output power across temperature. IC Role / Device Role / Timing Role: ISL23428TFRUZ-T7A operates in voltage divider mode between VDD and GND to set gate bias voltage for RF PA stages. Use Value: 1.2V VLOGIC compatibility allows direct control from low-power baseband processor; 300ns settling enables real-time thermal compensation updates. | Use Scenario: Setting programmable gain in handheld multimeters or portable oscilloscopes powered by single-cell Li-ion batteries (2.7–4.2V). IC Role / Device Role / Timing Role: ISL23428TFRUZ-T7A serves as digital potentiometer in op-amp non-inverting gain stage, with WR0 controlling gain and WR1 adjusting offset null. Use Value: 1.7V minimum VCC supports operation down to depleted battery voltage; 4µA standby current extends battery life beyond 500 hours. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5242BRUZ100 | I²C interface only; no VLOGIC independence; 100kΩ, 256-tap; 3.3V/5V fixed logic supply | Requires level shifter for sub-1.8V controllers; lacks shutdown mode; higher resolution but slower update rate | Select when I²C bus is preferred and VLOGIC flexibility is unnecessary |
| MCP42100-E/ST | Single-channel only; SPI interface; 100kΩ, 257-tap; 2.7–5.5V single supply (no VLOGIC/VCC separation) | Cannot replace dual-channel functionality without board redesign; no independent logic supply for low-voltage MCU interfacing | Select for cost-sensitive single-channel applications where dual-channel capability is not required |
Compared with AD5242BRUZ100 and MCP42100-E/ST, the ISL23428TFRUZ-T7A uniquely supports dual-channel operation with independent 1.2V logic supply and hardware shutdown-critical for space-constrained, ultra-low-power, and thermally demanding embedded systems requiring simultaneous analog parameter control.
Availability
ISL23428TFRUZ-T7A is available at Aetrix Electronics and suitable for power supply margining, sensor trimming, RF amplifier bias compensation, and battery-powered instrument gain adjustment requiring stable component supply across extended temperature ranges.
Supply support for ISL23428TFRUZ-T7A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded design innovation, with origins in Intersil's precision analog portfolio.
The ISL23428 product line was designed for high-reliability, low-power analog tuning in automotive, industrial, and portable electronics-emphasizing supply independence, wide temperature operation, and robust SPI interface integrity.
FAQ
What is the default wiper position of ISL23428TFRUZ-T7A at power-up?
At power-up, both wiper registers (WR0 and WR1) of the ISL23428TFRUZ-T7A reset to 0x40 (64 decimal), positioning each wiper at mid-scale (50% of total resistance). This ensures a known, centered starting point for voltage divider or rheostat operation without requiring initialization firmware.
Does ISL23428TFRUZ-T7A support true 1.2V SPI communication?
Yes. The ISL23428TFRUZ-T7A accepts VLOGIC = 1.2V, enabling direct SPI communication with 1.2V I/O domains. Its input thresholds scale with VLOGIC (VIH = 0.7×VLOGIC), and it supports 1MHz SCK frequency at this voltage-verified per datasheet Section "Serial Interface Specification".
Can ISL23428TFRUZ-T7A be used in rheostat mode?
Yes. The ISL23428TFRUZ-T7A supports rheostat configuration by connecting either RH or RL to the signal path and using RW as the variable terminal (with the unused fixed terminal left open). Datasheet Sections "RHEOSTAT MODE" and "DCP Description" confirm monotonicity, INL/DNL, and resistance specs apply in this mode.
What happens to wiper positions during ISL23428TFRUZ-T7A shutdown mode?
During shutdown mode (SHDN bit = 0 in ACR), the ISL23428TFRUZ-T7A preserves current wiper register values (WR0/WR1) but disconnects the resistor array from the signal path. Each RW is internally shorted to its RL through a 2kΩ resistor, ensuring predictable high-impedance isolation without losing calibration state.
Is the ISL23428TFRUZ-T7A pinout compatible with other ISL23428 variants?
No. The ISL23428TFRUZ-T7A uses the 16-lead UTQFN package (L16.2.6x1.8A), while TSSOP variants (e.g., ISL23428TFVZ-T7A) use 14-lead TSSOP (M14.173). Pin counts, layouts, and thermal characteristics differ-PCB footprint and routing must be redesigned for package interchange.
ISL23428TFRUZ-T7A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 16-UFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 128
- Resistance (Ohms):
- 100k
- Interface:
- SPI
- Memory Type:
- Volatile
- Voltage - Supply:
- 1.2V ~ 5.5V, 1.7V ~ 5.5V
- Features:
- -
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 45ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-UTQFN (2.6x1.8)
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL23428TFRUZ-T7A FAQ
1.How can I place an order for ISL23428TFRUZ-T7A through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL23428TFRUZ-T7A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL23428TFRUZ-T7A reliable?
The price and inventory of ISL23428TFRUZ-T7A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL23428TFRUZ-T7A is usually 5 days.
3.What payment methods are accepted for ISL23428TFRUZ-T7A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL23428TFRUZ-T7A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL23428TFRUZ-T7A?
ISL23428TFRUZ-T7A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL23428TFRUZ-T7A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL23428TFRUZ-T7A?
For technical support, including ISL23428TFRUZ-T7A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL23428TFRUZ-T7A requirements.
6.How does Aetrix verify that ISL23428TFRUZ-T7A is sourced from the original manufacturer or authorized distributors?
All ISL23428TFRUZ-T7A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL23428TFRUZ-T7A meets industry standards.
7.What is the process for return or replacement of ISL23428TFRUZ-T7A?
All ISL23428TFRUZ-T7A units undergo pre-shipment inspection (PSI). If there is an issue with ISL23428TFRUZ-T7A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL23428TFRUZ-T7A part is unused and in its original packaging.
Return procedure for ISL23428TFRUZ-T7A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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