Renesas ISL23428TFRUZ-TK
- Part No.:
- ISL23428TFRUZ-TK
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 16-UFQFN
- Datasheet:
-
ISL23428TFRUZ-TK.pdf
- Description:
- IC DGTL POT 100KOHM 16UTQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,494
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Product details
Overview
ISL23428TFRUZ-TK from Renesas Electronics (formerly Intersil) is a dual, volatile, 128-tap digitally controlled potentiometer (DCP) with SPI interface, 100kΩ total resistance, 1.2V–5.5V logic supply (VLOGIC), and -40°C to +125°C operation. It integrates two independent DCP cores on a monolithic CMOS IC for precision analog trimming in battery-powered instrumentation and RF bias circuits.
For engineers reviewing the ISL23428TFRUZ-TK datasheet, ISL23428TFRUZ-TK pinout, ISL23428TFRUZ-TK application, or ISL23428TFRUZ-TK equivalent, this page delivers verified specifications, package mapping, wiper register behavior, shutdown functionality, and real-world use cases - all confirmed for the exact UTQFN-16 variant marked "GBR" and RoHS-compliant per ordering info.
Technical Context
The ISL23428TFRUZ-TK implements two independent resistor arrays (128 taps each) using CMOS switches in make-before-break configuration, controlled via an SPI Mode 0 interface with rising-edge input and falling-edge output. Each DCP features a volatile 8-bit Wiper Register (WR0/WR1) that defaults to 64 (mid-scale) at power-on.
It supports dual-supply operation: VCC (1.7V–5.5V) powers analog circuitry and DCP terminals, while VLOGIC (1.2V–5.5V) independently supplies logic and SPI interface - enabling direct connection to low-voltage microcontrollers without level shifters. Shutdown mode forces end-to-end open circuit and internally connects RW to RL via 2kΩ.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Total Resistance | 100kΩ - defines full-scale voltage divider range and sets current limits in rheostat mode. |
| Tap Count | 128 - provides 7.8mV/LSB resolution in 3.3V voltage divider mode (VCC = 3.3V, RH = VCC, RL = 0V). |
| VLOGIC Range | 1.2V to 5.5V - enables direct interfacing with 1.2V, 1.8V, 3.3V, or 5V logic without external level translation. |
| Wiper Resistance | 70Ω typical @ 3.3V - ensures minimal signal attenuation and predictable loading in precision gain-setting applications. |
| Shutdown Current | 1.2µA @ VCC = 1.7V, VLOGIC = 1.2V - reduces system standby power in always-on sensor or IoT edge nodes. |
| Temperature Range | -40°C to +125°C - qualified for under-hood automotive, industrial motor control, and harsh-environment power supply margining. |
| Package | 16-pin UTQFN (2.6mm × 1.8mm, 0.5mm pitch) - compact footprint for space-constrained portable and wearable designs. |
Pinout & Package
ISL23428TFRUZ-TK is housed in a 16-lead, 2.6mm × 1.8mm, 0.5mm-pitch UTQFN package (RoHS-compliant, NiPdAu e4 termination). Pin 1 is located at the bottom-left corner adjacent to the pin-1 marker (notch/dot), with pins numbered counter-clockwise.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1, 5, 6) | Ground reference | Three dedicated ground connections minimize ground bounce and improve noise immunity in dual-DCP operation. |
| VLOGIC (Pin 2) | Digital supply | Independent 1.2V–5.5V rail for SPI logic; decoupling required near pin to suppress digital switching noise. |
| SDO (Pin 3) | SPI data output | Configurable Push-Pull or Open-Drain (via ACR[1]); default is Push-Pull - no external pull-up needed unless shared bus. |
| SCK (Pin 4) | SPI clock input | Rising-edge sampled; max 5MHz @ VLOGIC ≥ 1.7V; timing-critical path requiring controlled impedance routing. |
| SDI (Pin 7) | SPI data input | Accepts instruction + data bytes (MSB-first); requires setup/hold times of ≥50ns relative to SCK. |
| CS (Pin 8) | Chip select | Active-low enable; CS high places device in standby (2µA ICC SB); CS rising edge triggers wiper recall from shutdown. |
| RL1 (Pin 9) | DCP1 low terminal | Fixed end of second potentiometer array; used as reference node in voltage divider or rheostat configurations. |
| RW1 (Pin 10) | DCP1 wiper | Movable terminal whose position is set by WR1 register; exhibits 70Ω typical resistance and <300ns large-signal settling. |
| RH1 (Pin 11) | DCP1 high terminal | Fixed end of second potentiometer array; tied to VCC or bias voltage depending on application topology. |
| RH0 (Pin 12) | DCP0 high terminal | Fixed end of first potentiometer array; electrically isolated from RH1 - supports independent biasing per channel. |
| RW0 (Pin 13) | DCP0 wiper | Movable terminal controlled by WR0 register; matches RW1 performance including monotonicity and TCV <2.3ppm/°C. |
| RL0 (Pin 14) | DCP0 low terminal | Fixed end of first potentiometer array; may be grounded, biased, or left floating depending on 2-/3-terminal usage. |
| VCC (Pin 15) | Analog supply | 1.7V–5.5V rail powering resistor arrays and wiper switches; must remain ≥ VLOGIC and within absolute max (-0.3V to 6.0V). |
| SDO (Pin 16) | SPI data output | Duplicate SDO pin (pin 3 and pin 16) - both are functional outputs; use either for layout flexibility or redundancy. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 128-tap DCPs | Enables simultaneous trimming of two independent analog paths (e.g., differential amplifier gain + offset) on one die. |
| Volatile wiper registers (WR0/WR1) | Allows dynamic runtime adjustment via SPI; power-on reset to 64 (mid-scale) ensures known startup state without EEPROM delay. |
| Independent VLOGIC supply | Eliminates need for level shifters when interfacing with 1.2V/1.8V MCUs - reduces BOM count and PCB area in ultra-low-power systems. |
| Shutdown mode with RW-to-RL short | Reduces leakage and isolates DCP from signal path; internal 2kΩ resistor prevents floating wiper during power-down sequences. |
| ±0.15 LSB DNL / ±0.15 LSB INL | Guarantees monotonicity and linearity across full temperature range - critical for closed-loop calibration and sensor linearization. |
| 100kΩ end-to-end resistance tolerance ±2% | Minimizes unit-to-unit variation in gain-setting networks, reducing post-production calibration effort in high-volume manufacturing. |
Applications
| Power Supply Margining | RF Power Amplifier Bias Compensation |
|---|---|
|
Use Scenario: Adjusting feedback resistors in DC-DC converter error amplifiers to validate stability margins across voltage/temp corners. IC Role / Device Role / Timing Role: Dual DCP replaces mechanical trimpots to enable automated, software-controlled margin testing during production burn-in. Use Value: Eliminates manual calibration; achieves ±0.5% output voltage accuracy over -40°C to +125°C with 100kΩ matching (±0.5 LSB). |
Use Scenario: Dynamically tuning gate bias voltage of GaN HEMTs to maintain optimal efficiency across temperature and aging drift. IC Role / Device Role / Timing Role: ISL23428TFRUZ-TK acts as programmable voltage divider feeding bias FET gate, updated via SPI during thermal compensation routines. Use Value: Enables real-time bias correction with <300ns wiper settling; 70Ω wiper resistance avoids signal distortion in high-frequency bias paths. |
| Trimming Sensor Circuits | Gain Adjustment in Battery-Powered Instruments |
|
Use Scenario: Nulling offset in bridge-based pressure sensors using a 3-terminal potentiometer configuration. IC Role / Device Role / Timing Role: One DCP channel (RH0/RL0/RW0) forms adjustable offset null network; second channel (RH1/RL1/RW1) sets excitation current scaling. Use Value: Achieves <±10µV offset trim resolution at 3.3V; 1.2V VLOGIC support allows direct connection to low-power sensor MCU without extra regulators. |
Use Scenario: Calibrating gain of handheld multimeter front-end amplifiers during factory test and field recalibration. IC Role / Device Role / Timing Role: ISL23428TFRUZ-TK serves as precision programmable gain resistor in transimpedance or non-inverting amplifier feedback loop. Use Value: Delivers 0.01% gain accuracy over life; 4µA standby current extends battery life in devices operating >1000 hours on coin-cell power. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5242BRUZ100 | Non-volatile EEPROM storage; 256 taps; I²C interface; 100kΩ; TSSOP-16 package. | Retains wiper position after power cycle; lacks VLOGIC independence (VDD only 2.7–5.5V); slower write endurance (100k cycles). | Select AD5242BRUZ100 when persistent settings are required and I²C is preferred; avoid if 1.2V logic compatibility or fast SPI updates are needed. |
| MCP42050-I/ST | Volatile dual DCP; 256 taps; SPI interface; 50kΩ; TSSOP-14 package; no separate VLOGIC pin. | Higher resolution (256 vs 128 taps); lower resistance value; shares VDD for analog/digital; not rated for 125°C operation. | Choose MCP42050-I/ST for cost-sensitive, room-temperature applications needing finer granularity; reject for extended temp or 1.2V logic systems. |
Compared with AD5242BRUZ100 and MCP42050-I/ST, the ISL23428TFRUZ-TK uniquely combines 1.2V logic compatibility, extended temperature rating, and matched dual-channel performance - making it optimal for automotive-grade trimming where power-on repeatability and thermal robustness are mandatory.
Availability
ISL23428TFRUZ-TK is available at Aetrix Electronics and suitable for power supply margining, RF bias compensation, sensor trimming, and battery-powered instrument calibration requiring stable component supply across automotive, industrial, and medical design cycles.
Supply support for ISL23428TFRUZ-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded solutions, acquired Intersil in 2017 and maintains full product support for legacy Intersil analog portfolio.
The ISL23428 series was designed specifically for high-precision, low-power analog trimming in harsh environments - targeting automotive subsystems, industrial sensors, and portable test equipment where reliability and wide temperature operation are critical.
FAQ
What is the default wiper position of the ISL23428TFRUZ-TK at power-on?
At power-on, both wiper registers (WR0 and WR1) of the ISL23428TFRUZ-TK reset to 40h (64 decimal), positioning each wiper precisely at mid-scale - i.e., 50kΩ from RH and 50kΩ from RL in the 100kΩ device. This behavior is guaranteed across the full -40°C to +125°C range and eliminates uncertainty in startup conditions for safety-critical trimming applications.
Does the ISL23428TFRUZ-TK support true 1.2V SPI communication?
Yes - the ISL23428TFRUZ-TK supports full SPI functionality down to 1.2V on its dedicated VLOGIC pin, with specified timing (1MHz SCK max) and logic thresholds (VIH = 0.7×VLOGIC, VIL = 0.3×VLOGIC). This allows direct connection to 1.2V-core microcontrollers without level shifters, unlike many competing DCPs that require minimum 1.7V or higher logic supplies.
Can the ISL23428TFRUZ-TK be used in rheostat mode?
Yes - the ISL23428TFRUZ-TK supports both 3-terminal potentiometer and 2-terminal rheostat configurations. In rheostat mode (e.g., RW0 to RL0 with RH0 open), it delivers ±0.15 MI DNL and 100kΩ resistance with ±2% tolerance. The wiper resistance remains 70Ω typical, ensuring predictable insertion loss in current-setting applications.
What happens to the wiper position during shutdown mode of the ISL23428TFRUZ-TK?
During shutdown (SHDN bit = 0 in ACR), the ISL23428TFRUZ-TK forces each DCP into end-to-end open circuit while internally connecting RWi to RLi through a 2kΩ resistor. Critically, the WR0 and WR1 register values are retained in volatile memory, so wipers return to their pre-shutdown positions within 1.5µs after SHDN release - preserving calibration state across low-power sleep cycles.
Is the ISL23428TFRUZ-TK pin-compatible with other ISL23428 variants?
No - the ISL23428TFRUZ-TK uses a 16-lead UTQFN package (2.6mm × 1.8mm), whereas TSSOP variants (e.g., ISL23428TFVZ-TK) use 14-lead TSSOP. Pin counts, layouts, and thermal characteristics differ significantly; PCB redesign is required when migrating between these packages. Always verify package drawing L16.2.6x1.8A for ISL23428TFRUZ-TK.
ISL23428TFRUZ-TK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 16-UFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 128
- Resistance (Ohms):
- 100k
- Interface:
- SPI
- Memory Type:
- Volatile
- Voltage - Supply:
- 1.2V ~ 5.5V, 1.7V ~ 5.5V
- Features:
- -
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 45ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-UTQFN (2.6x1.8)
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL23428TFRUZ-TK FAQ
1.How can I place an order for ISL23428TFRUZ-TK through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL23428TFRUZ-TK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL23428TFRUZ-TK reliable?
The price and inventory of ISL23428TFRUZ-TK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL23428TFRUZ-TK is usually 5 days.
3.What payment methods are accepted for ISL23428TFRUZ-TK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL23428TFRUZ-TK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL23428TFRUZ-TK?
ISL23428TFRUZ-TK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL23428TFRUZ-TK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL23428TFRUZ-TK?
For technical support, including ISL23428TFRUZ-TK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL23428TFRUZ-TK requirements.
6.How does Aetrix verify that ISL23428TFRUZ-TK is sourced from the original manufacturer or authorized distributors?
All ISL23428TFRUZ-TK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL23428TFRUZ-TK meets industry standards.
7.What is the process for return or replacement of ISL23428TFRUZ-TK?
All ISL23428TFRUZ-TK units undergo pre-shipment inspection (PSI). If there is an issue with ISL23428TFRUZ-TK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL23428TFRUZ-TK part is unused and in its original packaging.
Return procedure for ISL23428TFRUZ-TK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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