Renesas ISL23428WFRUZ-T7A
- Part No.:
- ISL23428WFRUZ-T7A
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 16-UFQFN
- Datasheet:
-
ISL23428WFRUZ-T7A.pdf
- Description:
- IC DGT POT 10KOHM 128TAP 16UTQFN
- Quantity:
- Payment:

- Shipping:

Inventory:250
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Product details
Overview
ISL23428WFRUZ-T7A from Renesas (formerly Intersil) is a dual, volatile, 128-tap digitally controlled potentiometer (DCP) with SPI interface, 10kΩ total resistance per channel, 16-pin UTQFN package, and operation from 1.7V VCC / 1.2V VLOGIC - used for precision gain/offset trimming in battery-powered instrumentation and RF bias control.
For engineers reviewing the ISL23428WFRUZ-T7A datasheet, ISL23428WFRUZ-T7A pinout, ISL23428WFRUZ-T7A application, or ISL23428WFRUZ-T7A equivalent, key selection criteria include wiper settling time (0.4 µs), ratiometric temperature coefficient (8 ppm/°C), shutdown mode behavior, dual-channel matching (±0.5 LSB), and independent logic/analog supply rails.
Technical Context
The ISL23428WFRUZ-T7A integrates two independent DCP cores on a monolithic CMOS die, each with an 8-bit volatile wiper register (WR0/WR1) directly accessible via SPI Mode 0. Wiper positioning uses make-before-break CMOS switches across 128 resistor taps, ensuring monotonicity and glitch-free transitions.
It features dual power domains: VCC (1.7–5.5V) powers analog DCP elements and wiper circuitry, while VLOGIC (1.2–5.5V) supplies SPI logic and internal level translation - enabling direct interfacing with 1.2V microcontrollers without external level shifters. Shutdown mode disconnects RH/RL paths and shorts RW to RL via 2kΩ.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Total Resistance | 10kΩ per DCP channel - sets full-scale voltage divider range and current-handling capability in sensor biasing or amplifier gain networks. |
| Wiper Settling Time | 0.4 µs (W option) - enables fast dynamic adjustment in closed-loop RF power amplifier bias compensation. |
| Ratiometric Tempco | 8 ppm/°C at tap 0x40 - ensures stable voltage division ratio over -40°C to +125°C, critical for precision trimming in automotive/industrial sensors. |
| VLOGIC Range | 1.2V to 5.5V - allows native interfacing with ultra-low-voltage MCUs (e.g., ARM Cortex-M0+) without level-shifting circuitry. |
| Standby Current | 0.5 µA @ VLOGIC=1.2V/VCC=1.7V - extends battery life in always-on portable medical or IoT endpoint devices. |
| Wiper Resistance | 70 Ω typical @ 3.3V - minimizes loading error when used as variable resistor in high-impedance feedback paths. |
| INL/DNL | ±0.15 LSB (guaranteed monotonic) - supports accurate 8-bit resolution in calibration routines requiring linearity-critical digital trimming. |
Pinout & Package
ISL23428WFRUZ-T7A is housed in a 16-lead 2.6 mm × 1.8 mm UTQFN package (RoHS-compliant, e4 NiPdAu termination), thermally optimized for high-density PCB layouts with θJA = 110°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1, 5, 6, 15) | Ground reference | Four dedicated ground pins reduce impedance and improve noise immunity in dual-channel operation. |
| VLOGIC (Pin 2) | Digital supply | Independent 1.2–5.5V rail powers SPI interface and internal logic - decouples MCU I/O voltage from analog DCP domain. |
| SDO (Pin 3) | SPI data output | Configurable push-pull or open-drain output; tri-states when CS is high - supports daisy-chained multi-DCP buses. |
| SCK (Pin 4) | SPI clock input | Accepts up to 5 MHz clock (≥1.7V VLOGIC); timing-critical for wiper update latency in real-time control loops. |
| SDI (Pin 5) | SPI data input | Receives instruction + data bytes on rising SCK edge; supports write-to-WR0/WR1 or ACR configuration. |
| CS (Pin 6) | Chip select | Active-low enable; falling edge initiates SPI transaction; rising edge triggers wiper settling and shutdown exit recovery. |
| RL1 (Pin 7) | DCP1 low terminal | Fixed end of second potentiometer array - connects to ground or signal return in rheostat/voltage divider modes. |
| RW1 (Pin 8) | DCP1 wiper | Movable terminal controlled by WR1 register; delivers programmable voltage/current in sensor offset or PA bias circuits. |
| RH1 (Pin 9) | DCP1 high terminal | Fixed end of second potentiometer array - ties to VCC or reference voltage in standard three-terminal use. |
| RH0 (Pin 10) | DCP0 high terminal | Fixed end of first potentiometer - used in dual-gain amplifier topologies where both channels share common reference. |
| RW0 (Pin 11) | DCP0 wiper | Primary adjustable node for front-end signal conditioning; matched to RW1 within ±0.5 LSB for differential applications. |
| RL0 (Pin 12) | DCP0 low terminal | Common low-side connection point; enables simultaneous dual-channel trimming without inter-channel crosstalk. |
| VCC (Pin 13) | Analog supply | 1.7–5.5V rail powers resistor array and wiper switches - sets maximum DCP terminal voltage and noise floor. |
| SDO (Pin 14) | SPI data output | Redundant SDO pin (same function as Pin 3) - supports layout flexibility in tight routing scenarios. |
| NC (Pin 7) | No connect | Internally unconnected pad - must remain floating or grounded per layout guidelines to avoid parasitic coupling. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 128-tap DCPs | Enables synchronized gain/offset adjustment in stereo audio paths or differential sensor front-ends without discrete component matching. |
| Volatile wiper registers (WR0/WR1) | Allows runtime recalibration during system operation; power-on defaults to mid-scale (64) ensure safe startup in margining applications. |
| Independent VLOGIC/VCC rails | Eliminates level-shifter components when interfacing with sub-1.8V MCUs - reduces BOM count and board area in space-constrained wearables. |
| Shutdown mode with RW-to-RL short | Forces open-circuit between RH/RL while grounding RW through 2kΩ - prevents unintended bias injection during sleep states in battery-powered systems. |
| ±0.5 LSB DCP-to-DCP matching | Supports high-accuracy differential measurements (e.g., bridge sensor readouts) where channel-to-channel tracking is essential. |
| 1.2V minimum logic supply | Validates compatibility with latest ultra-low-power microcontrollers (e.g., Silicon Labs EFM32, TI MSP430FRxx) operating at 1.2V core voltage. |
Applications
| Power Supply Margining | RF Power Amplifier Bias |
|---|---|
Use Scenario: Adjusting output voltage setpoints of DC-DC converters during production test to verify tolerance margins under load and temperature stress. IC Role / Device Role / Timing Role: Dual DCP acts as digitally programmable feedback divider for voltage-mode controllers, with one channel trimming upper resistor and the other lower resistor. Use Value: Enables automated margin testing without manual resistor swaps; 10kΩ resistance and 0.4 µs settling support rapid step-response validation across 128 discrete setpoints. | Use Scenario: Dynamically compensating for temperature-induced gain drift in GaAs RF PAs used in 5G small-cell base stations. IC Role / Device Role / Timing Role: ISL23428WFRUZ-T7A configures bias current via voltage-controlled current source topology, with wiper position updated by FPGA-based thermal lookup table. Use Value: 8 ppm/°C ratiometric tempco maintains stable bias point across -40°C to +125°C; dual-channel matching ensures consistent performance in MIMO antenna arrays. |
| Sensor Circuit Trimming | Battery-Powered Instrument Gain |
Use Scenario: Calibrating zero-offset and span of MEMS pressure sensors in portable medical devices before shipment. IC Role / Device Role / Timing Role: Used in Wheatstone bridge completion network, where WR0 adjusts bridge imbalance and WR1 scales amplifier gain for full-scale output alignment. Use Value: ±0.15 LSB INL/DNL guarantees <0.06% full-scale error after calibration; 0.5 µA standby current preserves battery charge during storage and field deployment. | Use Scenario: Setting programmable gain in handheld multimeters or portable oscilloscopes powered by single-cell Li-ion batteries. IC Role / Device Role / Timing Role: Configures non-inverting op-amp feedback network to support 1×, 10×, and 100× gain ranges via SPI commands from embedded MCU. Use Value: 1.2V VLOGIC compatibility allows direct connection to 1.2V MCU GPIOs; 70 Ω wiper resistance minimizes gain error in high-Z feedback paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5242BRUZ10 | I²C interface only; no VLOGIC/VCC separation; 10kΩ, 256-tap; 3.3V min VDD; higher 300 µA active current | Lacks independent logic supply - requires level shifter for 1.2V MCUs; slower 5 µs wiper response limits RF bias use | Choose AD5242BRUZ10 only if I²C bus is mandatory and 1.2V MCU interfacing is not required. |
| MCP42010-I/ST | Single-channel; SPI interface; 10kΩ, 256-tap; 2.7–5.5V single supply; no shutdown mode; 100 µA active current | Cannot replace dual-channel functionality without adding second device; missing RW-to-RL short in shutdown increases system-level leakage risk | Select MCP42010-I/ST only for cost-sensitive single-channel designs where dual-channel integration is unnecessary. |
Compared with AD5242BRUZ10 and MCP42010-I/ST, the ISL23428WFRUZ-T7A uniquely delivers dual 128-tap DCPs with true 1.2V logic compatibility, sub-µA standby, and hardware shutdown - making it optimal for space-constrained, battery-operated systems requiring coordinated analog parameter control.
Availability
ISL23428WFRUZ-T7A is available at Aetrix Electronics and suitable for power supply margining, RF amplifier biasing, sensor trimming, and portable instrument gain control requiring stable component supply across industrial temperature ranges.
Supply support for ISL23428WFRUZ-T7A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and continues to manufacture and support its precision analog portfolio, including digitally controlled potentiometers.
The ISL23428WFRUZ-T7A belongs to Renesas' XDCP™ (eXternally Digitally Controlled Potentiometer) family, designed specifically for replacing mechanical trimpots in automated calibration, adaptive biasing, and low-power portable electronics.
FAQ
What is the power-up default wiper position for the ISL23428WFRUZ-T7A?
At power-up, both wiper registers (WR0 and WR1) reset to 0x40 (64 decimal), placing each wiper at the mid-scale position - i.e., 50% of total resistance between RH and RL terminals. This ensures predictable, safe startup behavior in voltage divider and rheostat configurations without requiring initialization firmware.
Does the ISL23428WFRUZ-T7A support daisy-chaining multiple devices on a single SPI bus?
Yes, the ISL23428WFRUZ-T7A supports daisy-chaining via its SDO pin, which can be configured as push-pull or open-drain output. When configured for open-drain operation (via ACR[1]), multiple ISL23428WFRUZ-T7A devices can share a common SDO line with external pull-up, reducing GPIO count in systems requiring >2 DCP channels.
What is the maximum allowable wiper current for the ISL23428WFRUZ-T7A?
The absolute maximum wiper current for the ISL23428WFRUZ-T7A is ±6mA for 10 seconds, but the recommended operating limit is ±3mA. Exceeding ±3mA risks increased wiper resistance drift and long-term reliability degradation, especially at elevated temperatures or high tap positions where current density concentrates.
How does the shutdown mode affect the DCP terminals in the ISL23428WFRUZ-T7A?
In shutdown mode (SHDN bit = 0 in ACR), each DCP channel is forced into an end-to-end open circuit between RH and RL, while the wiper (RW) is internally connected to RL through a 2kΩ series resistor. This prevents signal injection during sleep states and eliminates static current draw through the resistor array.
Can the ISL23428WFRUZ-T7A operate with VLOGIC = 1.2V and VCC = 1.7V simultaneously?
Yes, the ISL23428WFRUZ-T7A is fully specified to operate with VLOGIC = 1.2V and VCC = 1.7V concurrently. At these voltages, it draws only 0.5 µA VLOGIC standby current and 1.2 µA VCC standby current, making it ideal for energy-harvesting or coin-cell-powered systems where minimizing quiescent power is critical.
ISL23428WFRUZ-T7A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 16-UFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 128
- Resistance (Ohms):
- 10k
- Interface:
- SPI
- Memory Type:
- Volatile
- Voltage - Supply:
- 1.2V ~ 5.5V, 1.7V ~ 5.5V
- Features:
- -
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 125ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-UTQFN (2.6x1.8)
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL23428WFRUZ-T7A FAQ
1.How can I place an order for ISL23428WFRUZ-T7A through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL23428WFRUZ-T7A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL23428WFRUZ-T7A reliable?
The price and inventory of ISL23428WFRUZ-T7A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL23428WFRUZ-T7A is usually 5 days.
3.What payment methods are accepted for ISL23428WFRUZ-T7A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL23428WFRUZ-T7A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL23428WFRUZ-T7A?
ISL23428WFRUZ-T7A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL23428WFRUZ-T7A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL23428WFRUZ-T7A?
For technical support, including ISL23428WFRUZ-T7A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL23428WFRUZ-T7A requirements.
6.How does Aetrix verify that ISL23428WFRUZ-T7A is sourced from the original manufacturer or authorized distributors?
All ISL23428WFRUZ-T7A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL23428WFRUZ-T7A meets industry standards.
7.What is the process for return or replacement of ISL23428WFRUZ-T7A?
All ISL23428WFRUZ-T7A units undergo pre-shipment inspection (PSI). If there is an issue with ISL23428WFRUZ-T7A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL23428WFRUZ-T7A part is unused and in its original packaging.
Return procedure for ISL23428WFRUZ-T7A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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