Renesas ISL23428WFVZ
- Part No.:
- ISL23428WFVZ
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ISL23428WFVZ.pdf
- Description:
- IC DGT POT 10KOHM 128TAP 14TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL23428WFVZ from Renesas Electronics (formerly Intersil) is a dual, volatile, 128-tap digitally controlled potentiometer with SPI interface, 10kΩ end-to-end resistance, 70Ω typical wiper resistance at 3.3V, and operation from 1.7V to 5.5V VCC and 1.2V to 5.5V VLOGIC. It serves as programmable voltage divider or rheostat in battery-powered instrumentation and sensor trimming circuits.
For engineers reviewing the ISL23428WFVZ datasheet, ISL23428WFVZ pinout, ISL23428WFVZ application, or ISL23428WFVZ equivalent, key selection considerations include its dual-channel 128-tap resolution, independent logic/analog supply rails, shutdown mode with open-circuit DCP terminals, -40°C to +125°C extended temperature range, and 14-lead TSSOP package compatibility with high-density PCB layouts.
Technical Context
The ISL23428WFVZ integrates two monolithic CMOS DCP cores with make-before-break switching, each controlled by an 8-bit volatile Wiper Register (WR0/WR1). Its SPI interface operates in Mode 0 (CPOL=0, CPHA=0), supporting daisy-chaining and no external level shifter required for 1.2V bus operation.
Each DCP functions as either a three-terminal voltage divider (RH–RW–RL) or two-terminal variable resistor (RW–RL or RW–RH), with monotonic tap response, ±0.15 LSB INL/DNL, and ratiometric temperature coefficient of 8 ppm/°C at mid-scale. Power-on defaults WR0/WR1 to 64 (40h), positioning wipers at mid-scale.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Total Resistance | 10kΩ - defines full-scale voltage division ratio and current-handling capability in rheostat mode |
| Taps per Channel | 128 - provides 7.81 mV/LSB resolution with 3.3V supply in voltage divider mode |
| VCC Range | 1.7V to 5.5V - supports direct connection to Li-ion, 3.3V, or 5V analog rails without regulation |
| VLOGIC Range | 1.2V to 5.5V - enables native interfacing with ultra-low-voltage MCUs (e.g., ARM Cortex-M0+) without level translation |
| Wiper Resistance | 70Ω typical @ 3.3V - limits insertion error and thermal noise in precision gain-setting applications |
| Shutdown Current | 1.2µA @ VCC/VLOGIC = 1.7V - reduces system standby power in always-on sensor nodes |
| Temperature Range | -40°C to +125°C - qualified for under-hood automotive, industrial motor control, and outdoor IoT deployments |
Pinout & Package
ISL23428WFVZ is housed in a RoHS-compliant, 14-lead TSSOP package (M14.173), 5.0mm × 4.4mm × 1.2mm, with exposed pad not connected (NC).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1, 7) | Ground reference | Common return path for analog and digital sections; requires low-impedance PCB plane connection |
| VLOGIC (Pin 2) | Digital supply rail | Powers SPI interface logic; sets input thresholds and SDO output levels independently of VCC |
| SDO (Pin 3) | SPI data output | Push-pull or open-drain configurable; outputs register read data on SCK falling edge |
| SCK (Pin 4) | SPI clock input | Accepts up to 5MHz clock (≥1.7V VLOGIC); rising edge clocks SDI data in, falling edge clocks SDO data out |
| SDI (Pin 5) | SPI data input | Receives instruction and data bytes MSB-first; sampled on SCK rising edge |
| CS (Pin 6) | Chip select | Active-low enable; must go low before first SCK edge of any transaction; controls standby/shutdown entry |
| RL1 (Pin 8) | DCP1 low terminal | Fixed end of second potentiometer array; connects to ground or signal reference in voltage divider mode |
| RW1 (Pin 9) | DCP1 wiper | Movable terminal of second DCP; position set by WR1 register; delivers adjustable voltage or resistance |
| RH1 (Pin 10) | DCP1 high terminal | Fixed end of second potentiometer array; connects to VCC or signal source in voltage divider mode |
| RH0 (Pin 11) | DCP0 high terminal | Fixed end of first potentiometer array; used for gain-setting feedback paths or bias voltage generation |
| RW0 (Pin 12) | DCP0 wiper | Movable terminal of first DCP; independently controllable for dual-loop calibration or channel matching |
| RL0 (Pin 13) | DCP0 low terminal | Fixed end of first potentiometer array; ties to reference node in sensor offset trimming applications |
| VCC (Pin 14) | Analog supply rail | Powers resistor array and wiper switches; sets maximum DCP terminal voltage (0 to VCC) |
Key Features
| Feature | Design Value |
|---|---|
| Dual 128-tap DCPs | Enables simultaneous calibration of two independent signal paths (e.g., differential sensor front-end or dual-channel ADC reference) |
| Volatile Wiper Registers (WR0/WR1) | Allows dynamic real-time adjustment via SPI without nonvolatile memory wear-out or write latency |
| Independent VCC/VLOGIC supplies | Eliminates need for external level shifters when interfacing 1.2V/1.8V MCUs with 3.3V/5V analog subsystems |
| Shutdown mode with open-circuit DCPs | Forces RH–RL open and RW–RL shorted via 2kΩ internal resistor, isolating DCP from circuit during sleep |
| Power-on reset to mid-scale (64) | Ensures predictable startup behavior-no floating or extreme gain conditions at power-up |
| Extended temperature range (-40°C to +125°C) | Validated performance across automotive under-hood, industrial PLC, and telecom infrastructure environments |
Applications
| Power Supply Margining | Sensor Circuit Trimming |
|---|---|
Use Scenario: Adjusting feedback voltage of DC-DC converters during production test to verify regulation tolerance margins. IC Role / Device Role / Timing Role: Dual DCP acts as programmable voltage divider on converter feedback node, enabling automated margin testing across multiple voltage rails. Use Value: Replaces manual trim pots with SPI-controlled precision; achieves ±0.5% margin accuracy over -40°C to +125°C without recalibration. |
Use Scenario: Compensating offset and gain drift in MEMS pressure sensors used in HVAC and industrial process monitoring. IC Role / Device Role / Timing Role: ISL23428WFVZ configures sensor bridge excitation and amplifier gain in real time during factory calibration. Use Value: Achieves <±10 µV offset error and <0.05% gain error after calibration using 128-step resolution and 8 ppm/°C ratiometric tracking. |
| Battery-Powered Instrument Gain | RF Power Amplifier Bias |
Use Scenario: Setting programmable gain in handheld multimeters and portable oscilloscopes powered by single-cell Li-ion batteries. IC Role / Device Role / Timing Role: Functions as two-terminal rheostat in op-amp feedback loop to adjust measurement range dynamically. Use Value: Maintains 70Ω wiper resistance and <0.15 LSB DNL across 1.7V–3.6V battery discharge curve, ensuring consistent accuracy. |
Use Scenario: Dynamically adjusting gate bias voltage of GaN RF power amplifiers in 5G base station transceivers. IC Role / Device Role / Timing Role: Provides stable, low-noise bias point via voltage divider configuration with <16 nV/√Hz resistor noise density. Use Value: Enables closed-loop thermal compensation using MCU-read wiper positions, reducing PA output drift by >40% over temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5242BRUZ10 | Nonvolatile EEPROM storage; 256 taps; I²C interface; 10kΩ; 16-lead TSSOP | Requires no host initialization at power-up; suited for systems needing persistent settings across cycles | Select when power-loss retention is mandatory; avoid if SPI interface or ultra-low standby current (<2µA) is required |
| MCP42010-I/P | Volatile operation; 256 taps; SPI interface; 10kΩ; 14-lead PDIP (not surface-mount) | Larger through-hole package; higher wiper resistance (120Ω); no VLOGIC independence | Choose only for legacy through-hole designs; reject for space-constrained or low-power battery applications |
Compared with AD5242BRUZ10 and MCP42010-I/P, the ISL23428WFVZ offers superior low-voltage SPI compatibility (down to 1.2V), lower standby current (1.2µA), and tighter ratiometric tempco (8 ppm/°C), making it optimal for energy-sensitive, high-precision embedded calibration.
Availability
ISL23428WFVZ is available at Aetrix Electronics and suitable for power supply margining, sensor circuit trimming, battery-powered instrument gain adjustment, RF power amplifier bias compensation, and industrial temperature-compensated calibration requiring stable component supply across extended temperature ranges.
Supply support for ISL23428WFVZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation, formed from the merger of NEC Electronics and Renesas Technology, is a global semiconductor leader delivering microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The ISL23428WFVZ belongs to Renesas' XDCP™ (eXtreme Digital Controlled Potentiometer) family, engineered for high-accuracy, low-power, and wide-temperature programmable resistance in embedded calibration and sensor conditioning systems.
FAQ
What is the total resistance value specified for the ISL23428WFVZ?
The ISL23428WFVZ is configured with a 10kΩ end-to-end resistance (RH to RL), as indicated by the 'W' in the part number per the Ordering Information table. This value is guaranteed across the full -40°C to +125°C operating temperature range with ±20% tolerance, and exhibits a 125 ppm/°C end-to-end temperature coefficient.
Does the ISL23428WFVZ retain wiper settings after power cycling?
No, the ISL23428WFVZ uses volatile Wiper Registers (WR0 and WR1). Upon power-up, both registers reset to 64 (40h), positioning each wiper at mid-scale (50% resistance). Host firmware must reinitialize the desired tap positions via SPI after each power cycle.
Can the ISL23428WFVZ operate with different voltages on VCC and VLOGIC simultaneously?
Yes, the ISL23428WFVZ supports independent supplies: VCC from 1.7V to 5.5V powers the analog DCP array, while VLOGIC from 1.2V to 5.5V powers the SPI interface. This allows direct connection to a 1.2V microcontroller bus and a 3.3V analog rail without external level shifters.
What happens to the DCP terminals during shutdown mode of the ISL23428WFVZ?
When the SHDN bit in the Access Control Register is set to 0, the ISL23428WFVZ forces each DCP into an end-to-end open circuit (RH–RL disconnected) and internally connects each wiper (RW0/RW1) to its respective low terminal (RL0/RL1) through a 2kΩ series resistor, effectively isolating the potentiometers from the external circuit.
Is the ISL23428WFVZ pin-compatible with other variants in the ISL23428 family?
Yes, all ISL23428 variants in the 14-lead TSSOP package-including ISL23428TFVZ (100kΩ) and ISL23428UFVZ (50kΩ)-share identical pinout and footprint. Only the total resistance value differs; electrical characteristics like VCC/VLOGIC ranges, SPI timing, and shutdown behavior remain consistent across the family.
ISL23428WFVZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 128
- Resistance (Ohms):
- 10k
- Interface:
- SPI
- Memory Type:
- Volatile
- Voltage - Supply:
- 1.2V ~ 5.5V, 1.7V ~ 5.5V
- Features:
- -
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 125ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 14-TSSOP
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 70
ISL23428WFVZ FAQ
1.How can I place an order for ISL23428WFVZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL23428WFVZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL23428WFVZ reliable?
The price and inventory of ISL23428WFVZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL23428WFVZ is usually 5 days.
3.What payment methods are accepted for ISL23428WFVZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL23428WFVZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL23428WFVZ?
ISL23428WFVZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL23428WFVZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL23428WFVZ?
For technical support, including ISL23428WFVZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL23428WFVZ requirements.
6.How does Aetrix verify that ISL23428WFVZ is sourced from the original manufacturer or authorized distributors?
All ISL23428WFVZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL23428WFVZ meets industry standards.
7.What is the process for return or replacement of ISL23428WFVZ?
All ISL23428WFVZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL23428WFVZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL23428WFVZ part is unused and in its original packaging.
Return procedure for ISL23428WFVZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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