Renesas ISL26102AVZ

Overview

ISL26102AVZ from Renesas (formerly Intersil) is a 24-bit delta-sigma analog-to-digital converter with integrated programmable gain amplifier (PGA), two fully differential multiplexed input channels, and automotive-grade operation (-40°C to +105°C). It delivers 21.5 noise-free bits at 10 Sps, supports PGA gains from 1× to 128×, and features low-side power switch (LSPS) for load cell bias control - enabling high-accuracy weigh scale and industrial sensor interface applications.

For engineers reviewing the ISL26102AVZ datasheet, ISL26102AVZ pinout, ISL26102AVZ application, or ISL26102AVZ equivalent, key selection criteria include its 7 nV/√Hz input-referred noise at PGA=128, ±0.0002% FS linearity, 2.5–4 kSps output word rate range, dual-channel differential input architecture, and TSSOP-24 package compatibility with load-cell bridge direct connection.

Technical Context

The ISL26102AVZ integrates a chopper-stabilized PGA with seven discrete gain settings (1×, 2×, 4×, ..., 128×) and a 3rd-order delta-sigma modulator followed by a programmable SINC4 digital filter. Its input stage supports ±19.5 mV_FS full-scale at 128× gain with 5 V reference, and offers high input impedance (>1 GΩ at gain ≥2) to eliminate external signal conditioning for bridge sensors.

It operates from separate analog (4.75–5.25 V) and digital (2.7–5.25 V) supplies, accepts clock sources including internal oscillator, external crystal (4.9152 MHz), or external clock, and provides serial interface (SPI-compatible) with CS, SCLK, SDI, and SDO/RDY signals plus dedicated LSPS control output.

Key Specifications

Pinout & Package

ISL26102AVZ is housed in a 24-lead Thin Shrink Small Outline Package (TSSOP), Pb-free, RoHS-compliant, with thermal resistance θ_JA = 65°C/W and θ_JC = 18°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar precision delta-sigma ADC applications.

Compared with ADS124S08IPW and AD7172-2BRUZ, the ISL26102AVZ uniquely integrates load-cell power switching and on-die temperature sensing within a 24-pin TSSOP, delivering optimized signal chain simplicity for automotive and industrial weighing where PCB area, component count, and thermal stability are constrained.

Availability

ISL26102AVZ is available at Aetrix Electronics and suitable for weigh scales, industrial process control, and load safety systems requiring stable component supply, automotive temperature qualification, and long-term obsolescence management.

Supply support for ISL26102AVZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog power, and SoC solutions for automotive, industrial, and IoT applications.

The ISL26102AVZ belongs to Renesas' precision analog data acquisition product line, designed specifically for high-accuracy sensor interface in harsh environments where low noise, rail-to-rail input capability, and integrated power control are essential.

FAQ

What is the maximum output word rate supported by the ISL26102AVZ?

The ISL26102AVZ supports an output word rate (OWR) of up to 4000 Sps when driven by a 4.9152 MHz clock source. At lower clock frequencies or with the internal oscillator, the OWR scales proportionally. The device provides 28 discrete OWR settings from 2.5 Sps to 4000 Sps, configured via the Output Word Rate register (address 05h). Each setting corresponds to a specific hex code listed in Table 3 of the FN7608 datasheet.

Does the ISL26102AVZ require external components for PGA filtering?

Yes, the ISL26102AVZ requires external capacitors connected to the CAP pins (Pins 9 and 10) to complete the passive RC filter on the PGA output. A nominal 100 nF C0G ceramic or PPS film capacitor is recommended to suppress chopping artifacts and limit bandwidth before the delta-sigma modulator. No external resistors are needed - the filter resistors are integrated inside the IC.

Can the ISL26102AVZ directly interface with a standard load cell bridge?

Yes, the ISL26102AVZ is designed for direct connection to load cell bridges. Its high input impedance (>1 GΩ at PGA gain ≥2), low input bias current (3 nA typ.), and integrated LSPS pin (10 Ω R_ON, 30 mA) enable excitation control and noise-free millivolt-level signal acquisition without external amplifiers or switches - meeting the requirements of EN 45501 and OIML R76 standards.

How does the ISL26102AVZ handle input channel switching and settling?

When the Input Mux Selection register changes, the ISL26102AVZ resets both the PGA and digital filter. The first valid conversion appears after a delay comprising 4 ms (PGA settling), user-programmable Delay Timer (100 µs minimum), and 4 × (1/OWR) (SINC4 filter settling). For example, at 100 Sps and default delay, total latency is ~44 ms before the first accurate result.

Is the ISL26102AVZ pin-compatible with the ISL26104AVZ?

No, the ISL26102AVZ (24-lead TSSOP) is not pin-compatible with the ISL26104AVZ (28-lead TSSOP). While both share identical pin functions for common signals (e.g., DVDD, DGND, AIN1±, VREF±), the ISL26104AVZ adds four extra pins (AIN3±, AIN4±) and relocates AIN2± and LSPS. PCB layout and footprint must be redesigned to migrate between these variants.