Renesas ISL6130IRZA

Overview

ISL6130IRZA from Renesas (formerly Intersil) is a 4-channel voltage-determined power supply sequencer with independent channel enable, integrated charge-pump gate drivers, undervoltage monitoring on four rails, and a system-ready RESET output. It operates from 1.5V to 5.5V bias, delivers VDD + 5.3V gate drive, supports 0.7V–5V rail sequencing, and features 1µA standby current for battery-sensitive designs. Used in FPGA/ASIC power-up control where supply turn-on must follow input voltage validation.

For engineers reviewing the ISL6130IRZA datasheet, ISL6130IRZA pinout, ISL6130IRZA application, or ISL6130IRZA equivalent, key selection criteria include its voltage-determined (not time-delayed) ON sequencing per channel, independent UVLO-triggered GATE activation, adjustable OFF delays via external capacitors, and compatibility with low-voltage systems down to 1.5V.

Technical Context

The ISL6130IRZA implements a voltage-determined turn-on architecture: each of its four GATE outputs activates only when its corresponding UVLO input exceeds the internal 0.633V reference and ENABLE is asserted - no shared timing capacitor required. Its charge-pump circuit generates VDD + 5.3V gate drive to fully enhance external N-channel MOSFETs, enabling robust control of high-side or low-side switching configurations.

Turn-off sequencing remains user-programmable via DLY_OFF_x pins (1µA current source charging to 1.266V threshold), while RESET asserts low on any UVLO fault or ENABLE deassertion and releases high 160ms after all GATEs reach full enhancement. The device includes glitch immunity (30µs filter), undervoltage lockout hysteresis (10mV), and guaranteed operation down to VDD = 1V for RESET/SYSRST states.

Key Specifications

Pinout & Package

ISL6130IRZA uses a 24-lead 4×4 mm QFN package (Pb-free, RoHS-compliant) with exposed thermal pad. Pin functions are identical to ISL6126 per datasheet Figure 3 and Pin Descriptions table.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power supply sequencing applications.

Compared with ISL6126IRZA, ISL6130IRZA adds active-high ENABLE and 1µA sleep current - critical for portable systems - while maintaining identical sequencing autonomy and gate drive capability; versus TPS652860RSLR, ISL6130IRZA preserves design flexibility with external FETs and voltage-triggered logic but requires more board area and discrete components.

Availability

ISL6130IRZA is available at Aetrix Electronics and suitable for graphics card power management, FPGA/ASIC supply sequencing, and telecom line card control requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ISL6130IRZA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation acquired Intersil in 2017 and maintains full technical and manufacturing continuity for the ISL61xx sequencer family. Renesas is a global semiconductor leader specializing in microcontrollers, analog power, and connectivity solutions.

The ISL6130IRZA belongs to Renesas' high-reliability power sequencing controller product line, designed specifically for complex multi-rail systems in computing, communications, and industrial equipment where voltage validation-not fixed timing-must govern power-up order.

FAQ

What is the key functional difference between ISL6130IRZA and ISL6123IRZA?

The ISL6130IRZA uses voltage-determined turn-on sequencing - each GATE activates only when its UVLO input exceeds 0.633V - whereas ISL6123IRZA requires all four UVLO inputs to be satisfied before initiating a time-based DLY_ON capacitor sequence. ISL6130IRZA also features active-high ENABLE and 1µA standby current, unlike ISL6123IRZA's active-high ENABLE with same standby but different sequencing logic.

Does ISL6130IRZA support daisy-chaining with other sequencers?

Yes, ISL6130IRZA supports daisy-chaining via its SYSRST pin. When multiple ISL6130IRZA devices are connected on a common SYSRST net, a UVLO fault on any device pulls SYSRST low, forcing immediate latch-off of all GATE outputs across the chain - enabling synchronized fault response in large-scale systems.

What is the minimum VDD required for ISL6130IRZA to assert a valid RESET output?

The ISL6130IRZA guarantees correct RESET state (including pull-down capability) down to VDD = 1V. However, full functionality - including UVLO monitoring, gate drive, and DLY_OFF timing - requires VDD ≥ 1.5V per the Absolute Maximum Ratings table. Below 1.5V, only RESET assertion reliability is specified.

Can ISL6130IRZA drive high-side N-channel MOSFETs directly?

Yes, ISL6130IRZA's charge pump delivers VDD + 5.3V gate drive - sufficient to fully enhance standard high-side N-channel MOSFETs (e.g., 1.5V bias → 6.8V gate voltage). No external bootstrap circuitry or level shifters are needed, simplifying high-side switch implementation in multi-rail power domains.

How does ISL6130IRZA handle a single-rail undervoltage fault during operation?

When any UVLO input falls below 0.633V for longer than 30µs, ISL6130IRZA immediately pulls RESET and SYSRST low and disables all four GATE outputs. Unlike ISL6128IRZA, it does not isolate faulted channels - the entire sequencer enters latch-off mode until ENABLE is cycled and all UVLO inputs recover.