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Renesas ISL6225CAZA-T

Part No.:
ISL6225CAZA-T
Manufacturer:
Renesas
Category:
Special Purpose Regulators
Package:
28-SSOP (0.154", 3.90mm Width)
Datasheet:
AetrixISL6225CAZA-T.pdf
Description:
IC REG CTRL DDR DRAM 2OUT 28SSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,797

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Product details

Overview

ISL6225CAZA-T from Renesas (formerly Intersil) is a dual-channel synchronous buck PWM controller designed for DDR memory power delivery and dual-output DC/DC conversion in mobile computing systems. It delivers 0.9V–5.5V adjustable outputs, supports DDR mode with VTT tracking and VDDQ/2 reference generation, and operates at 300 kHz with 0°/90°/180° channel phase shift. Used in notebook PCs and PDAs for SDRAM/DDR DRAM power rails.

For engineers reviewing the ISL6225CAZA-T datasheet, ISL6225CAZA-T pinout, ISL6225CAZA-T application, or ISL6225CAZA-T equivalent, key selection considerations include its dual-mode operation (independent regulation vs. DDR-specific VTT/VREF generation), rDS(ON)-based current sensing, automatic CCM/hysteretic mode transition, and SSOP-28 package compatibility with legacy mobile power designs.

Technical Context

The ISL6225CAZA-T integrates two average-current-mode PWM controllers with voltage feed-forward ramp modulation, enabling fast transient response to input and load changes. Each channel features independent soft-start, PGOOD, and overcurrent protection with OCSET resistor programming.

In DDR mode (DDR pin high), CH2 becomes a bidirectional VTT supply tracking VDDQ/2, while PG2/REF outputs the buffered VDDQ/2 reference. Channel synchronization shifts to 0° phase for reduced interference, and OCSET2 repurposes as a tracking setpoint input - not an overcurrent threshold.

Key Specifications

Parameter Value and Actual Design Meaning
Switching frequency 300 kHz ±15% - fixed-frequency operation enables predictable EMI filtering and input capacitor sizing.
Output voltage range 0.9 V to 5.5 V per channel - supports DDR2/SDRAM core voltages and generic low-voltage rails.
VDDQ/2 reference accuracy ±1% at 0–10 mA - meets DDR memory specification for VREF tolerance in JEDEC-compliant systems.
Overvoltage protection threshold 110–130% of set point - latches off upper MOSFET and holds lower MOSFET on to clamp output during fault.
Input voltage range (VIN) 5 V to 24 V - accepts direct battery input for single-stage conversion in mobile platforms.
Operating temperature −10°C to +85°C - qualified for commercial-grade notebook and sub-notebook thermal environments.
VCC supply 5.0 V ±5% - requires regulated 5 V bias rail; UVLO thresholds at 4.35 V (rising) and 4.35 V (falling).

Pinout & Package

ISL6225CAZA-T is housed in a Pb-free 28-lead SSOP (M28.15) package with 0.635 mm lead pitch and exposed pad for thermal dissipation. Thermal resistance θJA = 78°C/W on standard PCB layout.

Pin/Terminal Circuit Role Design Meaning
GND (1) Signal ground reference Common return for internal analog/digital blocks; must be connected to low-impedance system ground plane.
LGATE1/LGATE2 (2,27) Lower MOSFET gate drivers Drive N-channel sync rectifiers; capable of sinking 3 A peak to ensure fast turn-off and minimize shoot-through risk.
PGND1/PGND2 (3,26) Power ground returns Separate high-current paths for lower MOSFET sources; must be routed directly to respective MOSFET source pads.
PHASE1/PHASE2 (4,25) Switch node connections Connect to junction of upper MOSFET source, inductor, and lower MOSFET drain; critical for accurate current sensing and EMI control.
UGATE1/UGATE2 (5,24) Upper MOSFET gate drivers Bootstrap-driven high-side drivers; require external bootstrap diode and capacitor for proper high-side gate biasing.
BOOT1/BOOT2 (6,23) Bootstrap supply inputs Accept charge from bootstrap capacitor; rated for 6.5 V max above PHASE; must be decoupled with ≥0.1 µF ceramic.
ISEN1/ISEN2 (7,22) Current sense inputs Monitor rDS(ON) voltage drop across lower MOSFETs; support optional external sense resistors for precision OCP.
EN1/EN2 (8,21) Channel enable inputs Logic-level enables (0.8 V low / 2.5 V high); tied together in typical designs to synchronize startup/shutdown.
VOUT1/VOUT2 (9,20) Output voltage feedback assist When tied to output, enables smooth CCM↔hysteretic mode transition; when grounded, forces FCCM operation.
VSEN1/VSEN2 (10,19) Feedback voltage inputs Connect to resistive divider midpoint; used for regulation, PGOOD, OVP, and UVP detection (±10% window).
OCSET1/OCSET2 (11,18) Overcurrent threshold setpoints Resistor-to-ground sets IOC threshold; OCSET2 repurposed as VDDQ/2 tracking setpoint in DDR mode.
SOFT1/SOFT2 (12,17) Soft-start timing inputs 5 µA internal current charges external capacitor; SOFT voltage ramp controls output rise time and PGOOD enable timing.
DDR (13) DDR mode select input High = activates DDR functionality (VTT tracking, VDDQ/2 REF, 0° phase sync); low = dual independent regulators.
VIN (14) Feed-forward input Provides input voltage to ramp generator; tied to GND via 100 kΩ in DDR+90° mode to reduce inter-channel noise coupling.
VCC (28) Bias supply input 5 V ±5% regulated supply; powers all internal circuitry; includes 4.35 V UVLO with hysteresis for reliable startup.
PG1 (15) CH1 power-good output Open-drain signal asserted when CH1 output is within ±10% of set point; requires external pull-up to VCC or logic rail.
PG2/REF (16) Dual-function pin In dual mode: PGOOD2 open-drain output; in DDR mode: buffered VDDQ/2 reference output (0.99–1.01×VOC2).

Key Features

Feature Design Value
Automatic CCM/hysteretic mode switching Enables >90% light-load efficiency by emulating diode conduction without external Schottky; avoids reverse recovery losses.
rDS(ON)-based current sensing Eliminates need for dedicated current-sense resistors, reducing BOM cost and board space; supports optional external resistor for tighter OCP tolerance.
VTT bidirectional sourcing/sinking CH2 supplies or sinks current to maintain DDR termination voltage stability during data bus transitions - essential for signal integrity.
VDDQ/2 buffered reference output Delivers stable, low-noise 1.25 V (for 2.5 V VDDQ) or 1.35 V (for 2.7 V VDDQ) reference to DDR memory chips per JEDEC spec.
Programmable channel phase shift 0° (DDR), 90° (low-noise DDR), or 180° (reduced input ripple) - selectable via VIN connection and DDR pin state without external logic.

Applications

DDR Memory Power Supply Graphics Chipset Core Voltage

Use Scenario: Powering DDR2 SDRAM modules in ultra-thin notebooks requiring precise VDDQ, VTT, and VREF rails.

IC Role / Device Role / Timing Role: ISL6225CAZA-T acts as complete DDR power solution: CH1 regulates VDDQ, CH2 provides bidirectional VTT, and PG2/REF delivers buffered VDDQ/2 reference.

Use Value: Eliminates need for discrete op-amps or dedicated DDR PMICs; reduces component count by integrating tracking, reference, and dual regulation in one SSOP-28 IC.

Use Scenario: Delivering tightly regulated 1.0 V–1.3 V core voltage to GPU or integrated graphics processors in mobile platforms.

IC Role / Device Role / Timing Role: ISL6225CAZA-T operates in dual independent mode to generate two low-noise, high-efficiency outputs - one for GPU core, one for I/O or memory interface.

Use Value: 300 kHz switching with average-current-mode control ensures <±2% load regulation and fast transient response to GPU burst loads.

Notebook System Rail Generation Sub-Notebook/PDA Dual-Output Supply

Use Scenario: Generating 1.8 V and 3.3 V system rails from a 12 V battery in clamshell notebooks with thermal constraints.

IC Role / Device Role / Timing Role: ISL6225CAZA-T functions as dual synchronous buck controller with 180° phase shift to minimize input capacitor RMS current and heat generation.

Use Value: Phase-shifted operation cuts input ripple by ~70% versus in-phase design, allowing smaller, lower-ESR input capacitors and improved thermal performance.

Use Scenario: Powering ARM-based PDAs with separate 1.2 V processor core and 2.5 V display interface rails under strict size and efficiency requirements.

IC Role / Device Role / Timing Role: ISL6225CAZA-T uses hysteretic light-load mode to extend battery runtime; FCCM disable via VOUT pins ensures consistent frequency during sleep/wake cycles.

Use Value: Automatic mode transition achieves >85% efficiency at 10 mA load - critical for standby current optimization in portable devices.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual PWM controller applications.

Alternative Part Technical Difference Application Difference Selection Advice
ISL6227 Successor with enhanced DDR3 support, higher 500 kHz switching frequency, and improved light-load efficiency via adaptive burst mode. Designed for DDR3 memory systems requiring tighter VTT regulation and faster transient response; lacks VDDQ/2 buffer output. Select ISL6227 for new DDR3 designs or where higher frequency enables smaller magnetics; not drop-in compatible due to different pinout and feature mapping.
RT8205A Single-chip dual-phase controller with integrated MOSFET drivers and 0.6 V reference; no DDR-specific VTT/VREF functions. Targeted at cost-sensitive notebook CPU core VRMs; supports only independent dual-output or parallel-phase configurations. Choose RT8205A for generic dual-buck applications without DDR memory interface requirements; requires external VREF generation circuitry.

Compared with ISL6225CAZA-T, ISL6227 offers higher integration for DDR3 but removes the VDDQ/2 reference buffer, while RT8205A provides lower system cost for non-DDR applications but lacks tracking capability and bidirectional VTT sourcing - making ISL6225CAZA-T uniquely suited for legacy DDR2 memory power delivery.

Availability

ISL6225CAZA-T is available at Aetrix Electronics and suitable for notebook PC power subsystems, DDR2 memory modules, and graphics chipset voltage regulation requiring stable component supply and long-term industrial availability.

Supply support for ISL6225CAZA-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation acquired Intersil in 2017 and maintains full technical and supply chain support for legacy Intersil power management ICs including the ISL6225 family.

The ISL6225 product line was engineered specifically for mobile computing power architectures - delivering dual-output regulation, DDR memory compliance, and battery-efficient operation in space-constrained portable platforms.

FAQ

What is the function of the DDR pin on the ISL6225CAZA-T?

The DDR pin on the ISL6225CAZA-T enables DDR memory power mode when pulled high. In this mode, CH2 output (VTT) tracks VDDQ/2, PG2/REF becomes a buffered VDDQ/2 reference output, and channel synchronization switches to 0° phase. The pin is logic-compatible (0.8 V low / 2.5 V high) and must be externally pulled to VCC or ground via appropriate resistor network to ensure reliable mode selection.

Does the ISL6225CAZA-T support both continuous conduction mode (CCM) and discontinuous conduction mode (DCM)?

The ISL6225CAZA-T supports constant-frequency CCM and hysteretic mode (diode emulation), not classical DCM. Hysteretic operation occurs automatically at light loads to improve efficiency; it can be disabled per channel by grounding the VOUTx pins to force FCCM. The device does not implement true DCM with zero-current detection or valley switching - its light-load behavior is strictly hysteretic with variable frequency.

Can the ISL6225CAZA-T generate a precise VDDQ/2 reference for DDR2 memory?

Yes. When the DDR pin is high, the ISL6225CAZA-T configures PG2/REF as a buffered VDDQ/2 reference output with ±1% accuracy across 0–10 mA load. This meets JEDEC DDR2 specifications for VREF tolerance and eliminates need for external op-amp circuits. The output is derived directly from the internal 0.9 V reference and scaled via precision on-die resistors.

What is the maximum input voltage rating for the VIN pin on the ISL6225CAZA-T?

The VIN pin on the ISL6225CAZA-T has an absolute maximum rating of +27.0 V, but recommended operating range is +5.0 V to +24.0 V. This pin supplies the feed-forward ramp generator and determines channel phase shift behavior. Exceeding 24 V risks violating internal bias limits and may degrade ramp linearity or cause premature overvoltage shutdown activation.

How does overcurrent protection work on the ISL6225CAZA-T without an external sense resistor?

The ISL6225CAZA-T uses the lower MOSFET's rDS(ON) as the current-sensing element: voltage drop across the MOSFET during low-side conduction is fed into the ISEN pin and compared against a threshold set by the OCSET resistor. This eliminates external sense resistors while maintaining ±10% OCP accuracy. For tighter tolerance, an external resistor can be added in series with the MOSFET source.

ISL6225CAZA-T Specifications

Product attributes
Attribute value
Manufacturer:
Renesas
Series:
-
Package/Case:
28-SSOP (0.154", 3.90mm Width)
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Applications:
Controller, DDR DRAM, SDRAM
Voltage - Input:
5V ~ 24V
Number of Outputs:
2
Voltage - Output:
0.9V ~ 5.5V
Operating Temperature:
-10°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
28-SSOP/QSOP

ISL6225CAZA-T FAQ

1.How can I place an order for ISL6225CAZA-T through Aetrix?

Please submit a Request for Quotation (RFQ) for ISL6225CAZA-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ISL6225CAZA-T reliable?

The price and inventory of ISL6225CAZA-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6225CAZA-T is usually 5 days.

3.What payment methods are accepted for ISL6225CAZA-T?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6225CAZA-T transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ISL6225CAZA-T?

ISL6225CAZA-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ISL6225CAZA-T order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ISL6225CAZA-T?

For technical support, including ISL6225CAZA-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6225CAZA-T requirements.

6.How does Aetrix verify that ISL6225CAZA-T is sourced from the original manufacturer or authorized distributors?

All ISL6225CAZA-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6225CAZA-T meets industry standards.

7.What is the process for return or replacement of ISL6225CAZA-T?

All ISL6225CAZA-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6225CAZA-T, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ISL6225CAZA-T part is unused and in its original packaging.

Return procedure for ISL6225CAZA-T:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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