My Inquiry
My Account
Renesas ISL62386HRTZ
- Part No.:
- ISL62386HRTZ
- Manufacturer:
- Renesas
- Category:
- Power Supply Controllers, Monitors
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
ISL62386HRTZ.pdf
- Description:
- IC PWR SUPPLY CTRLR QUAD 32TQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,839
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL62386HRTZ from Intersil is a quad-output system power supply controller for notebook computers, integrating two programmable PWM buck controllers (0.6V–5.5V) and two fixed-output LDOs (5V/100mA and 3.3V/100mA), with R3 PWM control, ±1% output voltage accuracy over –10°C to +100°C, and automatic SMPS2-to-LDO5 switchover at 4.8V threshold.
For engineers reviewing the ISL62386HRTZ datasheet, ISL62386HRTZ pinout, ISL62386HRTZ application, or ISL62386HRTZ equivalent, key selection considerations include dual independent PWM frequency programming via FSET1/FSET2 resistors, ultrasonic DCM mode (≥28kHz), integrated MOSFET drivers with bootstrap diodes, thermal monitoring, and sequencing-enabled PGOOD with soft-start/soft-stop discharge.
Technical Context
The ISL62386HRTZ implements Intersil's patented R3 PWM architecture-hybridizing fixed-frequency and hysteretic control-to deliver fast transient response and low-jitter regulation by synthesizing ripple current as an AC signal (VR) referenced to VCOMP and modulated by VIN/VOUT. Its dual-channel independence supports asymmetric output configurations (e.g., 1.05V/15A + 1.5V/15A or 3.3V/8A + 5V/8A).
It features three efficiency modes controlled by FCCM: forced CCM (high transient performance), full DCM (max light-load efficiency), and ultrasonic DCM (≥28kHz minimum switching frequency to avoid audio-band noise). The LDO5 output powers internal circuitry and bootstraps UGATE drivers, while LDO3EN enables/disables the 3.3V LDO independently.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Configuration | Two independent PWM buck regulators + two fixed LDOs (5V/100mA, 3.3V/100mA) |
| Input Voltage Range | +5.5V to +25V - supports 3-cell/4-cell Li+ battery input with feed-forward line compensation via VIN pin |
| Output Voltage Accuracy | ±1% over –10°C to +100°C - ensures stable core/memory rail regulation across extended notebook operating range |
| Switching Frequency Range | 200–600 kHz - programmable per channel via external FSET resistor; typical 270/330 kHz in reference designs |
| Protection Features | OVP/UVP/OCP/OTP - includes 116% FB overvoltage trip, 84% FB undervoltage trip, and 150°C thermal shutdown |
| Efficiency Modes | Ultrasonic DCM (≥28kHz), full DCM, forced CCM - selectable via FCCM pin to balance noise vs. light-load efficiency |
| Soft-Start/Discharge | Digital soft-start (1.5ms FB ramp) + internal soft-stop discharge (14–50Ω) - prevents negative voltages during shutdown |
Pinout & Package
ISL62386HRTZ is housed in a 32-lead 5mm × 5mm TQFN package (L32.5x5A) with exposed thermal pad connected internally to AGND. Pin functions are validated per FN6831 Rev 0.00 datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGOOD (Pin 1) | Open-drain power-good status output | Asserts high only when both SMPS outputs are within ±1% regulation window and no fault detected; sinks up to 5mA with 32Ω pull-down impedance |
| FSET1/FSET2 (Pins 2, 8) | Frequency programming inputs | Resistor-to-ground sets PWM frequency (200–600 kHz); requires parallel 10nF capacitor for noise immunity |
| FCCM (Pin 3) | Mode control logic input | Low = DCM, high = forced CCM, floating = ultrasonic DCM (≥28kHz) - eliminates audible coil whine |
| VIN (Pin 20) | Feed-forward input | Provides line-voltage transient compensation to improve load-step response without external sensing |
| UGATE1/LGATE1 (Pins 16, 18) | High-side/low-side gate drivers | Drive external N-MOSFETs; UGATE powered via BOOT1-PHASE1 bootstrap; LGATE sourced from LDO5 |
| LDO3EN (Pin 7) | 3.3V LDO enable input | Positive-logic control; enables/disables LDO3 independently of SMPS operation for flexible power sequencing |
| PHASE1/PHASE2 (Pins 15, 26) | Switching node connections | Return path for high-side gate drive and synthetic ripple modulation; connects to inductor, NMOS source/drain |
Key Features
| Feature | Design Value |
|---|---|
| R3 PWM Control Architecture | Simultaneously adjusts duty cycle and frequency in response to VIN and load transients - achieves <10µs recovery from 0.1A→8.1A load step |
| Automatic SMPS2-to-LDO5 Switchover | Seamlessly transitions 5V rail from SMPS2 to LDO5 below 4.8V threshold - eliminates cross-conduction risk and improves light-load efficiency |
| Integrated Bootstrap Diodes | On-chip diodes from LDO5 to BOOT1/BOOT2 - eliminate external diodes, reduce BOM count, and ensure reliable high-side gate drive startup |
| Thermal Monitoring & Protection | Internal sensor triggers shutdown at 150°C rising edge (135°C hysteresis) - prevents thermal runaway in compact notebook layouts |
| Dual Independent Enable Logic | EN1/EN2 support user-defined sequencing or auto-delayed start (e.g., EN2 float → EN1 active → SMPS2 starts after SMPS1 regulation) |
Applications
| Notebook Main Power Rails | Mobile Communication Baseband |
|---|---|
Use Scenario: Generating 1.05V/15A CPU core and 1.5V/15A GPU rails from 3–4 cell Li+ battery (5.5–25V). IC Role / Device Role / Timing Role: Quad-output controller managing primary DC/DC conversion, sequencing, and fault signaling for SoC power domains. Use Value: R3 control delivers sub-10µs transient response; ultrasonic DCM avoids audible noise during standby; integrated drivers reduce external component count by ≥4. | Use Scenario: Supplying 3.3V RF front-end and 5V baseband processor in PDAs or LTE modules. IC Role / Device Role / Timing Role: Dual-buck + dual-LDO controller providing isolated, sequenced, and protected power domains with PGOOD coordination. Use Value: ±1% accuracy maintains RF PA linearity; LDO3EN allows dynamic 3.3V rail disable during sleep; soft-stop discharge prevents I²C bus glitches on shutdown. |
| Battery-Powered Industrial Tablet | Embedded Computing Module |
Use Scenario: Powering ARM-based industrial tablet with 3.3V I/O, 5V USB, and configurable core voltage (0.6–5.5V). IC Role / Device Role / Timing Role: System PMIC delivering four regulated rails with programmable frequency, thermal protection, and fault reporting. Use Value: Wide 5.5–25V input accommodates aging battery packs; FCCM-selectable modes optimize efficiency across 10µA–15A load range; -10°C to +100°C rating supports fanless enclosures. | Use Scenario: Supporting COM Express or SMARC module requiring 3.3V/5V auxiliary rails plus programmable core voltage. IC Role / Device Role / Timing Role: Flexible multi-rail controller enabling custom voltage sequencing and dynamic reconfiguration via EN/FSET pins. Use Value: Independent EN1/EN2 and LDO3EN allow firmware-controlled power-up order; FSET1/FSET2 resistors permit board-level frequency tuning without IC change. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-output notebook power controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL62385HRTZ | Same pinout and feature set but lacks LDO3EN control; fixed LDO3 always enabled | Not suitable for designs requiring dynamic 3.3V rail disable; identical sequencing and protection otherwise | Select ISL62385HRTZ only if LDO3 must remain always-on and BOM cost reduction is prioritized |
| RT8205AZSP | Triple PWM + single LDO; no integrated boot diodes; requires external bootstrap diodes; lower max input (24V) | Supports fewer rails; higher external component count; lacks ultrasonic DCM mode | Choose RT8205AZSP only when third PWM rail is needed and 28kHz+ noise suppression is not required |
Compared with ISL62385HRTZ, ISL62386HRTZ adds LDO3EN for dynamic 3.3V rail control; compared with RT8205AZSP, it integrates boot diodes and ultrasonic DCM, reducing layout complexity and eliminating audible noise in portable applications.
Availability
ISL62386HRTZ is available at Aetrix Electronics and suitable for notebook computers, mobile communication devices, battery-powered industrial tablets, and embedded computing modules requiring stable component supply across extended temperature ranges.
Supply support for ISL62386HRTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil (now part of Renesas Electronics) is a semiconductor company specializing in precision analog and power management ICs for computing, communications, and industrial markets.
The ISL62386HRTZ belongs to Intersil's notebook power controller product line, designed specifically to consolidate multiple voltage rails, simplify thermal design, and improve efficiency across the full load range in space-constrained mobile platforms.
FAQ
What is the operating temperature range specified for the ISL62386HRTZ?
The ISL62386HRTZ is rated for operation from –10°C to +100°C ambient temperature, validated per FN6831 datasheet Section "Recommended Operating Conditions". This extended range supports fanless notebook designs and industrial tablet deployments where internal chassis temperatures exceed standard commercial limits. The thermal protection circuit activates at 150°C junction temperature with 15°C hysteresis.
How does the ISL62386HRTZ implement automatic switchover between SMPS2 and LDO5?
The ISL62386HRTZ monitors VOUT2 via the VOUT2 pin and compares it against an internal 4.80V threshold (4.63–4.93V range). When VOUT2 drops below this level, the controller automatically transfers the 5V load from SMPS2 to LDO5 using an internal 2.5–3.2Ω switchover resistance. This occurs without external circuitry and preserves regulation continuity during light-load or low-input conditions.
Can the ISL62386HRTZ support independent sequencing of its two PWM outputs?
Yes, the ISL62386HRTZ supports fully independent sequencing via EN1 and EN2 pins. Pulling EN1 high before EN2 enables SMPS1 first; floating EN2 delays SMPS2 startup until SMPS1 achieves regulation. Table 1 in FN6831 confirms all combinations-including simultaneous enable, delayed enable, and independent disable-allowing precise control of power-up order for complex SoC domains.
What is the purpose of the FCCM pin on the ISL62386HRTZ, and how does it affect efficiency?
The FCCM pin selects among three efficiency modes: logic low enables full DCM for peak light-load efficiency; logic high forces CCM for best transient response; floating configures ultrasonic DCM (≥28kHz), which maintains high efficiency while suppressing audible noise from inductor vibration. This flexibility lets designers optimize for battery life, performance, or acoustic requirements without changing hardware.
Does the ISL62386HRTZ require external bootstrap diodes for high-side gate drive?
No, the ISL62386HRTZ integrates bootstrap diodes from the LDO5 output to BOOT1 and BOOT2 pins. These diodes charge the external 0.22µF bootstrap capacitors each time the low-side FET turns on, eliminating the need for discrete diodes and reducing PCB area and BOM cost. The forward voltage is characterized at 0.58V typical, with reverse leakage <1µA at 25V.
ISL62386HRTZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Handheld/Mobile Devices
- Voltage - Input:
- 5.5V ~ 25V
- Voltage - Supply:
- 5.5V ~ 25V
- Current - Supply:
- -
- Operating Temperature:
- -10°C ~ 100°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-TQFN (5x5)
ISL62386HRTZ FAQ
1.How can I place an order for ISL62386HRTZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL62386HRTZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL62386HRTZ reliable?
The price and inventory of ISL62386HRTZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL62386HRTZ is usually 5 days.
3.What payment methods are accepted for ISL62386HRTZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL62386HRTZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL62386HRTZ?
ISL62386HRTZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL62386HRTZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL62386HRTZ?
For technical support, including ISL62386HRTZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL62386HRTZ requirements.
6.How does Aetrix verify that ISL62386HRTZ is sourced from the original manufacturer or authorized distributors?
All ISL62386HRTZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL62386HRTZ meets industry standards.
7.What is the process for return or replacement of ISL62386HRTZ?
All ISL62386HRTZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL62386HRTZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL62386HRTZ part is unused and in its original packaging.
Return procedure for ISL62386HRTZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL62386HRTZ Tags
-
UC3845AD8TR
Texas Instruments
-
UC2843AD8TR
Texas Instruments
-
LM3880MFX-1AE/NOPB
Texas Instruments
-
LM3880MFX-1AA/NOPB
Texas Instruments
-
INA234AIYBJR
Texas Instruments
-
INA700AYWFR
Texas Instruments
-
LM3880MF-1AE/NOPB
Texas Instruments
-
LM3880MF-1AA/NOPB
Texas Instruments
-
LM3881MM/NOPB
Texas Instruments
-
UCC2802DTR
Texas Instruments
-
NCP4305DMTTWG
onsemi
-
INA237AIDGSR
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
