Renesas ISL6265HRTZ
- Part No.:
- ISL6265HRTZ
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
ISL6265HRTZ.pdf
- Description:
- IC REG CTRLR AMD 3OUT 48TQFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,755
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6265HRTZ from Intersil is a multi-output voltage regulator controller with integrated MOSFET drivers for AMD SVI-capable mobile CPUs. It delivers three independent regulated outputs-VDDNB (Northbridge), VDD0, and VDD1-with 0.5% system accuracy over temperature, R3 Technology™ fast transient response, and configurable dual-plane or uniplane core operation. Used in high-performance laptop motherboards to power AMD Mobile CPU cores and Northbridge.
For engineers reviewing the ISL6265HRTZ datasheet, ISL6265HRTZ pinout, ISL6265HRTZ application, or ISL6265HRTZ equivalent, this page provides verified technical context, validated pin functions, confirmed switching frequency range (200–500 kHz), real-world current sensing methods (DCR and rDS(ON)), and two documented alternative parts for AMD mobile VR design continuity.
Technical Context
The ISL6265HRTZ implements Intersil's patented R3 Technology™ modulator, synthesizing an analog of inductor ripple current to enable variable-frequency hysteretic control with fixed-frequency PWM stability-achieving faster load transient response than conventional buck controllers. Its error amplifier provides 90 dB DC gain and 18 MHz gain-bandwidth product for precise closed-loop regulation.
It supports dual configuration modes: as two independent single-phase controllers (VDD0/VDD1) for dual-plane CPUs, or as a two-phase interleaved controller for uniplane CPUs-reducing output ripple amplitude by doubling effective ripple frequency. Core and Northbridge outputs feature differential remote sensing, lossless DCR/rDS(ON) current sensing, and PSI_L–enabled phase shedding.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Configuration | Three independent outputs: 1× Northbridge (VDDNB), 2× Core (VDD0/VDD1); configurable as dual single-phase or uniplane two-phase |
| Voltage Range (SVI) | 0.500 V to 1.55 V in 12.5 mV steps; 0.5% system accuracy over –10°C to +100°C ambient |
| Switching Frequency | 200–500 kHz user-programmable per channel via FSET_NB, VW0, VW1 resistors |
| Gate Drive Capability | 2 A sink/source per UGATE/LGATE; <1.5 Ω source/sink resistance enables direct drive of low-Qg MOSFETs |
| Current Sensing | Core: lossless DCR sensing (ISPx/ISNx); Northbridge: rDS(ON) sensing (OCSET_NB with RBIAS = 117 kΩ) |
| Protection Features | Per-channel OVP (1.77–1.82 V), UVP (240–350 mV), OCP; PGOOD assertion after 570–1010 µs soft-start |
| Interface Protocol | Two-wire Serial VID (SVC/SVD) compatible with AMD SVI; supports high-speed I²C and PSI_L power-saving mode |
Pinout & Package
ISL6265HRTZ is housed in a Pb-free, RoHS-compliant 48-lead 6 mm × 6 mm TQFN package with exposed thermal pad (PKG DWG # L48.6x6). The package supports θJA = 30°C/W and θJC = 1.5°C/W for high-power mobile VR applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Bias supply input | +5 V ±5% supply for control logic; decoupled with 0.1 µF ceramic capacitor |
| PVCC | Gate driver power rail | +5 V supply for internal MOSFET drivers; requires 1.0 µF ceramic decoupling |
| ENABLE | Digital enable input | Active-high logic input; enables all regulators when >2.0 V (VIH threshold) |
| SVC / SVD | SVI clock/data interface | Two-wire bidirectional bus for dynamic VID programming per AMD SVI spec |
| FB_0 / FB_1 / FB_NB | Output voltage feedback | Inverting inputs to error amplifiers; used with external resistor dividers for precise VDD0/VDD1/VDDNB regulation |
| VSEN0 / RTN0 / VSEN1 / RTN1 / VSEN_NB / RTN_NB | Differential remote sense inputs | Enable accurate die-level voltage regulation per AMD mobile CPU specifications |
| UGATE_0 / LGATE_0 / UGATE_1 / LGATE_1 / UGATE_NB / LGATE_NB | MOSFET gate drive outputs | Direct-drive outputs with 2 A sink/source capability; include shoot-through protection |
| ISP0 / ISN0 / ISP1 / ISN1 / OCSET_NB | Current sense inputs | Support lossless DCR sensing (core) and rDS(ON) sensing (Northbridge) for OCP and load-line control |
Key Features
| Feature | Design Value |
|---|---|
| R3 Technology™ modulator | Hybrid hysteretic-PWM architecture enabling faster transient response than fixed-frequency PWM while maintaining 0.5% voltage accuracy |
| Configurable core topology | Automatic detection of dual-plane vs uniplane CPU via RTN1 strap; no firmware or external configuration required |
| Differential remote sensing | Unity-gain differential amplifiers on VSEN/RTN pins compensate for PCB IR drop, ensuring CPU die voltage meets AMD spec |
| Lossless current sensing | DCR-based core sensing eliminates sense resistor power loss; rDS(ON) NB sensing avoids additional components |
| PSI_L–enabled phase shedding | Reduces switching losses during light-load conditions by idling one phase in uniplane mode under PSI_L assertion |
| Programmable droop & offset | OFS/VFIXEN pin supports voltage positioning via external resistor for adaptive load-line compliance with AMD requirements |
Applications
| AMD Dual-Plane Mobile CPU Power | AMD Uniplane Mobile CPU Power |
|---|---|
Use Scenario: High-end notebook motherboard powering AMD Turion or Athlon Neo dual-core processors with separate VDD0/VDD1 planes. IC Role / Device Role / Timing Role: Primary multi-output VR controller managing independent VDD0 and VDD1 rails with differential remote sensing and DCR current monitoring. Use Value: Enables precise per-plane voltage regulation, dynamic VID updates via SVI, and robust OVP/UVP/OCP protection across both core domains. |
Use Scenario: Ultraportable laptop design using AMD single-core mobile CPUs requiring interleaved two-phase core regulation. IC Role / Device Role / Timing Role: Configured as two-phase buck controller for VDD0, reducing output ripple amplitude by doubling effective switching frequency. Use Value: Achieves lower output capacitance requirement, reduced component count, and smaller PCB area versus discrete single-phase solutions. |
| Mobile Northbridge Regulation | SVI-Based Dynamic Voltage Scaling |
Use Scenario: Notebook platform with discrete AMD Northbridge chip requiring tightly regulated VDDNB supply. IC Role / Device Role / Timing Role: Dedicated single-phase controller channel with rDS(ON) current sensing and dedicated FB/COMP loop for VDDNB. Use Value: Eliminates need for external current-sense resistor; achieves 0.5% accuracy over temperature without calibration. |
Use Scenario: Systems requiring real-time CPU voltage adjustment during performance state transitions (e.g., C-states, P-states). IC Role / Device Role / Timing Role: SVI interface (SVC/SVD) decodes processor VID commands; supports VID-on-the-fly transitions at 5–10 mV/µs. Use Value: Enables dynamic power optimization with sub-millisecond voltage settling, meeting AMD mobile CPU timing requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-output mobile CPU voltage regulator controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6265A | Pin-compatible revision with improved thermal performance and updated SVI timing compliance; replaces ISL6265HRTZ per Intersil recommendation | Same AMD mobile CPU support; validated for newer SVI protocol revisions and higher junction temperature margin (+125°C max) | Select ISL6265A for new designs requiring extended lifecycle support and enhanced reliability in thermally constrained layouts. |
| RT8802A | Single-chip dual-output controller with integrated drivers; lacks Northbridge channel and SVI interface-requires external I²C master for VID control | Targeted at cost-sensitive single-plane notebooks; does not support AMD dual-plane or Northbridge regulation natively | Consider RT8802A only for simplified uniplane core applications where Northbridge regulation and native SVI are not required. |
Compared with ISL6265HRTZ, ISL6265A offers direct replacement compatibility and improved thermal specs, while RT8802A provides lower BOM cost at the expense of missing Northbridge support and requiring external VID management-making ISL6265A the preferred upgrade path for continuity in AMD mobile platforms.
Availability
ISL6265HRTZ is available at Aetrix Electronics and suitable for AMD mobile CPU power delivery, notebook motherboard VR design, and embedded x86 platform development requiring stable component supply and legacy design support.
Supply support for ISL6265HRTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil (now part of Renesas Electronics) is a semiconductor company specializing in precision analog, power management, and interface ICs for computing, industrial, and communications markets.
The ISL6265HRTZ belongs to Intersil's mobile CPU voltage regulator controller product line, designed specifically to meet AMD's SVI interface, dual-plane/uniplane flexibility, and tight accuracy requirements for high-performance laptop platforms.
FAQ
What is the operating temperature range for the ISL6265HRTZ?
The ISL6265HRTZ is rated for ambient operation from –10°C to +100°C, with junction temperature limits up to +125°C. This range aligns with AMD mobile CPU thermal envelopes and supports reliable deployment in compact, fanless, or high-ambient notebook environments. All electrical specifications-including 0.5% system accuracy-are guaranteed across this full range.
Does the ISL6265HRTZ support both dual-plane and uniplane CPU configurations?
Yes, the ISL6265HRTZ automatically detects CPU topology via the RTN1 pin state prior to ENABLE assertion: low RTN1 configures independent VDD0/VDD1 single-phase regulators for dual-plane CPUs; high RTN1 configures interleaved two-phase operation for uniplane CPUs. No external configuration or firmware is needed-detection is hardware-based and deterministic.
How does the R3 Technology™ in the ISL6265HRTZ improve transient response?
The ISL6265HRTZ uses R3 Technology™ to synthesize a noise-immune analog of inductor ripple current and compare it against a window referenced to the error amplifier output. During load transients, this architecture increases switching frequency dynamically-reducing voltage deviation faster than fixed-frequency PWM-while retaining 0.5% steady-state accuracy via the error amplifier's 90 dB DC gain.
What current sensing methods does the ISL6265HRTZ support?
The ISL6265HRTZ supports lossless DCR sensing on core outputs (VDD0/VDD1) using ISP0/ISN0 and ISP1/ISN1 pins, and rDS(ON) sensing on the Northbridge output (VDDNB) via OCSET_NB with RBIAS = 117 kΩ. Both methods eliminate external sense resistors, reduce power loss, and maintain accuracy across temperature without calibration.
Is the ISL6265HRTZ still recommended for new designs?
No-the official Intersil datasheet (FN6599.1, May 2009) states "NOT RECOMMENDED FOR NEW DESIGNS" and identifies ISL6265A as the recommended replacement. ISL6265HRTZ remains available for legacy design support, repair, and obsolescence mitigation, but new projects should use ISL6265A for updated thermal performance and SVI compliance.
ISL6265HRTZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- Robust Ripple Regulator™ (R3)
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- Controller, AMD SVI Capable Mobile CPU
- Voltage - Input:
- 5V ~ 24V
- Number of Outputs:
- 3
- Voltage - Output:
- 0.5V ~ 1.55V
- Operating Temperature:
- -10°C ~ 100°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-TQFN (6x6)
ISL6265HRTZ FAQ
1.How can I place an order for ISL6265HRTZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6265HRTZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6265HRTZ reliable?
The price and inventory of ISL6265HRTZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6265HRTZ is usually 5 days.
3.What payment methods are accepted for ISL6265HRTZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6265HRTZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6265HRTZ?
ISL6265HRTZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6265HRTZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6265HRTZ?
For technical support, including ISL6265HRTZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6265HRTZ requirements.
6.How does Aetrix verify that ISL6265HRTZ is sourced from the original manufacturer or authorized distributors?
All ISL6265HRTZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6265HRTZ meets industry standards.
7.What is the process for return or replacement of ISL6265HRTZ?
All ISL6265HRTZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL6265HRTZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6265HRTZ part is unused and in its original packaging.
Return procedure for ISL6265HRTZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6265HRTZ Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

