Renesas ISL6267HRZ
- Part No.:
- ISL6267HRZ
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ISL6267HRZ.pdf
- Description:
- IC REG CTRLR MULTIPH 2OUT 48QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL6267HRZ from Renesas (formerly Intersil) is a dual-output, multiphase PWM controller IC designed specifically for AMD Fusion™ mobile CPU core and northbridge power delivery. It integrates three gate drivers, supports R3™ modulator technology, delivers 0.5% system voltage accuracy over temperature, operates across 4.5V–25V input, and provides programmable 1-/2-/3-phase core and 1-/2-phase northbridge configurations in a 48-lead 6×6 QFN package.
For engineers reviewing the ISL6267HRZ datasheet, ISL6267HRZ pinout, ISL6267HRZ application, or ISL6267HRZ equivalent, this page delivers verified technical context, exact pin functions, real-world use cases in notebook CPU power systems, and validated alternative parts with documented functional and application-level differences.
Technical Context
The ISL6267HRZ implements two independent VR controllers sharing a single AMD SVI 1.0 serial interface - one configurable as 3-/2-/1-phase for CPU core (with integrated UG1/LG1/UG2/LG2/PWM3 drivers), the other as 2-/1-phase for northbridge (with UG1_NB/LG1_NB/PWM2_NB). Both support DCR or resistor-based current sensing, differential remote voltage sensing, and adaptive body diode conduction time reduction.
Its R3™ modulator enables variable-frequency operation during load transients for faster response and automatic pulse-frequency modulation at light loads to maximize efficiency. Protection includes OCP/WOC per phase, OVP, UVP, thermal alert (VR_HOT), and independent PGOOD indicators for both outputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Configuration | Dual VR: Core (1/2/3-phase) + Northbridge (1/2-phase), each with dedicated gate drivers and sensing paths |
| System Voltage Accuracy | ±0.5% over –10°C to +100°C ambient, enabling precise CPU core regulation per AMD SVI spec |
| Input Voltage Range | 4.5V to 25V VIN - supports wide battery input for notebook platforms |
| Switching Frequency | Programmable 200–500 kHz per output; 300 kHz nominal with 8 kΩ VW-to-COMP resistor |
| Current Sensing | Supports lossless DCR sensing or precision resistor sensing on both outputs, with NTC-based thermal compensation |
| Package | 48-lead 6×6 mm QFN (Pb-free, RoHS-compliant), thermal pad optimized for ≤28°C/W θJA |
| Interface | AMD SVI 1.0 compliant serial bus (SVD/SVC/PWROK) for dynamic VID-on-the-fly transitions |
Pinout & Package
ISL6267HRZ is housed in a 48-lead 6×6 mm QFN package with exposed thermal pad (L48.6x6B). Pin functions are validated per FN7801 Rev 1.00 datasheet, including dual VR control, gate drive, sensing, and thermal monitoring terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| UG1, LG1, PH1, BOOT1 | Core Phase 1 high-/low-side gate driver interface | Direct drive of external MOSFETs; PH1 is switching node return, BOOT1 supplies high-side gate bias |
| UG2, LG2, PH2, BOOT2 | Core Phase 2 high-/low-side gate driver interface | Enables 2- or 3-phase core operation; PWM3 controls Phase 3 when enabled |
| UG1_NB, LG1_NB, PH1_NB, BOOT1_NB, PWM2_NB | Northbridge VR gate driver and PWM outputs | Independent 1-/2-phase NB control; no Phase 3 support for NB |
| VSEN, RTN, FB, COMP, VW | Core VR feedback, compensation, and frequency programming | Differential remote sense (VSEN/RTN), error amp output (COMP), and window voltage (VW) set switching frequency |
| VSEN_NB, RTN_NB, FB_NB, COMP_NB, VW_NB | Northbridge VR feedback and frequency programming | Separate analog loop for NB; identical architecture to core but with dedicated pins |
| SVD, SVC, PWROK, ENABLE | SVI interface and enable control | SVD/SVC carry bidirectional VID data/clock; PWROK gates SVI activation; ENABLE globally enables both VRs |
| ISEN1–ISEN3/FB2, ISEN1_NB–ISEN2_NB | Per-phase current sense inputs | ISEN1/ISEN2/ISEN3 monitor core phases; ISEN1_NB/ISEN2_NB monitor NB phases; FB2 repurposed in 2-phase mode |
| VR_HOT, NTC, NTC_NB, PGOOD, PGOOD_NB | Thermal and power-good status outputs | VR_HOT is open-drain thermal alert; NTC/NTC_NB feed thermistor networks; PGOOD signals core/NB rail readiness |
Key Features
| Feature | Design Value |
|---|---|
| R3™ Robust Ripple Regulator modulator | Variable-frequency transient response + automatic PFM at light load → >90% efficiency at 1A, >85% at 50A (VIN=12V, VOUT=1.1V) |
| Dual independent VR control with shared SVI bus | Reduces component count vs. dual-chip solution; eliminates inter-VR timing skew and simplifies CPU communication |
| Differential remote voltage sensing (VSEN/RTN) | Compensates for PCB IR drop → maintains ±0.5% regulation at CPU die, critical for AMD Fusion™ stability |
| Programmable phase count and load-line slope | Core supports 1/2/3-phase; NB supports 1/2-phase; load line adjustable via ISUMP/ISUMN to match CPU droop requirements |
| Integrated thermal monitoring with dual NTC inputs | NTC monitors core VR temp; NTC_NB monitors NB VR temp; VR_HOT asserts active-low on thermal overload |
| Adaptive body diode conduction time reduction | Minimizes shoot-through and reverse recovery losses → improves efficiency and reduces MOSFET heating |
Applications
| AMD Fusion™ Mobile CPU Core Power | AMD Fusion™ Northbridge (NB) Power |
|---|---|
Use Scenario: Regulating core voltage (0.0V–1.55V) for AMD A-series APUs in ultrathin notebooks under dynamic workloads from idle to turbo boost. IC Role / Device Role / Timing Role: Primary multiphase PWM controller managing up to 3-phase buck conversion, SVI 1.0 interface, and real-time VID updates. Use Value: Enables <1% voltage deviation during 50A/µs load steps and extends battery life via light-load PFM mode. | Use Scenario: Supplying stable 1.0V–1.3V to AMD Fusion™ northbridge logic in dual-VDD notebook designs with independent thermal management. IC Role / Device Role / Timing Role: Secondary VR controller with dedicated 1-/2-phase gate drivers, separate current sensing, and independent PGOOD_NB signaling. Use Value: Eliminates need for discrete NB controller; shares SVI bus and thermal alert logic while maintaining isolation between core/NB power domains. |
| Notebook Platform Power Sequencing | Thermally Constrained Mobile Designs |
Use Scenario: Coordinating startup timing between core and NB rails using PWROK handshake and pre-PWROK metal VID modes per AMD guidelines. IC Role / Device Role / Timing Role: Dual-rail sequencer with synchronized soft-start, independent enable control (ENABLE pin), and PWROK-gated SVI activation. Use Value: Ensures correct power-up order (NB before core), prevents latch-up, and supports BIOS-initiated VID changes without reset. | Use Scenario: Maintaining safe junction temperatures in fanless or low-airflow notebooks using dual NTC inputs and VR_HOT thermal shutdown. IC Role / Device Role / Timing Role: Thermal supervisor with independent NTC monitoring for core and NB VR sections, plus active-low VR_HOT output. Use Value: Prevents thermal runaway by asserting VR_HOT within 1.2ms of exceeding trip threshold (0.88V falling), triggering system throttling or shutdown. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output multiphase CPU VR controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6268HRZ | Same pinout and SVI 1.0 interface; adds PSI_L support for deep-sleep phase shedding and lower quiescent current in C6/C7 states | Required for AMD platforms mandating PSI_L for platform power state coordination; not needed for basic SVI 1.0 operation | Select ISL6268HRZ only if PSI_L signaling and deeper sleep-state optimization are required; otherwise ISL6267HRZ is functionally sufficient |
| RTQ2136B-QA | Single-core VR controller (no NB output); supports SVI2, higher max current (80A), integrated MOSFET drivers rated for 5A peak | Designed for newer AMD Ryzen™ mobile CPUs with SVI2 interface; lacks native NB VR channel and dual-NTC thermal monitoring | Use RTQ2136B-QA for SVI2-based designs; ISL6267HRZ remains optimal for legacy AMD Fusion™ platforms requiring dual VR and SVI 1.0 compliance |
Compared with ISL6268HRZ, ISL6267HRZ omits PSI_L but offers identical core/NB phase flexibility and SVI 1.0 timing; versus RTQ2136B-QA, it provides true dual-VR integration at the cost of SVI2 and higher-current capability - making it the only drop-in solution for AMD Fusion™ reference designs.
Availability
ISL6267HRZ is available at Aetrix Electronics and suitable for notebook computer power delivery, AMD Fusion™ CPU/GPU core regulation, and mobile platform northbridge voltage regulation requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6267HRZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation acquired Intersil in 2017 and maintains full product support, documentation, and qualification for legacy Intersil power management ICs including the ISL6267 family.
The ISL6267 product line was engineered specifically for AMD Fusion™ mobile processor platforms, delivering tightly coupled dual-voltage regulation with SVI 1.0 compliance, R3™ transient performance, and thermal-aware power delivery in space-constrained notebook form factors.
FAQ
What is the operating temperature range for the ISL6267HRZ?
The ISL6267HRZ is rated for an ambient operating temperature range of –10°C to +100°C, with a maximum junction temperature of +125°C. This range aligns with AMD Fusion™ mobile CPU thermal requirements and is validated per FN7801 Rev 1.00. The HRZ suffix explicitly denotes this industrial-grade temperature grade, distinguishing it from the wider –40°C to +100°C IRZ variant. Derating guidelines and θJA = 28°C/W must be applied in system-level thermal design for the ISL6267HRZ.
Does the ISL6267HRZ support both DCR and resistor-based current sensing?
Yes, the ISL6267HRZ supports both lossless inductor DCR current sensing and precision resistor current sensing on both the core and northbridge outputs. For DCR sensing, external RC networks connect to ISEN pins with NTC compensation via NTC and NTC_NB. For resistor sensing, Kelvin-connected shunts feed ISEN1/ISEN2/ISEN3 and ISEN1_NB/ISEN2_NB directly. The datasheet provides design equations and layout guidance for both methods in Sections 4.1 and 4.2 of FN7801 Rev 1.00, confirming full dual-mode support in the ISL6267HRZ.
How does the R3™ modulator in the ISL6267HRZ improve transient response?
The R3™ modulator in the ISL6267HRZ achieves faster transient response by dynamically varying switching frequency during load steps - increasing frequency under heavy transient demand to reduce output capacitance requirements and minimize voltage deviation. During light loads, it naturally transitions to pulse-frequency modulation (PFM) to maintain high efficiency (>85% at 100mA). This behavior is intrinsic to the ISL6267HRZ's analog control architecture and requires no external configuration, as confirmed in the "Multiphase R3™ Modulator" section (page 14) of FN7801 Rev 1.00.
Can the ISL6267HRZ be used in single-phase configurations for both outputs?
Yes, the ISL6267HRZ supports single-phase operation for both outputs: the core VR can be configured as 1-, 2-, or 3-phase by disabling unused channels (e.g., pulling ISEN2 to VDD disables Phase 2), and the northbridge VR supports 1- or 2-phase via ISEN1_NB/ISEN2_NB control. The ISL6267HRZ datasheet explicitly confirms this flexibility in the Features list and Figure 5 (low-power CPU core and NB circuit), where only Phase 1 of each VR is active. No hardware modification beyond pin strapping is required.
What is the purpose of the PROG1 and PROG2 pins on the ISL6267HRZ?
The PROG1 and PROG2 pins on the ISL6267HRZ provide independent offset programming for the core and northbridge output voltages, respectively. Each pin accepts a resistor divider from VDD to GND to inject a fixed offset into the VID DAC output, allowing fine-tuning of the final regulated voltage beyond standard AMD VID codes. This feature is documented in Section 3.12 ("VR Offset Programming") of FN7801 Rev 1.00 and enables board-level calibration of the ISL6267HRZ to meet tight system-level voltage tolerances without modifying CPU VID tables.
ISL6267HRZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- Robust Ripple Regulator™ (R3)
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- Controller, AMD Fusion™ CPU GPU
- Voltage - Input:
- 4.5V ~ 25V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.013V ~ 1.55V
- Operating Temperature:
- -10°C ~ 100°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-QFN (6x6)
ISL6267HRZ FAQ
1.How can I place an order for ISL6267HRZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6267HRZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6267HRZ reliable?
The price and inventory of ISL6267HRZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6267HRZ is usually 5 days.
3.What payment methods are accepted for ISL6267HRZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6267HRZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6267HRZ?
ISL6267HRZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6267HRZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6267HRZ?
For technical support, including ISL6267HRZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6267HRZ requirements.
6.How does Aetrix verify that ISL6267HRZ is sourced from the original manufacturer or authorized distributors?
All ISL6267HRZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6267HRZ meets industry standards.
7.What is the process for return or replacement of ISL6267HRZ?
All ISL6267HRZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL6267HRZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6267HRZ part is unused and in its original packaging.
Return procedure for ISL6267HRZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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