My Inquiry
My Account
Renesas ISL6323AIRZ-TR5381
- Part No.:
- ISL6323AIRZ-TR5381
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ISL6323AIRZ-TR5381.pdf
- Description:
- IC REG CTRLR AMD SVI 2OUT 48QFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,923
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6323AIRZ-TR5381 from Renesas Electronics (formerly Intersil) is a monolithic dual PWM hybrid controller for AMD SVI/PVI split-plane and uniplane processors, delivering precision core voltage regulation via 2–4-phase synchronous buck conversion and independent Northbridge (VDDNB) regulation via single-phase conversion, with ±0.6% system accuracy over temperature, differential remote sensing, and droop-based load line programming - deployed in high-performance desktop and server CPU power delivery.
For engineers reviewing the ISL6323AIRZ-TR5381 datasheet, ISL6323AIRZ-TR5381 pinout, ISL6323AIRZ-TR5381 application, or ISL6323AIRZ-TR5381 equivalent, key selection considerations include SVI/PVI mode configurability, integrated gate drivers (PVCC1_2 and PVCC_NB bias range 5V–12V), fully differential DCR current sensing per phase, adaptive phase alignment (APA), and -40°C to +85°C industrial temperature operation in 48-lead QFN.
Technical Context
The ISL6323AIRZ-TR5381 implements two independent control loops: a multi-phase VR controller supporting 2–4 phases for VDD core (with APA, dual-edge modulation, and channel current balancing) and a dedicated single-phase VR controller for VDDNB. It supports both AMD Serial VID (SVI) and Parallel VID (PVI) interfaces, with mode selected by VID1/SEL prior to EN assertion.
Core regulation uses continuous fully differential DCR sensing across ISEN1±–ISEN4± for load line programming and channel balancing; NB regulation uses ISEN_NB± sensing. Both sections feature simultaneous digital soft-start, selectable switching frequency up to 1MHz, and multi-tiered overvoltage/overcurrent protection including average and individual channel OCP thresholds.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Temp Range | -40°C to +85°C - qualified for industrial-grade CPU power delivery in thermally demanding server/desktop platforms. |
| Core Voltage Accuracy | ±0.6% over temperature - enables tight regulation of modern AMD processor core voltages without external calibration. |
| Switching Frequency | Up to 1 MHz - allows smaller magnetics and faster transient response; adjustable via FS pin resistor. |
| VID Interface Support | AMD SVI (2-wire clock/data) and PVI (6-bit parallel) - provides backward and forward compatibility across AMD processor generations. |
| Gate Drive Bias Range | PVCC1_2 and PVCC_NB: 5V to 12V - supports wide selection of MOSFETs with optimized Rds(on) vs. switching loss trade-offs. |
| Droop Load Line | Programmable via RSET and DCR sensing - reduces bulk output capacitance requirements while maintaining stable load-line compliance. |
| Phase Shedding | PSI_L-triggered - drops multi-phase section to 1-phase at light load, improving efficiency without requiring external logic. |
Pinout & Package
ISL6323AIRZ-TR5381 is housed in a 48-lead, 7mm × 7mm, 0.5mm pitch QFN package with exposed thermal pad (PKG DWG L48.7x7). Pin functions are validated per FN6878.0 datasheet Figure 1 (top view) and Functional Pin Description (pages 9–11).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VID1/SEL | Mode Selection Input | Latched at EN rising edge to select SVI (LO) or PVI (HI); determines function of VID0/VFIXEN, VID2/SVD, VID3/SVC pins. |
| ISEN1±–ISEN4± | Core Channel Current Sense Inputs | Fully differential DCR sensing inputs for 4-phase operation; enable precise per-channel current balance and droop programming. |
| ISEN_NB± | Northbridge Current Sense Inputs | Differential input for NB output current sensing; used for NB OCP and optional droop regulation. |
| UGATE1/2, LGATE1/2, UGATE_NB, LGATE_NB | Integrated Gate Drivers | Direct drive outputs for upper/lower MOSFETs; support shoot-through protection and adaptive non-overlap timing. |
| VSEN / RGND / FB / COMP | Core VR Feedback & Compensation | Differential remote sense (VSEN/RGND), error amp inverting input (FB), and output (COMP) - form closed-loop regulation path. |
| FB_NB / COMP_NB / RGND_NB | Northbridge VR Feedback & Compensation | Independent feedback path for VDDNB regulation, identical architecture to core VR but separate compensation network. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive Phase Alignment (APA) | Adjustable trip level via APA-to-COMP resistor; dynamically aligns phase timing to minimize output voltage deviation during load transients. |
| Active Pulse Positioning (APP) Modulation | Enables sub-cycle PWM edge placement - delivers faster initial response to high di/dt load steps than conventional fixed-frequency PWM. |
| Integrated Dual Gate Drivers | Two independent driver blocks (multi-phase and NB) with 5V–12V bias flexibility - eliminates need for external drivers in 2-phase core + 1-phase NB configurations. |
| Simultaneous Digital Soft-Start | Coordinated ramp-up of both core and NB outputs - prevents sequencing violations and ensures safe CPU/NB power-up. |
| Multi-Tier Overvoltage Protection | Core OVP threshold = VDAC + 250mV (typ), with hysteresis and lower gate release at 375mV - protects processor against catastrophic overvoltage events. |
Applications
| Desktop CPU Power Delivery | Server Processor VRM |
|---|---|
Use Scenario: High-efficiency 2–4-phase VRM on ATX motherboard powering AMD Phenom II or FX-series CPUs with SVI interface. IC Role / Device Role / Timing Role: Primary dual-output PWM controller managing VDD core (multi-phase) and VDDNB (single-phase) with synchronized soft-start and droop-based load line. Use Value: Enables ±0.6% core voltage accuracy and fast transient response required for dynamic frequency scaling (Turbo Core), reducing bulk capacitor count by >30% versus non-droop designs. | Use Scenario: Dual-socket server board supplying AMD Opteron processors with split-plane power architecture and PVI VID interface. IC Role / Device Role / Timing Role: Hybrid controller operating in PVI mode to regulate uniplane VDD only; NB regulator disabled per design - simplifies layout and reduces BOM cost. Use Value: Supports legacy 6-bit VID decoding (0.775V–1.55V @ 25mV steps) with full thermal accuracy, eliminating need for external DAC or VID translator ICs. |
| AMD SVI-Compatible Embedded System | Industrial CPU Power Module |
Use Scenario: Compact embedded computing platform using AMD G-Series APUs with serial VID interface and thermal-constrained PCB layout. IC Role / Device Role / Timing Role: SVI-mode controller providing core and NB regulation with integrated drivers and differential remote sensing to compensate for PCB trace IR drop. Use Value: Differential sensing (VSEN/RGND, FB_NB/RGND_NB) maintains regulation accuracy despite 50+ mΩ sense path resistance, critical for small-form-factor designs. | Use Scenario: Conformal-coated industrial control module requiring extended temperature operation (-40°C to +85°C) and long-term supply continuity. IC Role / Device Role / Timing Role: Industrial-grade dual VR controller with Pb-free + anneal (RoHS-compliant) packaging and MSL3 reflow profile compatibility. Use Value: Qualified for -40°C to +85°C ambient and specified with θJA = 27°C/W - enables reliable operation in fanless enclosures with limited airflow. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output CPU voltage regulator controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6323ACRZ | Same silicon, 0°C to +70°C temp grade; identical pinout, features, and electrical specs except ambient rating. | Restricted to commercial-temperature environments (e.g., consumer desktops); not suitable for industrial or extended-temp server chassis. | Select ISL6323ACRZ only when ambient operating temperature remains within 0–70°C and cost sensitivity outweighs industrial qualification needs. |
| RT8802A | Single-chip dual controller with SVI/PVI support, but lacks APA, APP modulation, and integrated NB driver - requires external NB driver IC. | Supports same AMD processors but mandates additional components for NB regulation and delivers slower transient response due to conventional PWM architecture. | Choose RT8802A only if BOM cost reduction is prioritized over transient performance and layout simplicity; verify NB driver compatibility and compensation redesign. |
Compared with ISL6323ACRZ, the ISL6323AIRZ-TR5381 adds industrial temperature range and extended reliability validation; compared with RT8802A, it integrates NB gate drivers and delivers superior transient response via APA/APP, reducing component count and improving regulation stability under dynamic loads.
Availability
ISL6323AIRZ-TR5381 is available at Aetrix Electronics and suitable for desktop CPU VRMs, server processor power modules, and industrial embedded systems requiring stable component supply, long lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6323AIRZ-TR5381 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation acquired Intersil in 2017 and continues to manufacture and support its high-performance analog and power management portfolio.
The ISL6323AIRZ-TR5381 belongs to Renesas' CPU voltage regulator controller product line, designed specifically for AMD processor power delivery with emphasis on SVI/PVI interface compatibility, multi-phase efficiency, and industrial-grade reliability.
FAQ
What is the maximum supported switching frequency for ISL6323AIRZ-TR5381?
The ISL6323AIRZ-TR5381 supports a typical adjustment range of 0.08 MHz to 1.0 MHz, set by an external resistor on the FS pin. At RT = 100kΩ tied to VCC, the nominal frequency is 275 kHz (–40°C to +85°C); higher frequencies require careful layout and gate drive optimization to maintain stability and minimize EMI.
Does ISL6323AIRZ-TR5381 support both AMD SVI and PVI interfaces simultaneously?
No - the ISL6323AIRZ-TR5381 selects SVI or PVI mode at power-up based on the latched state of the VID1/SEL pin prior to EN assertion. In SVI mode, VID0/VFIXEN, VID2/SVD, and VID3/SVC operate as serial interface signals; in PVI mode, those pins become VID0–VID3 inputs alongside VID4 and VID5.
How does the droop load line function in ISL6323AIRZ-TR5381?
The ISL6323AIRZ-TR5381 implements droop via programmable current-sense gain (set by RSET) and fully differential DCR sensing on ISEN1±–ISEN4±. The sensed current generates a proportional voltage offset added to the reference, creating a controlled voltage drop proportional to load - enabling reduced output capacitance while maintaining AMD-compliant load line specifications.
What is the purpose of the APA pin on ISL6323AIRZ-TR5381?
The APA (Adaptive Phase Alignment) pin on ISL6323AIRZ-TR5381 sinks a precise 100 µA current; connecting a resistor from APA to COMP sets the trip threshold for dynamic phase realignment. This feature minimizes output voltage deviation during rapid load transients by adjusting PWM timing across phases in real time - a key differentiator for high-di/dt CPU workloads.
Can ISL6323AIRZ-TR5381 operate with only the core VR section active?
Yes - in PVI mode, the NB VR section is automatically disabled, leaving only the multi-phase core controller active. In SVI mode, both sections operate unless explicitly disabled via SVI command; the NB section can also be shut down by pulling EN low or disconnecting PVCC_NB while maintaining core regulation integrity.
ISL6323AIRZ-TR5381 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, AMD SVI
- Voltage - Input:
- 5V ~ 12V
- Number of Outputs:
- 2
- Voltage - Output:
- Up to 2V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-QFN (7x7)
ISL6323AIRZ-TR5381 FAQ
1.How can I place an order for ISL6323AIRZ-TR5381 through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6323AIRZ-TR5381 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6323AIRZ-TR5381 reliable?
The price and inventory of ISL6323AIRZ-TR5381 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6323AIRZ-TR5381 is usually 5 days.
3.What payment methods are accepted for ISL6323AIRZ-TR5381?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6323AIRZ-TR5381 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6323AIRZ-TR5381?
ISL6323AIRZ-TR5381 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6323AIRZ-TR5381 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6323AIRZ-TR5381?
For technical support, including ISL6323AIRZ-TR5381 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6323AIRZ-TR5381 requirements.
6.How does Aetrix verify that ISL6323AIRZ-TR5381 is sourced from the original manufacturer or authorized distributors?
All ISL6323AIRZ-TR5381 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6323AIRZ-TR5381 meets industry standards.
7.What is the process for return or replacement of ISL6323AIRZ-TR5381?
All ISL6323AIRZ-TR5381 units undergo pre-shipment inspection (PSI). If there is an issue with ISL6323AIRZ-TR5381, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6323AIRZ-TR5381 part is unused and in its original packaging.
Return procedure for ISL6323AIRZ-TR5381:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6323AIRZ-TR5381 Tags
-
TPS51206DSQR
Texas Instruments
-
TPS51200DRCR
Texas Instruments
-
TPS51200DRCT
Texas Instruments
-
TPS62740DSSR
Texas Instruments
-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi
-
RT9026GSP
Richtek USA Inc.
-
LP2998MRX/NOPB
Texas Instruments
-
TPS51200QDRCRQ1
Texas Instruments
-
DPA423GN-TL
Power Integrations
-
LM10011SD/NOPB
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
