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Renesas ISL6324AIRZ-TR5381
- Part No.:
- ISL6324AIRZ-TR5381
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ISL6324AIRZ-TR5381.pdf
- Description:
- IC REG CTRLR AMD SVI 2OUT 48QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,003
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Product details
Overview
ISL6324AIRZ-TR5381 from Renesas (formerly Intersil) is a monolithic dual PWM hybrid controller for AMD SVI/PVI split-plane and uniplane processors, delivering ±0.5% system voltage regulation accuracy over temperature, supporting 2–4-phase core VR and single-phase North Bridge (VDDNB) regulation, with integrated MOSFET drivers, differential DCR current sensing, and I²C programmability for voltage offset, OVP/PGOOD thresholds, and PSI_L phase shedding control - deployed in high-density server and desktop CPU power delivery.
For engineers reviewing the ISL6324AIRZ-TR5381 datasheet, ISL6324AIRZ-TR5381 pinout, ISL6324AIRZ-TR5381 application, or ISL6324AIRZ-TR5381 equivalent, this device requires attention to SVI/PVI mode selection via VID1/SEL latching, FS resistor configuration for droop enable/disable, RSET value for current-sense scaling, APA resistor for adaptive phase alignment, and thermal pad grounding - all critical for stable multi-phase transient response and North Bridge rail sequencing.
Technical Context
The ISL6324AIRZ-TR5381 implements a hybrid architecture: its multi-phase core controller supports 1–4 phases (internal drivers for 1–2 phases; external drivers for 3–4), while its dedicated single-phase NB controller operates only in SVI mode. Phase shedding is dynamically controlled via I²C-programmable PSI_L state depth and dwell cycles, enabling precise power savings during low-load conditions without disrupting regulation stability.
It integrates fully differential, continuous DCR current sensing across all core phases and the NB channel for accurate load-line programming and per-channel current balancing. Dual-edge modulation and Adaptive Pulse Positioning (APP) provide sub-100ns initial response to high di/dt transients, while active shoot-through protection on UGATE/LGATE pins ensures safe gate drive timing under varying PVCC bias (5–12V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Regulation Accuracy | ±0.5% over temperature - enables tight VDD core compliance for AMD K10/K10.5 processors without external calibration. |
| Core Output Phases | Configurable 1–4 phases - 1–2 phases use internal drivers; 3–4 require external PWM drivers (e.g., ISL6614), reducing BOM count in 2-phase designs. |
| Switching Frequency | 0.08–1.0 MHz (programmable via FS resistor) - allows optimization of efficiency vs. size: higher fSW reduces inductor volume; lower fSW improves light-load efficiency. |
| Droop Control | Programmable output voltage droop - reduces bulk output capacitance requirements by enabling intentional VOUT sag under load, improving transient recovery. |
| I²C Interface | Two-wire AMD-compliant interface - enables runtime voltage margining, independent Core/NB OVP/PGOOD threshold setting, and PSI_L phase-shedding depth/dwell tuning. |
| Current Sensing | Fully differential, continuous DCR sensing - eliminates need for discrete sense resistors; supports precision channel balancing and load-line programming without signal injection. |
| Thermal Range | -40°C to +85°C - qualified for industrial and server motherboard environments where ambient temperature exceeds commercial grade limits. |
Pinout & Package
ISL6324AIRZ-TR5381 uses a 48-lead 7×7 mm QFN package (Pb-free, exposed thermal pad) with 0.5 mm pitch. The thermal pad must be soldered to a solid ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VID1/SEL | Mode Selection Input | Latched at EN rising edge to select SVI (low) or PVI (high); determines function of VID0/VFIXEN, VID2/SVD, VID3/SVC pins. |
| VSEN / RGND | Differential Remote Sense Inputs | Connect directly to processor VDDFB[H,L] pins - enables precision core voltage regulation independent of PCB trace IR drop. |
| ISEN1+ to ISEN4+, ISEN_NB+ | Differential Current Sense Inputs | Interface with RC networks across inductors - provides continuous DCR-based current measurement for load line and channel balancing. |
| UGATE1/2/NB, LGATE1/2/NB | Integrated Gate Drivers | Drive external N-channel MOSFETs; support 5–12V PVCC bias; include adaptive shoot-through protection and fast switching (UGATE rise: 26 ns @ 12V). |
| SCL / SDA | I²C Serial Interface | AMD-compliant two-wire bus - used for real-time voltage offset, OVP/PGOOD trip level, and PSI_L behavior configuration without VID reprogramming. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive Phase Alignment (APA) | Configurable via external resistor on APA pin - dynamically adjusts phase timing to minimize RMS current ripple and improve thermal distribution across phases. |
| Dual-Edge Modulation | Enables immediate PWM edge placement within switching cycle - delivers <100 ns response to high di/dt load steps, avoiding overshoot/ringing seen in fixed-frequency PWM. |
| PSI_L Programmable Phase Shedding | I²C-configurable number of active phases and dwell cycles - reduces switching losses during idle/low-load states while maintaining regulation continuity. |
| Simultaneous Digital Soft-Start | Independent soft-start ramp for Core and NB outputs - prevents inrush current conflict and ensures proper power-rail sequencing for AMD processors. |
| Multi-Tiered Overvoltage Protection | Separate OVP thresholds for Core and NB rails, configurable via I²C - provides fail-safe shutdown before processor damage occurs, with hysteresis for noise immunity. |
Applications
| Server CPU Power Delivery | Desktop AMD Platform VRM |
|---|---|
Use Scenario: High-current, multi-core AMD Opteron or Phenom II processors requiring tight VDD tolerance and rapid load transient response in 1U/2U rack servers. IC Role / Device Role / Timing Role: Primary dual-output VR controller managing 4-phase VDD core and 1-phase VDDNB, with I²C-dynamic PSI_L shedding to meet TDP constraints. Use Value: ±0.5% regulation accuracy and differential remote sensing maintain core voltage within AMD spec limits despite PCB thermal gradients and long trace runs. |
Use Scenario: ATX motherboard VRM for AMD AM3/AM3+ socket platforms needing cost-effective, space-efficient dual-rail regulation with legacy PVI and modern SVI support. IC Role / Device Role / Timing Role: Hybrid controller operating in PVI mode for uniplane CPUs or SVI mode for split-plane CPUs - selected at boot via VID1 latching. Use Value: Integrated drivers eliminate 4–6 external gate drivers, reducing layout complexity and component count while maintaining 1 MHz max switching frequency. |
| Industrial Embedded Computing | Workstation Graphics Power |
Use Scenario: Fanless embedded systems using AMD G-Series APUs in extended temperature (-40°C to +85°C) environments with strict EMI and thermal constraints. IC Role / Device Role / Timing Role: Core VR controller with droop-enabled load-line programming - lowers required bulk capacitance to fit constrained board area. Use Value: Fully differential DCR sensing avoids discrete shunts, improving reliability and eliminating parasitic errors in high-vibration industrial enclosures. |
Use Scenario: High-end workstation motherboards powering discrete AMD Radeon GPUs alongside CPU, requiring coordinated VDDNB and PCIe auxiliary rail sequencing. IC Role / Device Role / Timing Role: Single-phase NB regulator supplies VDDNB independently - decoupled from core rail to prevent GPU-induced noise coupling into CPU power domain. Use Value: Independent I²C-programmable OVP/PGOOD thresholds allow fine-tuning for GPU-specific voltage tolerances without affecting core rail settings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output CPU voltage regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR35201MTRPBF | Single-chip 4+1 phase digital controller with PMBus interface; no integrated drivers - requires external DrMOS or discrete drivers. | Supports Intel VR12/VR12.5 and AMD SVI2; lacks native PVI mode - incompatible with legacy AMD K10/K10.5 processors using parallel VID. | Select when upgrading to digital control, PMBus telemetry, and newer AMD/Intel platforms; not suitable for drop-in replacement in PVI-based designs. |
| ISL6367IRZ | Successor hybrid controller with enhanced SVI2 support, faster I²C (400 kHz), and improved droop linearity; same 48-QFN package and pin-compatible core interface. | Backward compatible with ISL6324A software/firmware but adds SVI2 handshake and tighter ±0.3% accuracy - requires updated BIOS support for full feature set. | Preferred for new designs targeting AMD Bulldozer-era and later CPUs; retains layout compatibility but offers higher precision and extended feature set. |
Compared with IR35201MTRPBF and ISL6367IRZ, the ISL6324AIRZ-TR5381 uniquely supports both legacy PVI and early SVI protocols in one device, includes integrated drivers to reduce external components, and maintains proven stability in high-volume AMD platform deployments - making it optimal for cost-sensitive, backward-compatible CPU VRM upgrades.
Availability
ISL6324AIRZ-TR5381 is available at Aetrix Electronics and suitable for server motherboard manufacturing, AMD desktop platform VRM redesigns, and industrial embedded computing applications requiring stable component supply and long-term lifecycle support.
Supply support for ISL6324AIRZ-TR5381 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation acquired Intersil in 2017 and maintains full technical and supply chain support for legacy Intersil power management ICs including the ISL6324A family.
The ISL6324A belongs to Intersil's hybrid CPU voltage regulator controller product line, designed specifically to address AMD's transition from parallel VID (PVI) to serial VID (SVI) interfaces while minimizing design change overhead across generations.
FAQ
What is the operating temperature range for ISL6324AIRZ-TR5381?
The ISL6324AIRZ-TR5381 is rated for -40°C to +85°C ambient operation, validated per its datasheet absolute maximum and recommended operating conditions. This industrial-grade thermal range supports deployment in server chassis, fanless embedded systems, and high-temperature industrial environments where commercial-grade controllers would fail. The device's thermal pad must be soldered to a robust ground plane to achieve specified θJC = 2°C/W and sustain full-load performance across the range.
How does ISL6324AIRZ-TR5381 select between SVI and PVI modes?
The ISL6324AIRZ-TR5381 selects SVI or PVI mode based on the logic state of the VID1/SEL pin *at the rising edge of the EN signal*. If VID1/SEL is low when EN transitions high, the device enters SVI mode and configures VID0/VFIXEN, VID2/SVD, and VID3/SVC as serial interface pins. If VID1/SEL is high at EN rise, it enters PVI mode and uses those pins as parallel VID inputs (VID0–VID5). This latched selection is irreversible until the next power-on reset.
Can ISL6324AIRZ-TR5381 drive 4-phase core regulation without external drivers?
No. The ISL6324AIRZ-TR5381 integrates drivers only for 1- or 2-phase core operation. For 3- or 4-phase configurations, external PWM drivers (e.g., ISL6614) must be used - with PWM3 and PWM4 outputs driving those drivers, while ISEN3+/− and ISEN4+/− provide current feedback. The internal drivers remain active only for PHASE1 and PHASE2; PHASE3/PHASE4 signals are generated externally and fed back for balancing.
What is the purpose of the RSET pin on ISL6324AIRZ-TR5381?
The RSET pin on ISL6324AIRZ-TR5381 sets the effective value of the internal current-sense resistors used in DCR-based current monitoring. A resistor (20kΩ to 80kΩ) connects RSET to VCC; its value scales the sensed current tolerance (e.g., 68–88 µA typical for 4-phase operation). This allows designers to calibrate current-sense gain across different inductor DCR values and PCB layouts without changing external components - critical for accurate load-line programming and channel balancing.
Does ISL6324AIRZ-TR5381 support independent voltage regulation for Core and North Bridge rails?
Yes. The ISL6324AIRZ-TR5381 provides fully independent regulation: the multi-phase core controller manages VDD with ±0.5% accuracy, while the dedicated single-phase NB controller regulates VDDNB - but only in SVI mode. In PVI mode, the NB controller is disabled, and only the core rail is active. Both rails support independent I²C-programmable OVP/PGOOD thresholds, voltage offsets, and soft-start timing, enabling precise rail coordination for AMD split-plane processors.
ISL6324AIRZ-TR5381 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, AMD SVI
- Voltage - Input:
- 5V ~ 12V
- Number of Outputs:
- 2
- Voltage - Output:
- Up to 2V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-QFN (7x7)
ISL6324AIRZ-TR5381 FAQ
1.How can I place an order for ISL6324AIRZ-TR5381 through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6324AIRZ-TR5381 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6324AIRZ-TR5381 reliable?
The price and inventory of ISL6324AIRZ-TR5381 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6324AIRZ-TR5381 is usually 5 days.
3.What payment methods are accepted for ISL6324AIRZ-TR5381?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6324AIRZ-TR5381 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6324AIRZ-TR5381?
ISL6324AIRZ-TR5381 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6324AIRZ-TR5381 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6324AIRZ-TR5381?
For technical support, including ISL6324AIRZ-TR5381 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6324AIRZ-TR5381 requirements.
6.How does Aetrix verify that ISL6324AIRZ-TR5381 is sourced from the original manufacturer or authorized distributors?
All ISL6324AIRZ-TR5381 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6324AIRZ-TR5381 meets industry standards.
7.What is the process for return or replacement of ISL6324AIRZ-TR5381?
All ISL6324AIRZ-TR5381 units undergo pre-shipment inspection (PSI). If there is an issue with ISL6324AIRZ-TR5381, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6324AIRZ-TR5381 part is unused and in its original packaging.
Return procedure for ISL6324AIRZ-TR5381:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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