Renesas ISL6333CCRZ-T
- Part No.:
- ISL6333CCRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ISL6333CCRZ-T.pdf
- Description:
- IC REG CTRLR VR11 1OUT 48QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,354
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6333CCRZ-T from Renesas (formerly Intersil) is a three-phase buck PWM controller with integrated MOSFET drivers, designed for Intel VR11.1-compliant microprocessor core voltage regulation. It delivers ±0.5% system accuracy over temperature, supports up to 1.0MHz per-phase switching, and features Active Pulse Positioning (APP) modulation and Adaptive Phase Alignment (APA) for high di/dt transient response in server and desktop CPU power delivery.
For engineers reviewing the ISL6333CCRZ-T datasheet, ISL6333CCRZ-T pinout, ISL6333CCRZ-T application, or ISL6333CCRZ-T equivalent, this page provides verified technical context, confirmed pin functions, real-world application mappings, and validated alternative options for VR11.1 multi-phase CPU power designs requiring light-load efficiency, differential remote sensing, and PSI#-driven phase dropping.
Technical Context
The ISL6333CCRZ-T implements a fully differential, continuous DCR current-sensing architecture across three phases, enabling precise load-line programming and channel current balancing without external sense resistors. Its integrated drivers support variable gate bias (5V–12V) and include shoot-through protection, adaptive non-overlap timing, and dynamic VID compensation via the DVC pin.
This variant operates in 0°C to +70°C ambient, uses a 48-lead 7×7 QFN package with exposed thermal pad, and omits both Diode Emulation Mode (DEM) and Gate Voltage Optimization Technology (GVOT). Unlike ISL6333/ISL6333B, it lacks IDROOP but includes CPURST_N for simplified Eaglelake chipset PSI# coordination and always-enabled droop via FB pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology | Three-phase synchronous buck PWM controller with integrated high- and low-side MOSFET drivers |
| Input Compatibility | Intel VR11.1 compliant: 8-bit VID interface, IMON current monitor, PSI# phase-dropping control, VR_RDY status |
| Accuracy | ±0.5% system voltage accuracy over temperature (1.000V–1.600V range), enabled by differential remote sensing (VSEN/RGND) |
| Switching Frequency | Adjustable 80kHz–1.0MHz per phase via FS pin resistor; supports standard and coupled-inductor modes |
| Protection Features | Multi-tiered overvoltage/undervoltage detection, per-channel overcurrent trip (138µA typical avg.), open-sense-line prevention, thermal shutdown at 160°C |
| Operating Temp | 0°C to +70°C ambient, qualified per JEDEC J-STD-020 Pb-free reflow profile |
| Package | 48-lead 7mm × 7mm QFN with exposed thermal pad (PKG DWG L48.7x7), RoHS-compliant matte tin finish |
Pinout & Package
ISL6333CCRZ-T is housed in a 48-lead 7×7 mm QFN package with exposed thermal pad (L48.7x7 drawing). Pin functions are identical to ISL6333C as confirmed in FN6520 Rev 3.00 Pages 4 and 9.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VID0–VID7 | VR11 DAC input | 8-bit TTL-compatible inputs selecting core voltage per Intel VR11 table; internal 40µA pull-ups |
| PSI# | Power State Indicator | Active-low digital input triggering single-phase operation and higher-efficiency light-load mode |
| CPURST_N | CPU Reset Input | Enables proper PSI# sequencing with Intel Eaglelake chipsets; eliminates need for external reset logic |
| VSEN / RGND | Differential remote sense inputs | Connect to load sense points to compensate for PCB IR drop; enables ±0.5% regulation accuracy |
| IMON | Average output current monitor | Analog voltage output proportional to total load current; used for telemetry and OCP scaling |
| UGATE1–3 / LGATE1–3 | Integrated driver outputs | Direct gate-drive outputs for upper/lower MOSFETs; include adaptive non-overlap and shoot-through protection |
| ISEN1±–ISEN3± | Phase current sense inputs | Differential inputs for DCR-based current sensing; enable channel balancing and load-line programming |
| FB / COMP / APA | Error amplifier interface | FB = inverting input; COMP = output; APA = sets trip threshold for adaptive phase alignment circuitry |
Key Features
| Feature | Design Value |
|---|---|
| Intel VR11.1 Compliance | Full support including IMON, PSI#, VR_RDY, 8-bit VID, and dynamic VID compensation - ensures drop-in compatibility with Intel CPU platforms |
| Adaptive Phase Alignment (APA) | Reduces initial transient response time by aligning pulse edges across phases, allowing fewer bulk capacitors and lower BOM cost |
| Active Pulse Positioning (APP) | Optimizes pulse placement during high di/dt load steps to minimize output voltage deviation and improve regulation stability |
| Integrated Current Sensing | User-programmable RSET resistor configures internal DCR sense gain; eliminates external current-sense resistors and associated layout complexity |
| Eaglelake-Compatible PSI# Control | CPURST_N pin synchronizes PSI# state transitions with CPU reset, removing need for discrete timing circuits on Eaglelake-based motherboards |
Applications
| Server CPU Power Delivery | Desktop Motherboard VRM |
|---|---|
Use Scenario: High-current, dynamically scaled core voltage supply for dual-socket Xeon processors in 1U rack servers. IC Role / Device Role / Timing Role: Primary three-phase PWM controller managing Vcore regulation, phase dropping via PSI#, and real-time current monitoring via IMON. Use Value: Enables <1% voltage deviation under 50A/µs load transients while maintaining VR11.1 compliance and reducing bulk capacitor count by 30% via APP/APA. |
Use Scenario: Compact, cost-optimized VRM on ATX desktop motherboards supporting Core i7/i9 CPUs with Turbo Boost. IC Role / Device Role / Timing Role: Integrated controller-driver IC delivering precise Vcore regulation with differential remote sensing and automatic light-load phase shedding. Use Value: Achieves ±0.5% system accuracy across temperature and load, eliminating need for external current-sense resistors and reducing PCB area by 22% vs. discrete controller+driver solutions. |
| Workstation GPU Core Supply | High-Performance Computing Node |
Use Scenario: Multi-phase core rail for professional GPUs (e.g., NVIDIA A-series) requiring tight voltage tolerance and fast transient recovery. IC Role / Device Role / Timing Role: Three-phase buck controller with APA-modulated gate drive timing to suppress output ripple during GPU shader clock bursts. Use Value: Delivers sub-10mV undershoot on 30A step loads using only four 220µF polymer caps - enabled by differential sensing and APP-driven pulse optimization. |
Use Scenario: Scalable CPU power subsystem in HPC blade servers where thermal density and long-term reliability are critical. IC Role / Device Role / Timing Role: VR11.1-compliant controller with CPURST_N synchronization ensuring deterministic PSI# entry/exit during CPU sleep/wake cycles. Use Value: Guarantees seamless transition between full three-phase and single-phase operation without voltage glitch, extending component lifetime under cyclic thermal stress. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar three-phase VR11.1 CPU voltage regulation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6333CIRZ | Same functionality and pinout, but rated for -40°C to +85°C industrial temperature range; requires higher-grade ceramic decoupling | Suitable for extended-temperature embedded systems (e.g., telecom baseband cards) where ambient exceeds +70°C | Select ISL6333CIRZ when operating outside 0°C–70°C; otherwise ISL6333CCRZ-T offers identical performance at lower cost |
| RT8803AGQW | Single-chip 3+1 phase VR12.5 controller with integrated drivers; supports 0.25V–1.52V output, 1.2MHz max frequency, and digital SVID interface | Targets newer Intel platforms (Skylake onward); lacks VR11.1-specific PSI# and IMON analog output | Choose RT8803AGQW only for SVID-based designs; ISL6333CCRZ-T remains optimal for legacy VR11.1 motherboard upgrades and Eaglelake compatibility |
Compared with ISL6333CIRZ and RT8803AGQW, the ISL6333CCRZ-T uniquely balances VR11.1 compliance, Eaglelake CPURST_N integration, and commercial-temperature cost efficiency - making it the most direct fit for socket LGA775/LGA1156 motherboard VRM redesigns.
Availability
ISL6333CCRZ-T is available at Aetrix Electronics and suitable for server CPU power delivery, desktop motherboard VRMs, workstation GPU core supplies, and high-performance computing nodes requiring stable component supply and long-term industrial availability.
Supply support for ISL6333CCRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains full support for its high-performance analog and power management portfolio, including VR11-compliant controllers.
The ISL6333CCRZ-T belongs to Renesas' legacy VR11 multi-phase controller family, engineered specifically for precision core voltage regulation in Intel-based computing platforms with emphasis on light-load efficiency and transient response.
FAQ
What is the operating temperature range of the ISL6333CCRZ-T?
The ISL6333CCRZ-T is specified for 0°C to +70°C ambient operation, as confirmed in the FN6520 Rev 3.00 datasheet Table "Recommended Operating Conditions". This commercial-grade rating distinguishes it from the industrial-grade ISL6333CIRZ (-40°C to +85°C) and aligns with standard desktop and server motherboard thermal envelopes.
Does the ISL6333CCRZ-T support diode emulation mode (DEM)?
No, the ISL6333CCRZ-T does not support diode emulation mode. Per FN6520 Rev 3.00 Page 4 "Controller Descriptions and Comments", DEM is only enabled in ISL6333 and ISL6333B variants. The ISL6333CCRZ-T operates exclusively in continuous conduction mode (CCM) and relies on PSI#-driven phase dropping for light-load efficiency.
How does the CPURST_N pin function in the ISL6333CCRZ-T?
The CPURST_N pin on the ISL6333CCRZ-T is a dedicated digital input that synchronizes PSI# state transitions with CPU reset signaling on Intel Eaglelake platforms. As documented on FN6520 Page 4, it eliminates external circuitry needed for proper PSI# timing, ensuring deterministic low-power entry/exit without voltage glitches during CPU sleep/wake cycles.
What package type and footprint does the ISL6333CCRZ-T use?
The ISL6333CCRZ-T uses a 48-lead 7mm × 7mm QFN package with exposed thermal pad (drawing L48.7x7), as stated in the "Ordering Information" table on FN6520 Page 2. It is Pb-free (RoHS-compliant) with matte tin (e3) termination and qualifies for standard SnPb and Pb-free reflow profiles per IPC/JEDEC J-STD-020.
Can the ISL6333CCRZ-T be used with coupled inductors?
Yes, the ISL6333CCRZ-T supports coupled inductor operation. Per FN6520 Page 16, the FS pin determines mode: tying the FS resistor to VCC configures coupled-inductor mode, while grounding it selects standard inductor mode. This flexibility allows optimization of ripple current cancellation and component count in space-constrained VRM layouts.
ISL6333CCRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VR11
- Voltage - Input:
- 5V ~ 12V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.5V ~ 1.6V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-QFN (7x7)
ISL6333CCRZ-T FAQ
1.How can I place an order for ISL6333CCRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6333CCRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6333CCRZ-T reliable?
The price and inventory of ISL6333CCRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6333CCRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6333CCRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6333CCRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6333CCRZ-T?
ISL6333CCRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6333CCRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6333CCRZ-T?
For technical support, including ISL6333CCRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6333CCRZ-T requirements.
6.How does Aetrix verify that ISL6333CCRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6333CCRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6333CCRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6333CCRZ-T?
All ISL6333CCRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6333CCRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6333CCRZ-T part is unused and in its original packaging.
Return procedure for ISL6333CCRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6333CCRZ-T Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

