My Inquiry
My Account
Renesas ISL6336BIRZ-T
- Part No.:
- ISL6336BIRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ISL6336BIRZ-T.pdf
- Description:
- IC REG CTRLR VR11.1 1OUT 48QFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,969
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6336BIRZ-T from Renesas (formerly Intersil) is a 6-phase PWM controller for microprocessor core voltage regulation, supporting 1–6-phase interleaved synchronous-buck operation with Intel VR11.1 compliance, ±0.6% system accuracy over –40°C to +85°C, and active phase dropping via PSI# input. It enables high-efficiency power delivery in server CPU VRMs and high-performance desktop platforms.
For engineers reviewing the ISL6336BIRZ-T datasheet, ISL6336BIRZ-T pinout, ISL6336BIRZ-T application, or ISL6336BIRZ-T equivalent, key selection considerations include VR11.1 compliance, programmable switching frequency up to 1 MHz, integrated temperature-compensated DCR/resistor current sensing, IMON current monitoring output, and PSI#-triggered diode emulation for light-load efficiency.
Technical Context
The ISL6336BIRZ-T implements Intersil's proprietary Active Pulse Positioning (APP) and Adaptive Phase Alignment (APA) modulation to deliver fast transient response without increasing output capacitance. Its dual-edge PWM control maintains constant switching frequency while dynamically adjusting leading and trailing edges per phase.
It supports precision droop regulation via differential remote sensing (VDIFF/VSEN/RGND), programmable load-line offset (OFS/REF/DAC), and thermal compensation (TCOMP/TM) for DCR-based current sensing. Phase count is configured via PWM3–PWM6 logic levels, and PSI#-driven phase dropping operates in 1- or 2-phase mode with diode emulation enabled by compatible drivers like ISL6622.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Count | Configurable 1–6-phase interleaved buck control; phase enable set via PWM3–PWM6 logic levels. |
| VR Compliance | Fully compliant with Intel VR11.1 specification including VID7:0 encoding, dynamic VID™, and PSI# protocol timing. |
| System Accuracy | ±0.6% over VID = 1V–1.6V, –40°C to +85°C - ensures tight core voltage regulation across full operating range. |
| Switching Frequency | Adjustable 80 kHz to 1 MHz per phase via FS pin resistor - enables optimization of efficiency vs. size trade-offs. |
| Current Sensing | Supports both discrete sense-resistor and inductor DCR methods with integrated temperature compensation (TCOMP). |
| Light-Load Efficiency | PSI#-initiated phase dropping to 1-/2-phase + diode emulation reduces switching/core losses without layout change. |
| IMON Output | Current-source output proportional to total load current; clamped at 1.12 V for OCP detection and system-level monitoring. |
Pinout & Package
ISL6336BIRZ-T is housed in a RoHS-compliant 48-lead QFN package (7 mm × 7 mm, JEDEC MO-220), with exposed thermal pad connected to GND. Pin pitch is 0.5 mm; package is optimized for high-current VRM PCB layouts with low-inductance ground paths.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Core supply input | +5 V ±5% main power rail; POR threshold 4.4 V rising; requires local R/C decoupling. |
| EN_PWR / EN_VTT | Threshold-sensitive enable inputs | 0.85 V rising threshold; used to coordinate startup with driver ICs and VTT regulator. |
| VID[7:0] | Digital voltage identification interface | 8-bit VR11 code input; supports dynamic on-the-fly VID changes and pull-up current ≥30 µA. |
| PWM[6:1] | Phase gate-drive outputs | Open-drain, 200–400 Ω source/sink impedance; firing order sequential; phase count set by tie-high pins. |
| ISEN[6:1]± | Differential current sense inputs | Per-phase inputs for DCR or resistor sensing; inactive channels left open; supports channel balancing and OCP. |
| IMON | Average load current monitor | Current-source output (clamped at 1.12 V); resistor-to-GND converts to voltage proportional to total IOUT. |
| PSI# | Power state indicator input | Active-low signal triggering 1-/2-phase operation and diode emulation; internal 40 µA pull-up to ~1 V. |
| H_CPURST_N | PSI# lockout control | Prevents false PSI# entry during reset; 45 ms lockout after rising edge; connect to VCC to disable. |
Key Features
| Feature | Design Value |
|---|---|
| Intel VR11.1 compliance | Guarantees interoperability with Intel CPUs requiring VR11.1 signaling, VID encoding, and PSI# timing. |
| Active Pulse Positioning (APP) | Dual-edge PWM modulation improves transient response without sacrificing frequency stability or requiring extra caps. |
| Adaptive Phase Alignment (APA) | Enables simultaneous multi-phase turn-on during large load steps, reducing peak output voltage deviation. |
| Programmable droop & offset | Bi-directional reference-voltage offset (via OFS/REF/DAC) enables precise load-line tuning independent of VID. |
| Integrated thermal compensation | TCOMP input scales current-sense gain vs. temperature using NTC thermistor network - eliminates external compensation circuitry. |
| Coupled inductor support | Validated for use with coupled inductors in 2-, 4-, or 5-phase configurations - reduces component count and improves ripple cancellation. |
Applications
| Server CPU Voltage Regulator | High-End Desktop Platform VRM |
|---|---|
Use Scenario: Delivering tightly regulated 0.5–1.6 V core voltage to dual-socket Xeon processors under dynamic 100+ A load transients. IC Role / Device Role / Timing Role: Primary multiphase PWM controller managing six synchronous buck phases, coordinating with ISL6622 drivers and DCR sensing. Use Value: APP/APA modulation achieves <100 ns response to 50 A/µs load steps; VR11.1 compliance ensures seamless CPU VID handshake. |
Use Scenario: Powering enthusiast-grade Core i9 processors in gaming motherboards with adaptive phase shedding for idle power reduction. IC Role / Device Role / Timing Role: Core voltage controller enabling PSI#-driven transition from 6-phase to 1-phase + diode emulation during low-load states. Use Value: Reduces light-load power loss by >40% vs. fixed-phase operation; IMON output feeds system power telemetry without external amplifiers. |
| Data Center GPU Power Delivery | Workstation CPU VRM with Thermal Management |
Use Scenario: Supplying stable 0.7–1.1 V to high-TDP GPUs (e.g., NVIDIA A100) where input/output ripple minimization is critical for signal integrity. IC Role / Device Role / Timing Role: Interleaved 6-phase controller driving parallel MOSFET stages with synchronized PWM timing to suppress ripple multiplication. Use Value: 6× ripple frequency multiplication cuts output capacitor requirements by ~50%; FS-adjustable frequency avoids EMI bands. |
Use Scenario: Regulating CPU core voltage in thermal-constrained workstations where VR temperature directly impacts performance throttling. IC Role / Device Role / Timing Role: VR controller integrating TM/TCOMP-based thermal compensation to maintain current-sense accuracy across –40°C to +85°C ambient. Use Value: Eliminates drift in droop programming and OCP thresholds due to inductor DCR temperature coefficient - no firmware calibration needed. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multiphase PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6336CRZ-T | Industrial-temp version (0°C to +70°C); identical electrical specs and pinout; lacks extended thermal range validation. | Suitable only for commercial-temperature environments; not qualified for industrial or extended-ambient deployments. | Select ISL6336BIRZ-T when operation beyond +70°C ambient is required; otherwise ISL6336CRZ-T offers same functionality at lower cost. |
| RT8803AZSP | 6-phase VR12.0 controller; supports higher max VID (1.52 V), faster OVP response (100 ns), but no integrated TCOMP or APA. | Targets newer Intel CPUs with VR12.0; lacks PSI#-compatible phase-dropping architecture and thermal compensation block. | Choose RT8803AZSP only for VR12.0-compliant designs; ISL6336BIRZ-T remains optimal for VR11.1 systems needing robust light-load efficiency and thermal compensation. |
Compared with ISL6336CRZ-T, ISL6336BIRZ-T adds validated –40°C to +85°C operation and extended reliability testing; versus RT8803AZSP, it provides superior light-load efficiency via PSI#-driven phase dropping and integrated thermal compensation - critical for legacy VR11.1 platforms.
Availability
ISL6336BIRZ-T is available at Aetrix Electronics and suitable for server CPU VRMs, high-end desktop platform power delivery, data center GPU regulators, and workstation CPU VRMs requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for ISL6336BIRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains full technical support and documentation for legacy Intersil power management ICs including the ISL6336B family.
The ISL6336B product line was designed specifically for Intel VR11.1-compliant microprocessor core voltage regulation, emphasizing fast transient response, multi-phase efficiency, and seamless integration with companion drivers and thermal sensors.
FAQ
What is the operating temperature range of the ISL6336BIRZ-T?
The ISL6336BIRZ-T is rated for –40°C to +85°C ambient operation, verified per its Absolute Maximum Ratings and Electrical Specifications tables. This extended range supports deployment in industrial and server environments where thermal margins exceed commercial-grade alternatives like the ISL6336CRZ-T. The ISL6336BIRZ-T maintains ±0.6% system accuracy across this full range when using DCR or resistor current sensing with TCOMP compensation.
Does the ISL6336BIRZ-T support diode emulation, and how is it activated?
Yes, the ISL6336BIRZ-T supports diode emulation during light-load operation via its PSI# input. When PSI# is asserted low, the controller drops active phases to 1 or 2 and enables diode emulation on remaining channels - reducing switching and conduction losses. This requires compatible drivers such as ISL6622 or ISL6620, as specified in the datasheet's "Controller and Driver Recommendations" section. The ISL6336BIRZ-T does not perform diode emulation in full-phase mode.
How is current sensing implemented on the ISL6336BIRZ-T?
The ISL6336BIRZ-T supports two current sensing methods: discrete sense-resistor (using ISENx± pairs) and inductor DCR sensing. It includes integrated temperature compensation via the TCOMP pin to correct for DCR drift with temperature. Each phase has dedicated differential inputs; inactive phases must leave their ISENx± pins unconnected. The IMON pin provides a current-source output proportional to total load current, clamped at 1.12 V for overcurrent protection - a feature confirmed in the Electrical Specifications table on page 8 of FN6696 Rev 3.00.
Is the ISL6336BIRZ-T pin-compatible with other members of the ISL6336 family?
Yes, the ISL6336BIRZ-T shares identical pinout, footprint, and electrical interface with ISL6336CRZ-T and ISL6336HRZ-T. All variants use the same 48-lead QFN package (L48.7x7) and match on all signal, power, and ground assignments. Differences are limited to temperature grade (–40°C to +85°C vs. 0°C to +70°C), qualification testing, and minor parameter tolerances - making them direct drop-in replacements in hardware design, provided thermal and accuracy requirements align.
What driver ICs are recommended for use with the ISL6336BIRZ-T?
The ISL6336BIRZ-T datasheet explicitly recommends ISL6622 and ISL6620 for phases active during PSI#-enabled light-load operation due to their diode emulation capability. For non-PSI# phases, ISL6596, ISL6609, ISL6612, and ISL6614 are listed as compatible. All recommended drivers are dual- or quad-output, support 5 V or 12 V gate drive, and are pin-compatible within voltage families - enabling flexible MOSFET selection without layout revision. These pairings are documented in the "Controller and Driver Recommendations" table on page 3 of FN6696 Rev 3.00.
ISL6336BIRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VR11.1
- Voltage - Input:
- 3V ~ 12V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.5V ~ 1.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-QFN (7x7)
ISL6336BIRZ-T FAQ
1.How can I place an order for ISL6336BIRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6336BIRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6336BIRZ-T reliable?
The price and inventory of ISL6336BIRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6336BIRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6336BIRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6336BIRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6336BIRZ-T?
ISL6336BIRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6336BIRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6336BIRZ-T?
For technical support, including ISL6336BIRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6336BIRZ-T requirements.
6.How does Aetrix verify that ISL6336BIRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6336BIRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6336BIRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6336BIRZ-T?
All ISL6336BIRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6336BIRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6336BIRZ-T part is unused and in its original packaging.
Return procedure for ISL6336BIRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6336BIRZ-T Tags
-
TPS51206DSQR
Texas Instruments
-
TPS51200DRCR
Texas Instruments
-
TPS51200DRCT
Texas Instruments
-
TPS62740DSSR
Texas Instruments
-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi
-
RT9026GSP
Richtek USA Inc.
-
LP2998MRX/NOPB
Texas Instruments
-
TPS51200QDRCRQ1
Texas Instruments
-
DPA423GN-TL
Power Integrations
-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
