Renesas ISL6336DIRZ
- Part No.:
- ISL6336DIRZ
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ISL6336DIRZ.pdf
- Description:
- IC REG CTRLR VR11.1 1OUT 48QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL6336DIRZ from Renesas Electronics (formerly Intersil) is a 6-phase VR11.1-compliant PWM controller with droop disabled, designed for precision core voltage regulation in high-performance CPUs and memory subsystems. It delivers ±0.5% closed-loop system accuracy over load, line, and temperature; supports 1–6-phase operation with active phase adding/dropping; and features differential remote sensing, DCR/resistor current sensing, and integrated thermal compensation via NTC thermistor input. Used in server and workstation VRMs where light-load efficiency and fast transient response are critical.
For engineers reviewing the ISL6336DIRZ datasheet, ISL6336DIRZ pinout, ISL6336DIRZ application, or ISL6336DIRZ equivalent, key selection considerations include its VR11.1 compliance without droop, 48-lead QFN package, -40°C to +85°C industrial temperature range, IMON-based load current monitoring, and PSI#-driven 1-/2-phase light-load mode - all validated in FN8320 Rev 0.00.
Technical Context
The ISL6336DIRZ implements Intersil's proprietary Active Pulse Positioning (APP) and Adaptive Phase Alignment (APA) modulation to minimize phase-to-phase timing skew and maximize transient response. Its dual enable inputs (EN_PWR and EN_VTT), programmable soft-start (SS), and frequency setting (FS) pins allow precise coordination with power stages and microprocessor sequencing.
Current sensing uses dedicated differential ISEN+/- pairs per phase for channel-current balancing and average overcurrent protection, with optional DCR or discrete resistor sensing. Thermal monitoring via TM pin drives VR_HOT/VR_FAN outputs and enables integrated temperature compensation of IMON and OCP thresholds using TCOMP scaling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phases | 6-phase interleaved buck controller; configurable down to 1-phase via PSI# and PWMx pin strapping. |
| VR Compliance | Intel VR11.1 compliant with droop disabled - meets VID decoding, IMON reporting, and PSI# handshake requirements for CPU core rails. |
| Accuracy | ±0.5% closed-loop system accuracy over full load, line, and temperature (-40°C to +85°C) for VID = 1.0–1.6V. |
| Switching Frequency | Adjustable up to 1 MHz per phase via external resistor on FS pin; typical 250 kHz at RT = 100 kΩ. |
| Package | 48-lead 7×7 mm QFN (JEDEC MO-220), RoHS-compliant, exposed thermal pad. |
| Supply Voltage | +5 V ±5% on VCC; POR thresholds at 4.4 V (rising) and 3.88 V (falling). |
| Current Sensing | Differential ISEN+/- inputs per phase; supports DCR or discrete sense resistor; IMON output provides thermally compensated average load current. |
Pinout & Package
ISL6336DIRZ is housed in a 48-lead 7×7 mm QFN package (JEDEC MO-220, pkg drawing L48.7x7) with exposed thermal pad. Pin 48 is GND (bias/reference ground); bottom metal base serves as thermal and electrical ground.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VID0–VID7 | Voltage identification input | 8-bit digital interface to microprocessor; sets target output voltage per VR11.1 specification. |
| PSI# | Power state indicator input | Active-low signal triggering 1-/2-phase operation to reduce switching/core losses at light load. |
| IMON | Average load current monitor output | Analog voltage proportional to total load current; clamped at 1.11 V for overcurrent shutdown; used by CPU for telemetry. |
| PWM1–PWM6 | Phase control outputs | Open-drain PWM signals driving external gate drivers; number of active phases set by PSI# and PWMx pin strapping. |
| ISEN1+ / ISEN1− … ISEN6+ / ISEN6− | Per-phase current sense inputs | Differential inputs for DCR or resistor-based current sensing; enable channel balancing and individual phase current limiting. |
| TM | Thermal monitor input | Connects to NTC thermistor divider; digitized internally to drive VR_HOT/VR_FAN and scale IMON/OCP temperature compensation. |
| EN_PWR / EN_VTT | Threshold-sensitive enable inputs | 0.85 V rising threshold; coordinate startup sequence with 12 V rail and VTT regulator to prevent sequencing faults. |
Key Features
| Feature | Design Value |
|---|---|
| Active Pulse Positioning (APP) | Reduces phase timing jitter and ripple cancellation loss, enabling tighter output capacitor reduction without sacrificing transient performance. |
| Adaptive Phase Alignment (APA) | Dynamic realignment of PWM edges across phases minimizes circulating currents and improves efficiency at partial load. |
| Droop-disabled VR11.1 compliance | Meets Intel VR11.1 spec except droop; retains full VID decoding, IMON reporting, and PSI# handshake for CPU compatibility. |
| Differential remote sensing (VSEN/RGND) | Eliminates PCB trace IR drop error between controller and load, ensuring ±0.5% regulation accuracy at point-of-load. |
| Integrated thermal compensation | Uses TM pin voltage to scale IMON gain and OCP threshold, compensating for DCR drift and MOSFET RDS(on) variation over temperature. |
Applications
| Server CPU Core VRM | Workstation Memory Subsystem |
|---|---|
|
Use Scenario: Regulating 0.8–1.6 V core voltage for multi-core Xeon or EPYC processors under dynamic workloads. IC Role / Device Role / Timing Role: Primary 6-phase PWM controller managing gate drivers, current sensing, and PSI#-driven phase shedding. Use Value: Achieves <1% output deviation during 50 A/µs transients while maintaining >90% efficiency at 20% load via APA and phase dropping. |
Use Scenario: Powering DDR4/DDR5 memory VDD/VDDQ rails in high-bandwidth compute platforms. IC Role / Device Role / Timing Role: Multiphase controller delivering tightly regulated, low-noise supply with remote sensing at DIMM slots. Use Value: Differential sensing ensures ±5 mV regulation at memory IC pins; IMON reporting enables memory controller thermal throttling. |
| Industrial Embedded CPU Module | AI Accelerator Board Power |
|
Use Scenario: Providing stable core voltage for ARM or x86 SoCs in ruggedized edge computing hardware. IC Role / Device Role / Timing Role: VR11.1-compatible controller operating across -40°C to +85°C with robust thermal monitoring. Use Value: Integrated VR_HOT/VR_FAN outputs directly interface with fan controllers; TCOMP-enabled OCP prevents false trips during thermal cycling. |
Use Scenario: Supplying GPU or AI ASIC core voltage with rapid load-step response during inference bursts. IC Role / Device Role / Timing Role: High-bandwidth 6-phase controller using APP modulation to suppress ripple-induced noise coupling into analog circuits. Use Value: 1 MHz max switching frequency allows smaller inductors; IMON telemetry feeds real-time power estimation for workload scheduling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multiphase PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6336CRZ | VR11.1 compliant with droop enabled; identical pinout and package; same 6-phase architecture and APP/APA features. | Required when system design mandates VR11.x droop-based load-line regulation (e.g., legacy Intel platforms). | Select ISL6336CRZ only if droop behavior is explicitly required; ISL6336DIRZ is preferred for droop-disabled implementations. |
| RT8803AGQW | 6-phase VR12.0/VR13.0 controller; supports higher VID resolution (10-bit), faster PSI# response, and enhanced digital telemetry. | Targets newer CPU generations requiring VR12+/IMVP9 compliance; lacks direct VR11.1 IMON reporting format compatibility. | Choose RT8803AGQW for VR12+ designs; ISL6336DIRZ remains optimal for VR11.1 systems needing proven droop-disabled operation. |
Compared with ISL6336CRZ and RT8803AGQW, the ISL6336DIRZ uniquely satisfies VR11.1 specifications *without* droop - enabling precise fixed-setpoint regulation while retaining full IMON telemetry and PSI#-based phase management for industrial and server applications demanding deterministic light-load behavior.
Availability
ISL6336DIRZ is available at Aetrix Electronics and suitable for server CPU VRMs, workstation memory subsystems, industrial embedded modules, and AI accelerator board power designs requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for ISL6336DIRZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains full technical and supply chain support for the ISL6336D family. Renesas is a global semiconductor leader specializing in microcontrollers, analog, and power management solutions.
The ISL6336D product line was developed by Intersil specifically for high-efficiency, multi-phase voltage regulation in Intel VR11.x-compliant computing platforms - emphasizing fast transient response, thermal resilience, and seamless integration with CPU power management protocols.
FAQ
What is the operating temperature range for ISL6336DIRZ?
The ISL6336DIRZ is rated for industrial operation from -40°C to +85°C ambient temperature, as confirmed in the Ordering Information table of FN8320 Rev 0.00. This range applies to the ISL6336DIRZ variant specifically and supports deployment in servers, workstations, and ruggedized embedded systems where thermal margin is critical. The device's thermal protection features - including VR_HOT, VR_FAN, and TM-based compensation - are fully functional across this range.
Does ISL6336DIRZ support both DCR and discrete resistor current sensing?
Yes, the ISL6336DIRZ supports both DCR and discrete resistor current sensing through its dedicated differential ISEN+/- inputs per phase. For DCR sensing, ISEN+ connects to the RC network node and ISEN− to the inductor node; for resistor sensing, the sense resistor is placed between ISEN+ and ISEN−. Section "Current Sensing" on page 14 of FN8320 confirms this dual-mode capability, and the IMON output reflects thermally compensated average current regardless of sensing method used in ISL6336DIRZ designs.
How does the PSI# signal affect phase operation in ISL6336DIRZ?
In ISL6336DIRZ, an active-low PSI# signal triggers automatic phase dropping to 1- or 2-phase operation depending on FS and SS pin states (per Table 2, page 14). This reduces magnetic core and switching losses at light load while preserving fast transient recovery - dropped phases are reactivated immediately upon PSI# deassertion. Unlike droop-based controllers, ISL6336DIRZ achieves this without altering the voltage setpoint, making it ideal for fixed-VID applications requiring stable regulation during low-power states.
What is the purpose of the OFS pin on ISL6336DIRZ?
The OFS pin on ISL6336DIRZ enables precise DC offset programming of the output voltage independent of VID settings. By connecting an external resistor between OFS and GND (for negative offset) or VCC (for positive offset), a controlled current generates a proportional voltage shift at the REF pin. This allows fine-tuning of regulation points - e.g., compensating for PCB trace losses or aligning with custom load-line requirements - without modifying the microprocessor's VID code. The offset polarity and magnitude are fully defined in the Pin Descriptions section (page 4) of FN8320.
Is ISL6336DIRZ pin-compatible with other members of the ISL6336x family?
Yes, ISL6336DIRZ shares identical 48-lead QFN packaging and pinout with all ISL6336x variants (e.g., ISL6336CRZ, ISL6336BRZ), as confirmed by the common "48 Ld 7x7 QFN" package designation and unified Pin Configuration diagram (page 4 of FN8320). Functional differences - such as droop enable/disable or H_CPURST_N presence - are implemented internally and do not affect mechanical or electrical pin compatibility. This allows drop-in replacement within the same footprint when design requirements change.
ISL6336DIRZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- Controller, Intel VR11.1
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.5V ~ 1.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-QFN (7x7)
ISL6336DIRZ FAQ
1.How can I place an order for ISL6336DIRZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6336DIRZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6336DIRZ reliable?
The price and inventory of ISL6336DIRZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6336DIRZ is usually 5 days.
3.What payment methods are accepted for ISL6336DIRZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6336DIRZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6336DIRZ?
ISL6336DIRZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6336DIRZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6336DIRZ?
For technical support, including ISL6336DIRZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6336DIRZ requirements.
6.How does Aetrix verify that ISL6336DIRZ is sourced from the original manufacturer or authorized distributors?
All ISL6336DIRZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6336DIRZ meets industry standards.
7.What is the process for return or replacement of ISL6336DIRZ?
All ISL6336DIRZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL6336DIRZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6336DIRZ part is unused and in its original packaging.
Return procedure for ISL6336DIRZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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