Renesas ISL6364ACRZ-T
- Part No.:
- ISL6364ACRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ISL6364ACRZ-T.pdf
- Description:
- IC REG IMVP-7 VR12 2OUT 48QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL6364ACRZ-T from Renesas (formerly Intersil) is a dual-output, VR12/IMVP7-compliant PWM controller for microprocessor voltage regulation. It delivers 4+1 phase control (4-phase for core/memory VR0, 1-phase for graphics/I/O VR1), supports AUTO phase shedding, EAPP modulation, and achieves ±0.5% closed-loop system accuracy over load, line, and temperature in server and desktop CPU power delivery.
For engineers reviewing the ISL6364ACRZ-T datasheet, ISL6364ACRZ-T pinout, ISL6364ACRZ-T application, or ISL6364ACRZ-T equivalent, key selection criteria include VR12/IMVP7 SVID compliance, droop control via DCR/resistor sensing, PSI#-driven phase management, thermal compensation via TMS/TM pins, and dual-oscillator support up to 2MHz per phase.
Technical Context
The ISL6364ACRZ-T implements two independent PWM outputs: VR0 (1–4-phase, coupled-inductor compatible) and VR1 (single-phase, diode emulation enabled). It uses Enhanced Active Pulse Positioning (EAPP) for linear transient response with variable frequency control and evenly distributed pulses during load steps.
Current sensing is performed differentially via IMON/IMONS pins using either precision resistors or inductor DCR, feeding droop programming and channel-current balancing. Thermal monitoring employs dual NTC inputs (TM/TMS) with internal digitization for real-time current-sense compensation and overtemperature protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Compliance | Intel VR12/IMVP7 specification compliant - ensures interoperability with Intel CPUs and SVID bus communication. |
| Output Configuration | Dual output: VR0 (1–4-phase) + VR1 (1-phase) - enables independent regulation of CPU core/memory and graphics/I/O rails. |
| Phase Control | Auto phase shedding & active adding/dropping with PSI# signaling - reduces magnetic and switching losses in PSI1/PSI2/PSI3 modes. |
| Accuracy | ±0.5% closed-loop system accuracy over load, line, and temperature - guarantees tight VOUT regulation under dynamic conditions. |
| Current Sensing | Differential DCR or resistor-based sensing with integrated programmable gain - supports accurate droop programming and per-phase current limiting. |
| Thermal Monitoring | Dual NTC inputs (TM/TMS) with internal ADC and thermal compensation - enables real-time current-sense calibration and overtemperature shutdown. |
| Modulation Scheme | Enhanced Active Pulse Positioning (EAPP) - delivers fast transient response with reduced beat-frequency oscillation and improved phase balance. |
Pinout & Package
ISL6364ACRZ-T is housed in a 48-pin QFN package (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Pin functions are defined per the ISL6364A datasheet Rev 0.00 (April 2012), including dedicated SVID, IMON, FB, BOOT, EN, TM, TMS, and phase-driver control signals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Primary supply input | Provides bias for internal LDOs and gate drivers; requires local decoupling near pin. |
| FB | Feedback reference node | Connects to voltage divider output; senses regulated output and enables droop control via current-sense feedback. |
| IMON / IMONS | Differential current monitor inputs | Accepts differential voltage from sense resistor or DCR network to report load current to CPU via SVID IOUT register. |
| PSI# | Power state indicator input | Asynchronous signal from CPU indicating entry into PSI1/PSI2/PSI3 low-power states; triggers phase shedding. |
| SVID Bus Pins (SCLK, SDATA) | Serial VID interface | Enable bidirectional communication with CPU for VID code updates, IMAX/TMAX register writes, and telemetry reporting. |
| TM / TMS | Dual thermal monitor inputs | Interface to separate NTC thermistors for VR0 and VR1; enable independent thermal compensation of current sense elements. |
Key Features
| Feature | Design Value |
|---|---|
| VR12/IMVP7 SVID Compliance | Full SerialVID implementation with programmable IMAX, TMAX, BOOT, and ADDRESS OFFSET registers - enables seamless integration with Intel platforms. |
| EAPP Modulation | Patented variable-frequency, linear-pulse positioning scheme - eliminates beat-frequency oscillation and improves transient response without added output capacitance. |
| Dual Independent Oscillators | Up to 2MHz per phase - allows optimization of efficiency (lower fSW) and transient performance (higher fSW) per regulator output. |
| Droop + Diode Emulation | Configurable droop slope and diode emulation mode in light-load phases - maintains regulation while minimizing conduction losses in PSI2/PSI3. |
| Start-up into Pre-Charged Load | Soft-start logic prevents reverse current flow when output capacitors are pre-biased - avoids inrush damage and system instability during hot-plug or reset scenarios. |
Applications
| Server CPU Power Delivery | Desktop VR12 Platform |
|---|---|
Use Scenario: Regulating core voltage for dual-socket Xeon processors with dynamic phase demand across P-states. IC Role / Device Role / Timing Role: Dual-output PWM controller managing 4-phase VR0 (core) and 1-phase VR1 (uncore/I/O) with SVID-driven PSI# coordination. Use Value: AUTO phase shedding reduces idle power by >35% while maintaining <100ns transient recovery via EAPP modulation. | Use Scenario: High-efficiency motherboard VRM for Intel 3rd–5th Gen Core i7/i5 CPUs with coupled inductors and phase doublers. IC Role / Device Role / Timing Role: VR12-compliant controller supporting both standard and coupled-inductor topologies on VR0, with diode emulation on VR1 for discrete GPU rail. Use Value: ±0.5% closed-loop accuracy and DCR current sensing enable stable operation under rapid VID transitions and multi-GHz CPU load swings. |
| Laptop CPU Voltage Regulation | Workstation Memory Subsystem |
Use Scenario: Compact VRM design for mobile quad-core CPUs requiring low quiescent current and thermal-aware phase control. IC Role / Device Role / Timing Role: Dual-output controller using TM/TMS NTC inputs to dynamically adjust current-sense gain and phase count based on die/package temperature. Use Value: Integrated thermal compensation maintains current-sense accuracy within ±2% across –10°C to +105°C ambient, preventing false OCP trips. | Use Scenario: DDR3/DDR4 memory VDDQ regulation with tightly coupled timing to CPU core rail and independent current monitoring. IC Role / Device Role / Timing Role: VR0 configured as 2-phase memory regulator; VR1 supplies memory controller I/O with DVC compensation and no-droop profile. Use Value: Dynamic VID Compensation (DVC) on VR1 eliminates droop-induced timing skew between memory and CPU domains during burst accesses. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output VR12/IMVP7 PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6364CRZ-T | Same pinout and function but lacks IMVP7-specific SVID registers (e.g., TMAX, ADDRESS OFFSET); VR12-only compliant. | Supports legacy VR12 platforms without IMVP7 thermal or extended telemetry requirements. | Select ISL6364CRZ-T only if IMVP7 thermal telemetry and programmable TMAX are not required. |
| RT8803AGQW | Single-chip 5-phase controller (not dual-output); integrates gate drivers; no SVID bus - uses SMBus/PMBus instead. | Targets cost-sensitive embedded or industrial CPU power where SVID is unnecessary and layout space is constrained. | Choose RT8803AGQW when integrating gate drivers and reducing BOM count outweighs SVID compatibility and dual-rail independence. |
Compared with ISL6364CRZ-T and RT8803AGQW, the ISL6364ACRZ-T uniquely provides full IMVP7 SVID compliance, dual independent outputs with configurable droop/DVC, and thermal-compensated current sensing - making it the only option for high-end client/server platforms requiring Intel's full VR12/IMVP7 specification stack.
Availability
ISL6364ACRZ-T is available at Aetrix Electronics and suitable for server CPU power delivery, desktop VR12 motherboards, laptop processor VRMs, and workstation memory subsystems requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for ISL6364ACRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation (acquired Intersil in 2017) is a global semiconductor leader delivering microcontrollers, analog, power, and connectivity solutions with ISO9001-certified manufacturing.
The ISL6364ACRZ-T belongs to Renesas' high-performance digital power controller product line, designed specifically for Intel VR12/IMVP7-compliant CPU voltage regulation in enterprise and premium client platforms.
FAQ
What is the primary function of the ISL6364ACRZ-T in a CPU power delivery system?
The ISL6364ACRZ-T serves as a dual-output VR12/IMVP7-compliant PWM controller that regulates both the microprocessor core/memory rail (VR0, 1–4-phase) and peripheral rail (VR1, single-phase). It executes phase shedding, droop control, and SVID communication to meet Intel's dynamic voltage and thermal telemetry requirements. Its EAPP modulation and dual-oscillator architecture ensure fast transient response and high light-load efficiency. The ISL6364ACRZ-T is essential for stable, specification-compliant CPU power in modern server and desktop platforms.
Does the ISL6364ACRZ-T support both resistor-based and DCR-based current sensing?
Yes, the ISL6364ACRZ-T supports both precision resistor and inductor DCR current sensing via its differential IMON/IMONS inputs. It includes integrated programmable gain and offset calibration to maintain accuracy across temperature. This dual-sensing capability enables flexible PCB layout and optimal trade-offs between cost (resistor) and efficiency (DCR). The ISL6364ACRZ-T uses the sensed current for droop programming, channel-current balancing, and average overcurrent protection - all critical for reliable CPU power delivery.
How does the ISL6364ACRZ-T implement phase shedding during low-power states?
The ISL6364ACRZ-T uses the PSI# signal from the CPU to trigger automatic phase shedding: in PSI1 mode, it reduces VR0 to 1 or 2 active phases; in PSI2/PSI3, it operates VR0 in single-phase with diode emulation. Phase re-addition occurs synchronously upon PSI# de-assertion to preserve transient response. This behavior is fully hardware-controlled and requires no firmware. The ISL6364ACRZ-T maintains regulation accuracy and thermal stability throughout all phases - a key requirement for IMVP7 compliance and energy-efficient computing.
What thermal monitoring capabilities does the ISL6364ACRZ-T provide?
The ISL6364ACRZ-T features two independent NTC thermistor inputs - TM for VR0 and TMS for VR1 - each feeding an internal ADC and thermal compensation engine. This enables real-time digitization of temperature and dynamic adjustment of current-sense gain to counteract copper resistance drift. The ISL6364ACRZ-T uses this data for thermal-aware phase control and overtemperature protection. No external microcontroller or firmware is needed - all thermal functions are implemented in hardware for deterministic response.
Is the ISL6364ACRZ-T pin-compatible with earlier ISL6364 variants?
Yes, the ISL6364ACRZ-T is pin-compatible with ISL6364CRZ-T and ISL6364HRZ-T in the same 48-pin QFN package. All share identical pinout, footprint, and basic VR12 functionality. However, the ISL6364ACRZ-T adds IMVP7-specific SVID registers (TMAX, ADDRESS OFFSET) and enhanced thermal telemetry not present in the 'C' or 'H' versions. System designers can upgrade to ISL6364ACRZ-T without PCB changes, but must update firmware to leverage IMVP7 features.
ISL6364ACRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel IMVP-7, VR12™
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.25V ~ 1.52V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-QFN (6x6)
ISL6364ACRZ-T FAQ
1.How can I place an order for ISL6364ACRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6364ACRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6364ACRZ-T reliable?
The price and inventory of ISL6364ACRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6364ACRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6364ACRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6364ACRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6364ACRZ-T?
ISL6364ACRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6364ACRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6364ACRZ-T?
For technical support, including ISL6364ACRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6364ACRZ-T requirements.
6.How does Aetrix verify that ISL6364ACRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6364ACRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6364ACRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6364ACRZ-T?
All ISL6364ACRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6364ACRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6364ACRZ-T part is unused and in its original packaging.
Return procedure for ISL6364ACRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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