Renesas ISL6366CRZ-T
- Part No.:
- ISL6366CRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 60-VFQFN Exposed Pad
- Datasheet:
-
ISL6366CRZ-T.pdf
- Description:
- IC REG IMVP-7 VR12 2OUT 60QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ISL6366CRZ-T from Intersil is a dual-output PWM controller for Intel VR12/IMVP7-compliant CPU voltage regulation, featuring 6-phase + 1-phase topology, ±0.5% closed-loop system accuracy over load/line/temperature, EAPP modulation for fast transient response, and SVID bus interface for dynamic VID control. It regulates core/memory (VR0) and graphics/system agent/I/O (VR1) rails in high-performance computing platforms.
For engineers reviewing the ISL6366CRZ-T datasheet, ISL6366CRZ-T pinout, ISL6366CRZ-T application, or ISL6366CRZ-T equivalent, key selection criteria include VR12/IMVP7 compliance, programmable phase-dropping in PSI1/PSI2/PSI3 modes, differential remote sensing, DCR/resistor current sensing with thermal compensation, and dual-oscillator architecture supporting up to 1MHz per phase.
Technical Context
The ISL6366CRZ-T implements two independent PWM control loops: VR0 supports 1–6 phases with coupled-inductor compatibility and active phase adding/dropping via SVID-triggered PSI# signals; VR1 operates as a dedicated single-phase regulator with DVS and no-droop operation. Both outputs use precision current sensing-via IMON/IMONS pins and integrated thermal-compensated comparators-for droop programming, channel balancing, and average/precision overcurrent protection.
EAPP modulation enables variable-frequency transient response with evenly distributed pulses and voltage feed-forward, reducing beat-frequency oscillation. Independent oscillators per phase (up to 1MHz), programmable slew rate for Fast Dynamic VID on VR0, and diode emulation in light-load modes are implemented without external phase doublers or PWM-line-based phase dropping.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Compliance | Intel VR12/IMVP7 specification compliant; enables direct integration into desktop/mobile CPU VR designs requiring SVID communication and PSI# coordination. |
| Output Configuration | Dual output: VR0 = 1–6-phase for core/memory; VR1 = single-phase for graphics/system agent/I/O; no shared oscillator or feedback path. |
| Accuracy | ±0.5% closed-loop system accuracy across load, line, and temperature; ensures tight VOUT positioning under dynamic CPU load changes. |
| Current Sensing | Supports both precision resistor and DCR sensing with integrated thermal compensation via TM/TMS pins; enables accurate droop programming and channel-current balancing. |
| Phase Control | Programmable 1- or 2-phase operation in PSI1/PSI2/PSI3 modes; diode emulation enabled in ultra-low-power states to reduce magnetic and switching losses. |
| Modulation Scheme | Enhanced Active Pulse Positioning (EAPP); delivers linear control with variable frequency during transients to suppress beat-frequency oscillation and improve phase current balance. |
| Oscillator Frequency | Up to 1MHz per phase; allows optimization of efficiency, component size, and transient response without sacrificing stability. |
Pinout & Package
ISL6366CRZ-T is housed in a 48-pin QFN package (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Pin functions are defined per the official Intersil FN6964 Rev 1.00 datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Primary power input | Supplies internal LDOs and gate drivers; requires local bulk and ceramic decoupling for stable 5V–12V input operation. |
| FB | Feedback input | Connects to voltage divider at regulated output; senses remote VOUT for precision droop control and load-line programming. |
| IMON | Current monitor output | Reports sensed load current to CPU via SVID bus; enables real-time IOUT register readback and PSI# coordination. |
| SVID_DATA / SVID_CLK | SVID bus interface | Two-wire serial interface for VID code updates, IMAX/TMAX/BOOT register programming, and PSI# handshake with processor. |
| EN | Enable input | Threshold-sensitive logic input; coordinates startup timing with other rails via precise voltage-level detection. |
| TM / TMS | Thermal monitoring inputs | Interface with NTC thermistors; digitized internally for thermal compensation of current sense elements and overtemperature protection. |
Key Features
| Feature | Design Value |
|---|---|
| VR12/IMVP7 SerialVID Compliance | Enables full SVID protocol support-including programmable IMAX, TMAX, BOOT, and ADDRESS OFFSET registers-for seamless integration with Intel CPUs. |
| EAPP Modulation | Delivers sub-100ns transient response with reduced output capacitance requirements by eliminating beat-frequency oscillation and improving pulse distribution. |
| Dual Independent Oscillators | Allows VR0 and VR1 to operate at different frequencies (up to 1MHz each), optimizing efficiency and noise performance per rail without cross-coupling. |
| DCR/Resistor Current Sensing | Eliminates need for external current-sense resistors in many designs; integrated thermal compensation maintains <±2% current measurement error from –40°C to +125°C. |
| Active Phase Adding/Dropping | Reduces light-load power loss by dynamically scaling active phases based on SVID PSI# commands-not via PWM-line manipulation-preserving transient headroom. |
Applications
| Desktop CPU Voltage Regulation | Mobile Platform VR for Core & Graphics |
|---|---|
Use Scenario: Regulating 1.0V–1.5V core voltage for Intel 2nd–4th Gen Core i7/i5 processors under dynamic multi-threaded workloads. IC Role / Device Role / Timing Role: Dual-output VR controller managing 6-phase VR0 for CPU core and 1-phase VR1 for GT graphics voltage, synchronized via SVID and PSI#. Use Value: ±0.5% regulation accuracy and EAPP modulation ensure stable VOUT during rapid DVFS transitions, minimizing voltage undershoot/overshoot without added bulk capacitance. | Use Scenario: Powering CPU core and integrated GPU in ultrabook platforms with strict thermal and efficiency constraints. IC Role / Device Role / Timing Role: VR controller implementing PSI2/PSI3 phase-dropping and diode emulation to maintain >85% efficiency at 1A load while preserving fast wake-up response. Use Value: Thermal-compensated DCR sensing and dual-oscillator architecture enable accurate current reporting and independent frequency tuning for optimal power delivery across operating modes. |
| Server Memory VR Module | High-Performance Computing Reference Design |
Use Scenario: Delivering tightly regulated DDR3/DDR4 memory VDDQ (1.2V–1.35V) with load-line droop matching JEDEC specifications. IC Role / Device Role / Timing Role: VR0 configured as 6-phase regulator for memory subsystem; uses differential remote sensing and IMON reporting for closed-loop calibration with memory controller. Use Value: Precision resistor/DCR current sensing with integrated thermal compensation ensures <±3% current measurement error across –40°C to +95°C ambient, critical for memory margining. | Use Scenario: Reference board for VR12-compliant motherboard development targeting workstation-class Xeon E3/E5 processors. IC Role / Device Role / Timing Role: Primary PWM controller coordinating with PMBus-compatible PMICs via SVID; supports programmable Fast Dynamic VID slew rate and DVC for VR0. Use Value: Coupled-inductor compatibility and independent VR0/VR1 oscillators allow flexible layout and noise isolation between core and I/O power domains. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output VR controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR3567BTRPBF | Single-die dual-output VR12.5 controller with integrated MOSFET drivers; supports up to 8+1 phases; lacks EAPP modulation and uses standard CCM control. | Targeted at higher-phase-count server VRs; does not support coupled-inductor mode or PSI3 diode emulation. | Choose IR3567BTRPBF when higher integration (drivers-on-die) and VR12.5 compliance are required; select ISL6366CRZ-T for EAPP-enabled transient performance and IMVP7-specific PSI coordination. |
| TPS53679RTAT | TI dual 6+1-phase VR12/IMVP7 controller with D-CAP+ modulation; includes integrated boot diode and enhanced telemetry but no thermal compensation for DCR sensing. | Optimized for TI ecosystem designs; supports PMBus in addition to SVID but requires external NTC for thermal compensation. | Choose TPS53679RTAT for PMBus telemetry and integrated boot diode; select ISL6366CRZ-T when thermal-compensated DCR sensing and EAPP transient response are design priorities. |
Compared with IR3567BTRPBF and TPS53679RTAT, the ISL6366CRZ-T uniquely combines EAPP modulation for beat-free transient response, integrated thermal compensation for DCR sensing, and native PSI3 diode emulation-making it optimal for IMVP7 platforms where light-load efficiency and voltage positioning accuracy are critical.
Availability
ISL6366CRZ-T is available at Aetrix Electronics and suitable for desktop CPU voltage regulation, mobile platform VR modules, server memory power delivery, and high-performance computing reference designs requiring stable component supply and long-term lifecycle support.
Supply support for ISL6366CRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation, now part of Renesas Electronics, designs high-performance analog and power management ICs for computing, industrial, and communications markets, certified under ISO9001 quality systems.
The ISL6366CRZ-T belongs to Intersil's VR12/IMVP7-compliant PWM controller product line, engineered specifically for high-efficiency, multi-phase CPU voltage regulation with intelligent phase management and SVID-based system coordination.
FAQ
What is the primary function of the ISL6366CRZ-T in a CPU power delivery system?
The ISL6366CRZ-T serves as a dual-output PWM controller that manages both the microprocessor core/memory voltage (VR0, 1–6 phases) and peripheral voltage (VR1, 1 phase) in Intel VR12/IMVP7-compliant systems. It executes precise droop control, phase adding/dropping via SVID PSI# signals, and real-time current reporting through the IMON pin-enabling tight voltage regulation and adaptive efficiency scaling across all CPU operating states. The ISL6366CRZ-T is essential for maintaining ±0.5% system accuracy under dynamic load conditions.
Does the ISL6366CRZ-T support both resistor-based and DCR-based current sensing?
Yes, the ISL6366CRZ-T supports both precision external resistor and inductor DCR current sensing methods. It integrates programmable current sense resistors and thermal compensation circuitry tied to TM/TMS pins, enabling accurate load-line programming, channel-current balancing, and overcurrent protection across –40°C to +125°C. This dual-sensing capability eliminates the need for external amplifiers or calibration components in most VR12/IMVP7 implementations using the ISL6366CRZ-T.
How does the Enhanced Active Pulse Positioning (EAPP) modulation in the ISL6366CRZ-T improve transient response?
EAPP modulation in the ISL6366CRZ-T achieves faster transient response by dynamically adjusting PWM pulse position and frequency during load steps-reducing beat-frequency oscillation and distributing pulses evenly across phases. Unlike fixed-frequency CCM controllers, EAPP maintains linear control behavior and improves phase current balance during transients, allowing fewer output capacitors while meeting VR12/IMVP7 undershoot/overshoot limits. This behavior is intrinsic to the ISL6366CRZ-T's analog control architecture and requires no firmware or external configuration.
Can the ISL6366CRZ-T operate in PSI2 or PSI3 low-power modes with diode emulation enabled?
Yes, the ISL6366CRZ-T supports diode emulation in both PSI2 and PSI3 ultra-low-power modes, automatically transitioning to single-phase operation with synchronous rectifier disabled to emulate a diode's conduction behavior. This reduces switching and core losses significantly at light loads, improving efficiency without compromising recovery time when the PSI# signal is de-asserted. Diode emulation is configurable per phase and is a built-in feature of the ISL6366CRZ-T's phase-control logic-not dependent on external components or firmware.
What package type and pin count does the ISL6366CRZ-T use?
The ISL6366CRZ-T is packaged in a 48-pin QFN (7mm × 7mm, 0.5mm pitch) with an exposed thermal pad for enhanced power dissipation. This RoHS-compliant, lead-free package supports reflow soldering and provides low-inductance connections for high-frequency PWM operation. Pin assignments-including SVID_DATA, SVID_CLK, FB, IMON, TM, TMS, and EN-are fully documented in the Intersil FN6964 Rev 1.00 datasheet and are electrically validated for VR12/IMVP7 system integration using the ISL6366CRZ-T.
ISL6366CRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 60-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel IMVP-7, VR12™
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.25V ~ 1.52V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 60-QFN (7x7)
ISL6366CRZ-T FAQ
1.How can I place an order for ISL6366CRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6366CRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6366CRZ-T reliable?
The price and inventory of ISL6366CRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6366CRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6366CRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6366CRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6366CRZ-T?
ISL6366CRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6366CRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6366CRZ-T?
For technical support, including ISL6366CRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6366CRZ-T requirements.
6.How does Aetrix verify that ISL6366CRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6366CRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6366CRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6366CRZ-T?
All ISL6366CRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6366CRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6366CRZ-T part is unused and in its original packaging.
Return procedure for ISL6366CRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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