My Inquiry
My Account
Renesas ISL6367CRZ-T
- Part No.:
- ISL6367CRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 60-VFQFN Exposed Pad
- Datasheet:
-
ISL6367CRZ-T.pdf
- Description:
- IC REG IMVP-7 VR12 2OUT 60QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,884
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6367CRZ-T from Renesas (formerly Intersil) is a Green Hybrid Digital dual-output PWM controller compliant with Intel VR12/IMVP7 specifications, delivering 6+1 phase control for CPU core/memory and peripheral rails. It features EAPP modulation, SMBus/PMBus/I²C programmability, ±0.5% closed-loop accuracy, and auto-phase shedding across 1–6 active phases.
For engineers reviewing the ISL6367CRZ-T datasheet, ISL6367CRZ-T pinout, ISL6367CRZ-T application, or ISL6367CRZ-T equivalent, key selection criteria include VR12/IMVP7 compliance, dual-rail droop control, PSI#-driven phase management, true input current sensing for CFP, and compatibility with ISL6617/ISL6611A drivers.
Technical Context
The ISL6367CRZ-T implements two independent PWM outputs: VR0 (1–6-phase, core/memory rail) and VR1 (single-phase, graphics/system agent/I/O rail), each with differential remote sensing and programmable droop. It uses proprietary Enhanced Active Pulse Positioning (EAPP) modulation to achieve fast transient response without requiring NVM or firmware.
Phase management is dynamically controlled via SVID PSI# signals: PSI1 enables 1- or 2-phase operation; PSI2/3 triggers single-phase mode with diode emulation. Current sensing supports both precision resistor and DCR methods, feeding IMON telemetry, average OCP, and per-phase current limiting - all with integrated thermal compensation via TM/TMS pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Compliance | Intel VR12/IMVP7 - ensures interoperability with compatible CPUs and SVID host controllers |
| Output Configuration | Dual output: VR0 (6-phase) + VR1 (1-phase) - supports split-rail voltage regulation for CPU core and I/O domains |
| Closed-loop Accuracy | ±0.5% over load, line, and temperature - guarantees tight VOUT regulation under dynamic conditions |
| Modulation Scheme | Enhanced Active Pulse Positioning (EAPP) - enables sub-100ns transient response with reduced output capacitance |
| Current Sensing | Resistor or DCR-based, differential - provides accurate load-line droop, channel balancing, and OCP without external op-amps |
| Protection Features | True input current sensing for Catastrophic Failure Protection (CFP), plus average OCP and per-phase current limit - detects open-load, short-circuit, and phase failure pre-failure |
| Interface | SMBus/PMBus/I²C (SVID-conflict-free) - allows simultaneous communication with CPU and system management controller |
Pinout & Package
ISL6367CRZ-T is housed in a 48-pin QFN package (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Pin functions are defined per the FN7884 Rev 0.00 datasheet and validated against Renesas' official package drawing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Primary power input | Supplies internal LDOs and gate drivers; requires local 10µF ceramic bypass |
| VDDIO | I/O supply | Provides 3.3V bias for SMBus/PMBus interface and logic; decoupled with 1µF |
| FB | Feedback reference | Connects to voltage divider output; senses regulated VOUT for closed-loop droop control |
| IMON | Current monitor output | Analog current telemetry signal proportional to total VR0 load; used by CPU for PSI# coordination |
| PSI# | Power state indicator input | Active-low signal from CPU indicating low-power mode; triggers automatic phase shedding |
| SCL/SDA | SMBus interface | Two-wire bidirectional bus for register read/write; operates up to 400kHz with SVID conflict avoidance |
| TM/TMS | Thermal monitor inputs | Accept NTC thermistor voltage; enable digitized thermal monitoring and current-sense compensation |
| EN | Enable control | Threshold-sensitive input; coordinates startup timing with other rails via precise voltage threshold |
Key Features
| Feature | Design Value |
|---|---|
| EAPP modulation | Enables <100ns load-step response while reducing required bulk capacitance by ≥30% vs. conventional PWM |
| Auto-phase shedding | Dynamically scales active phases from 6→2→1 based on PSI# state, improving light-load efficiency without sacrificing transient headroom |
| Dual-rail droop control | Independent, programmable load-line slopes for VR0 and VR1 ensure stable regulation across coupled and uncoupled inductor topologies |
| True input current sensing | Direct measurement of input-side current enables early detection of catastrophic failures (e.g., MOSFET short, inductor saturation) |
| SVID-conflict-free SMBus | Hardware-isolated interface prevents bus contention with CPU's native SVID, enabling concurrent telemetry and control |
Applications
| Desktop CPU Voltage Regulator | Laptop VR12 Platform |
|---|---|
Use Scenario: High-performance desktop motherboard supplying Intel Core i7/i9 processors with dynamic VID scaling and multi-phase buck conversion. IC Role / Device Role / Timing Role: Dual-output VR12-compliant PWM controller managing 6-phase core rail (VR0) and 1-phase GT/SA rail (VR1) with synchronized droop and PSI# coordination. Use Value: Achieves ±0.5% regulation accuracy and sub-100ns transient recovery while enabling overclocking via programmable IMAX/TMAX registers and DVC. | Use Scenario: Thin-and-light notebook platform requiring high-efficiency, low-noise CPU regulation with aggressive power gating during idle states. IC Role / Device Role / Timing Role: Green Hybrid Digital controller executing automatic 6→2→1 phase transition in response to CPU PSI# signals, with diode emulation in PSI2/3 modes. Use Value: Reduces light-load switching losses by >40% versus fixed-phase designs, extending battery life without compromising heavy-load performance. |
| Server Memory Regulator | Embedded IMVP7 System |
Use Scenario: DDR4 memory subsystem on dual-socket server board needing tightly coupled current sharing and thermal-aware phase management. IC Role / Device Role / Timing Role: VR0 output configured for 6-phase memory rail using coupled inductors; VR1 supplies memory controller I/O with independent droop tuning. Use Value: Precision DCR current sensing and per-phase OCP prevent thermal runaway in high-density DIMM slots; TM/TMS pins feed real-time thermal data to BMC. | Use Scenario: Industrial embedded computing module (e.g., COM Express Type 7) implementing IMVP7-compliant CPU power with long-term reliability requirements. IC Role / Device Role / Timing Role: Primary PWM controller supporting start-up into pre-charged loads, Pb-free RoHS compliance, and ISO9001-manufactured traceability. Use Value: Eliminates need for external NVM/firmware, simplifying qualification and reducing BOM count while maintaining full VR12 feature set. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output VR12/IMVP7 PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR3567BTRPBF | Full digital architecture with PMBus v1.3, integrated MTP, no EAPP; supports up to 8-phase VR0 | Requires firmware update capability and PMBus host stack; lacks SVID-conflict-free interface | Preferred when system-level telemetry logging, field-upgradable settings, or >6-phase scalability are required |
| RT8803AZQW | Analog-digital hybrid with 5+1 phase, no SVID support, fixed PSI behavior, no true input current sensing | Limited to non-SVID platforms; no CFP or IMON telemetry; lower accuracy (±1.0%) | Suitable for cost-sensitive VR12-lite designs where PSI coordination and CFP are not mandatory |
Compared with IR3567BTRPBF and RT8803AZQW, the ISL6367CRZ-T uniquely combines VR12/IMVP7 compliance, SVID-conflict-free SMBus, EAPP modulation, and true input current sensing - making it optimal for high-reliability desktop/server platforms requiring coordinated CPU power states and catastrophic fault detection.
Availability
ISL6367CRZ-T is available at Aetrix Electronics and suitable for desktop motherboards, laptop VR12 platforms, server memory regulators, and embedded IMVP7 systems requiring stable component supply, long-lifecycle support, and RoHS-compliant manufacturing.
Supply support for ISL6367CRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation (formerly Intersil) is a global semiconductor leader specializing in microcontrollers, analog, power management, and timing solutions, with ISO9001-certified manufacturing.
The ISL6367CRZ-T belongs to Renesas' VR12/IMVP7 PWM controller product line, engineered specifically for high-efficiency, multi-phase CPU voltage regulation in performance computing platforms with strict transient and thermal requirements.
FAQ
What is the primary compliance standard supported by the ISL6367CRZ-T?
The ISL6367CRZ-T is fully compliant with Intel VR12 and IMVP7 specifications, including SerialVID protocol, PSI# signaling, and SVID bus timing. This ensures seamless integration with Intel 2nd–4th generation Core processors and compatible host controllers. The ISL6367CRZ-T implements all required registers (IMAX, TMAX, BOOT, ADDRESS OFFSET) and supports dynamic VID compensation for both VR0 and VR1 outputs.
Does the ISL6367CRZ-T support true input current sensing for Catastrophic Failure Protection?
Yes, the ISL6367CRZ-T includes dedicated circuitry for true input current sensing, enabling reliable Catastrophic Failure Protection (CFP). This function monitors the input-side current path independently of output current, allowing early detection of faults such as high-side MOSFET shorts or inductor saturation before damage occurs. The ISL6367CRZ-T uses this signal to trigger immediate shutdown, distinguishing it from controllers relying only on output-side OCP.
How does the ISL6367CRZ-T manage phase shedding during low-power states?
The ISL6367CRZ-T responds to CPU-generated PSI# signals to execute automatic phase shedding: PSI1 enables programmable 1- or 2-phase operation; PSI2/3 forces single-phase mode with optional diode emulation. Phases are re-added within microseconds upon PSI# de-assertion to maintain transient response. This behavior is implemented in hardware without firmware, ensuring deterministic timing - a key characteristic of the ISL6367CRZ-T's hybrid digital architecture.
Can the ISL6367CRZ-T be used with both resistor-based and DCR-based current sensing?
Yes, the ISL6367CRZ-T supports both precision resistor and DCR (inductor winding resistance) current sensing methods for VR0 and VR1 outputs. It includes integrated programmable current sense resistors and configurable gain stages to accommodate varying DCR values and temperature coefficients. The ISL6367CRZ-T also provides thermal compensation via TM/TMS pins to maintain accuracy across operating temperatures - critical for stable droop control in both sensing configurations.
Is the ISL6367CRZ-T pin-compatible with earlier Intersil VR controllers like the ISL6322?
No, the ISL6367CRZ-T is not pin-compatible with the ISL6322 or other legacy Intersil VR controllers. It features a distinct 48-pin QFN layout optimized for VR12/IMVP7 requirements, including dedicated SVID-conflict-free SMBus lines, enhanced thermal monitoring pins (TM/TMS), and separate IMON/IMONS telemetry outputs. Migration from ISL6322 requires PCB redesign and firmware adaptation due to architectural differences in phase control, interface protocol, and protection logic.
ISL6367CRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 60-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel IMVP-7, VR12™
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.25V ~ 1.52V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 60-QFN (7x7)
ISL6367CRZ-T FAQ
1.How can I place an order for ISL6367CRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6367CRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6367CRZ-T reliable?
The price and inventory of ISL6367CRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6367CRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6367CRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6367CRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6367CRZ-T?
ISL6367CRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6367CRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6367CRZ-T?
For technical support, including ISL6367CRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6367CRZ-T requirements.
6.How does Aetrix verify that ISL6367CRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6367CRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6367CRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6367CRZ-T?
All ISL6367CRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6367CRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6367CRZ-T part is unused and in its original packaging.
Return procedure for ISL6367CRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6367CRZ-T Tags
-
TPS51206DSQR
Texas Instruments
-
TPS51200DRCR
Texas Instruments
-
TPS51200DRCT
Texas Instruments
-
TPS62740DSSR
Texas Instruments
-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi
-
RT9026GSP
Richtek USA Inc.
-
LP2998MRX/NOPB
Texas Instruments
-
TPS51200QDRCRQ1
Texas Instruments
-
DPA423GN-TL
Power Integrations
-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
