Renesas ISL6367CRZ-TK
- Part No.:
- ISL6367CRZ-TK
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 60-VFQFN Exposed Pad
- Datasheet:
-
ISL6367CRZ-TK.pdf
- Description:
- IC REG IMVP-7 VR12 2OUT 60QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,313
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL6367CRZ-TK from Renesas (formerly Intersil) is a Green Hybrid Digital dual-output PWM controller compliant with Intel VR12/IMVP7 specifications, delivering 6+1 phase control for CPU core/memory and peripheral rails, featuring EAPP modulation, SMBus/PMBus/I2C interface, and PSI#-driven auto-phase shedding for high light-load efficiency in server and desktop VRMs.
For engineers reviewing the ISL6367CRZ-TK datasheet, ISL6367CRZ-TK pinout, ISL6367CRZ-TK application, or ISL6367CRZ-TK equivalent, key selection considerations include VR12/IMVP7 compliance, dual-output 6+1 phase architecture, EAPP transient response, SVID/SMBus coexistence, and programmable droop/diode emulation for dynamic load management in high-performance computing power delivery.
Technical Context
The ISL6367CRZ-TK implements two independent PWM outputs: VR0 (1–6-phase, core/memory rail) and VR1 (1-phase, graphics/system agent/I/O rail), each with differential remote sensing and ±0.5% closed-loop system accuracy across load, line, and temperature. It supports coupled-inductor and phase-doubler topologies compatible with ISL6617/ISL6611A drivers.
Its hybrid digital architecture uses no NVM or firmware, relying on SMBus/PMBus/I2C (SVID-conflict-free) for configuration of IMAX, TMAX, BOOT, and ADDRESS OFFSET registers. Phase shedding is dynamically managed via PSI# signals-entering 1-/2-phase (PSI1) or single-phase with diode emulation (PSI2/3)-with active phase adding on load step-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Compliance | Intel VR12/IMVP7 specification compliant for CPU voltage regulation |
| Output Configuration | Dual output: VR0 (6-phase core/memory), VR1 (1-phase graphics/system agent) |
| Modulation Scheme | Enhanced Active Pulse Positioning (EAPP) for sub-100ns transient response |
| Interface | SMBus/PMBus/I2C + SVID-compatible bus with conflict-free operation |
| Current Sensing | Differential resistor or DCR-based sensing with integrated programmable current sense resistors |
| Accuracy | ±0.5% closed-loop system accuracy over load, line, and temperature range |
| Thermal Monitoring | Dual NTC thermistor inputs (TM/TMS) with internal digitization and compensation |
| Protection | True input current sensing for Catastrophic Failure Protection (CFP), average OCP, per-phase current limiting |
Pinout & Package
ISL6367CRZ-TK is housed in a 48-pin QFN package (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Pin functions are defined per the ISL6367 datasheet Rev 0.00 (FN7884), including dedicated VR0/VR1 PWM outputs, IMON/IMONS current monitor pins, FB/REFIN feedback nodes, TM/TMS thermal inputs, and SMBus/SVID bidirectional data/control lines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VR0_1–VR0_6 | Phase PWM outputs (VR0) | Drive external high-side MOSFETs for 6-phase core/memory regulator |
| VR1_1 | Phase PWM output (VR1) | Drives single-phase peripheral rail (graphics/system agent/I/O) |
| IMON / IMONS | Current monitor outputs | Provide analog current telemetry to CPU via IOUT register over SMBus |
| FB / REFIN | Voltage feedback inputs | Differential remote sensing nodes enabling ±0.5% regulation accuracy |
| TM / TMS | Thermal monitor inputs | Accept NTC thermistor voltage for digitized die/package temperature monitoring |
| SCL / SDA / SVI_DATA / SVI_CLK | Control interface pins | Support concurrent SMBus/PMBus/I2C and SVID communication without bus conflict |
Key Features
| Feature | Design Value |
|---|---|
| Green Hybrid Digital Architecture | Eliminates NVM/firmware dependency while retaining digital configurability via SMBus/PMBus |
| EAPP Modulation | Enables fast transient response with fewer bulk capacitors and reduced board area |
| Auto Phase Shedding | Reduces magnetic and switching losses at light load without degrading heavy-load transient performance |
| Droop & Diode Emulation | Programmable load-line control and discontinuous conduction mode for >90% efficiency at 10% load |
| True Input Current Sensing | Enables Catastrophic Failure Protection (CFP) by detecting input-side short-circuit or overload events |
| Start-up into Pre-Charged Load | Allows safe initialization when output capacitor is already biased, preventing reverse current flow |
Applications
| Server CPU Voltage Regulation | Desktop High-End VRM |
|---|---|
Use Scenario: Regulating core voltage for dual-socket Xeon or EPYC processors under dynamic workloads including AI inference and virtualization. IC Role / Device Role / Timing Role: Primary VR12/IMVP7-compliant PWM controller managing 6-phase VR0 and 1-phase VR1 with SVID coordination. Use Value: EAPP modulation and auto-phase shedding maintain <1% voltage deviation during 50A/μs load steps while achieving >92% efficiency at 20% load. | Use Scenario: Power delivery for overclocked Core i9/K-series CPUs in gaming motherboards with aggressive thermal and transient requirements. IC Role / Device Role / Timing Role: Dual-rail controller implementing coupled-inductor topology for VR0 and discrete phase for VR1, supporting Dynamic VID Compensation (DVC). Use Value: Programmable slew rate and DVC enable stable voltage transitions during rapid frequency scaling without overshoot or instability. |
| Laptop High-Performance SoC | Workstation GPU Power Management |
Use Scenario: Multi-rail power sequencing for mobile HEDT platforms with integrated CPU/GPU and system agent domains. IC Role / Device Role / Timing Role: VR0 regulates CPU core/memory; VR1 supplies system agent; both use PSI#-triggered phase reduction for battery-aware efficiency. Use Value: Single-phase PSI2/3 operation with diode emulation extends battery runtime by reducing quiescent current and core losses during idle states. | Use Scenario: Dedicated 1-phase VR1 rail for high-bandwidth GPU memory or PCIe root complex power in professional workstations. IC Role / Device Role / Timing Role: Secondary PWM channel with differential remote sensing and precision droop control for stable GPU I/O voltage under burst loads. Use Value: ±0.5% closed-loop accuracy and true input current sensing prevent GPU throttling due to rail collapse or catastrophic shorts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output VR12/IMVP7 PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR3567BTRPBF | Full digital architecture with embedded NVM and PMBus-only interface; no SVID support | Requires separate SVID bridge IC for CPU coordination; higher BOM count | Preferred where full telemetry logging and firmware-updatable profiles are required |
| TPS53689RTAR | Analog-based 6+1 phase controller with proprietary Auto-Track™ loop; no SMBus/PMBus interface | Lacks digital configurability and CPU telemetry reporting; relies on analog VID pins | Selected for cost-sensitive designs where digital interface and IMON reporting are not needed |
Compared with IR3567BTRPBF and TPS53689RTAR, the ISL6367CRZ-TK uniquely combines VR12/IMVP7 compliance, SVID/SMBus coexistence, hybrid digital configurability without NVM, and EAPP-driven transient performance-making it optimal for high-efficiency, low-latency CPU VRMs requiring both CPU coordination and system-level telemetry.
Availability
ISL6367CRZ-TK is available at Aetrix Electronics and suitable for server motherboard design, high-end desktop VRMs, laptop SoC power delivery, and workstation GPU rail regulation requiring stable component supply, long-term lifecycle support, and consistent electrical performance across production batches.
Supply support for ISL6367CRZ-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation (acquired Intersil in 2017) is a global semiconductor leader delivering microcontrollers, analog, power, and connectivity solutions for automotive, industrial, and datacenter applications.
The ISL6367CRZ-TK belongs to Renesas' high-performance power management IC portfolio, specifically engineered for Intel VR12/IMVP7-compliant CPU voltage regulation in servers, desktops, and mobile workstations demanding precise droop control, fast transient response, and green-mode efficiency.
FAQ
What is the primary function of the ISL6367CRZ-TK in a CPU power delivery system?
The ISL6367CRZ-TK serves as a dual-output VR12/IMVP7-compliant PWM controller that manages 6-phase regulation for the CPU core/memory rail (VR0) and 1-phase regulation for the graphics/system agent/I/O rail (VR1). It enables precise droop control, fast transient response via EAPP modulation, and intelligent phase shedding using PSI# signals-all critical for modern high-performance CPU power delivery systems.
Does the ISL6367CRZ-TK support both SMBus and SVID interfaces simultaneously?
Yes, the ISL6367CRZ-TK supports concurrent SMBus/PMBus/I2C and SVID communication through dedicated pins (SCL/SDA and SVI_DATA/SVI_CLK), with hardware-level conflict avoidance designed to prevent bus contention during CPU boot and runtime telemetry exchange-ensuring reliable coordination between the controller and Intel-compatible processors.
How does the ISL6367CRZ-TK achieve high light-load efficiency?
The ISL6367CRZ-TK achieves high light-load efficiency through programmable PSI#-driven auto-phase shedding: entering 1- or 2-phase operation in PSI1 mode and single-phase with diode emulation in PSI2/3 modes. This reduces magnetic core losses and switching losses while maintaining fast transient recovery when load increases-verified to deliver >90% efficiency at 10% load in typical VRM implementations.
What current sensing methods does the ISL6367CRZ-TK support?
The ISL6367CRZ-TK supports both precision resistor-based and DCR-based differential current sensing for VR0 and VR1 outputs. It integrates programmable current sense resistors and provides IMON/IMONS analog outputs for CPU telemetry, enabling accurate load-line programming, per-phase current balancing, and average overcurrent protection without external op-amps or comparators.
Is the ISL6367CRZ-TK RoHS compliant and lead-free?
Yes, the ISL6367CRZ-TK is Pb-free and RoHS compliant, packaged in a 48-pin QFN (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Its manufacturing follows ISO9001 quality systems, and the device meets JEDEC J-STD-020 moisture sensitivity level (MSL) 3 requirements for standard surface-mount assembly processes.
ISL6367CRZ-TK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 60-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel IMVP-7, VR12™
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.25V ~ 1.52V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 60-QFN (7x7)
ISL6367CRZ-TK FAQ
1.How can I place an order for ISL6367CRZ-TK through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6367CRZ-TK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6367CRZ-TK reliable?
The price and inventory of ISL6367CRZ-TK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6367CRZ-TK is usually 5 days.
3.What payment methods are accepted for ISL6367CRZ-TK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6367CRZ-TK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6367CRZ-TK?
ISL6367CRZ-TK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6367CRZ-TK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6367CRZ-TK?
For technical support, including ISL6367CRZ-TK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6367CRZ-TK requirements.
6.How does Aetrix verify that ISL6367CRZ-TK is sourced from the original manufacturer or authorized distributors?
All ISL6367CRZ-TK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6367CRZ-TK meets industry standards.
7.What is the process for return or replacement of ISL6367CRZ-TK?
All ISL6367CRZ-TK units undergo pre-shipment inspection (PSI). If there is an issue with ISL6367CRZ-TK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6367CRZ-TK part is unused and in its original packaging.
Return procedure for ISL6367CRZ-TK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL6367CRZ-TK Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

