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Renesas ISL6367HCRZ
- Part No.:
- ISL6367HCRZ
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 60-VFQFN Exposed Pad
- Datasheet:
-
ISL6367HCRZ.pdf
- Description:
- IC REG IMVP-7 VR12 2OUT 60QFN
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
ISL6367HCRZ from Renesas Electronics (formerly Intersil) is a hybrid digital dual-output PWM controller for Intel VR12.5/VR12/IMVP7-compliant CPU voltage regulation, featuring 6-phase + 1-phase topology, ±0.5% closed-loop system accuracy, EAPP modulation, and SMBus/PMBus/I²C programmability with SVID conflict avoidance. It regulates microprocessor core/memory (VR0) and graphics/system agent/I/O (VR1) rails in high-performance computing platforms.
For engineers reviewing the ISL6367HCRZ datasheet, ISL6367HCRZ pinout, ISL6367HCRZ application, or ISL6367HCRZ equivalent, key selection considerations include VR12.5 compliance, phase shedding behavior in PSI1/PSI2 modes, droop vs. diode emulation configuration, IMON-based current telemetry, and thermal compensation via TMS/TM pins.
Technical Context
The ISL6367HCRZ implements a hybrid digital architecture-retaining analog control loops for stability while enabling digital configuration via SMBus/PMBus/I²C. It supports two independent outputs: VR0 (1–6 phases, phase-doubler compatible) and VR1 (1 phase), each with differential remote sensing and dedicated current-sense paths (resistor or DCR).
Its Enhanced Active Pulse Positioning (EAPP) modulation enables sub-100ns transient response without NVM or firmware; auto-phase shedding dynamically scales active phases from 1 to 6 based on load, while PSI#-driven mode transitions (PSI1/PSI2/PSI3) enable diode emulation and single-phase operation for light-load efficiency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Compliance | Intel VR12.5, VR12, and IMVP7 specifications - ensures interoperability with Intel CPUs and SVID bus coordination. |
| Output Topology | Dual output: VR0 (6-phase PWM for core/memory), VR1 (1-phase PWM for graphics/system agent/I/O) - enables full platform rail management in one IC. |
| Accuracy | ±0.5% closed-loop system accuracy over load, line, and temperature - guarantees tight VOUT regulation across operating conditions. |
| Modulation Scheme | Enhanced Active Pulse Positioning (EAPP) - delivers fast transient response with reduced output capacitance count and no NVM/firmware dependency. |
| Current Sensing | Resistor or DCR-based differential sensing with integrated programmable sense resistors - enables precise droop programming and per-phase current limiting. |
| Thermal Monitoring | Dual NTC inputs (TM/TMS) with internal digitization - provides real-time thermal compensation of current sense elements and independent thermal protection. |
| Interface | SMBus/PMBus/I²C with SVID conflict-free design - allows concurrent communication with CPU without bus arbitration issues. |
Pinout & Package
ISL6367HCRZ is housed in a 48-pin QFN package (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Pin functions are validated per FN7917 Rev 0.00 datasheet and Renesas official documentation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Primary power input | Supplies bias and gate drive for all 6+1 PWM channels; requires local decoupling near package. |
| FB | Feedback reference node | Develops precision droop voltage via current-sense resistor/DCR; connects to remote sense point for accurate regulation. |
| IMON | Current monitor output | Analog current telemetry signal fed to CPU; used by processor for dynamic power state coordination (e.g., PSI# assertion). |
| SCL/SDA | I²C/SMBus interface | Two-wire bidirectional bus supporting PMBus commands, register reads/writes, and telemetry reporting without SVID interference. |
| PSI# | Power state indicator input | Active-low signal from CPU indicating entry into low-power states (PSI1/PSI2); triggers phase shedding and diode emulation. |
| EN | Enable control | Threshold-sensitive logic input coordinating startup timing with other VR rails; supports sequencing requirements. |
| TM / TMS | Thermal sensor inputs | Dedicated analog inputs for NTC thermistors; enable per-regulator thermal compensation and overtemperature shutdown. |
Key Features
| Feature | Design Value |
|---|---|
| Hybrid digital architecture | Eliminates need for NVM and firmware while retaining digital configurability - reduces BOM cost, validation effort, and supply chain complexity. |
| Auto-phase shedding (VR12.5 mode) | Reduces active phases from 6 to 1 based on load demand - maintains >90% efficiency at 10% load without sacrificing transient headroom. |
| Droop + diode emulation options | Configurable per-output: droop for VR0 ensures stable load-line compliance; diode emulation for VR1 improves light-load efficiency in peripheral rails. |
| Independent oscillators (≤2MHz/ph) | Enables frequency tuning per phase to avoid beat frequencies and optimize EMI - supports layout-specific noise mitigation strategies. |
| Start-up into pre-charged load | Prevents reverse current flow during hot-insertion or multi-rail sequencing - eliminates need for external reverse-blocking FETs. |
Applications
| Server CPU Voltage Regulation | Desktop High-End Platform VR |
|---|---|
Use Scenario: Regulating core and memory voltage for dual-socket Xeon Scalable processors in 1U/2U rack servers with strict thermal and efficiency targets. IC Role / Device Role / Timing Role: Primary VR controller managing VR0 (6-phase core rail) and VR1 (1-phase system agent rail) under VR12.5 protocol with SVID coordination. Use Value: Enables <1% output voltage deviation during 50A/µs load transients while maintaining >85% efficiency at 5% load via PSI2-driven single-phase operation. | Use Scenario: Power delivery for overclocked Core i9/K-series CPUs in ATX motherboards requiring dynamic VID, phase shedding, and thermal-aware current balancing. IC Role / Device Role / Timing Role: Hybrid digital PWM controller executing VR12-compliant droop control, fast dynamic VID compensation (DVC), and per-phase current limiting. Use Value: Supports 100+ MHz VID updates with DVC, achieving <200mV overshoot during 30A step loads while reducing required bulk capacitance by 30% via EAPP modulation. |
| Laptop CPU/GPU Co-Regulation | Workstation Memory Subsystem VR |
Use Scenario: Dual-rail regulation in thin-and-light notebooks where VR0 powers CPU cores and VR1 supplies integrated GPU or PCIe root complex. IC Role / Device Role / Timing Role: Dual-output controller implementing PSI#-triggered phase shedding and diode emulation on VR1 to extend battery life during idle/light-use states. Use Value: Achieves >92% efficiency at 2A load on VR1 via diode emulation, extending runtime by ~12 minutes in video playback scenarios versus fixed-frequency alternatives. | Use Scenario: DDR4/DDR5 memory subsystem regulation in professional workstations requiring tight voltage tolerance and channel-current balancing across multiple DIMMs. IC Role / Device Role / Timing Role: VR0 controller delivering 6-phase droop-regulated VDDQ with DCR current sensing and per-phase current limit for memory channel redundancy. Use Value: Maintains ±5mV regulation window across 0–60A load range using integrated current sense resistors and TM-compensated sensing - prevents memory timing errors under thermal stress. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output VR controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR3567BTRPBF | Full digital architecture with embedded NVM and PMBus v1.3; supports VR13/IMVP8; lacks EAPP modulation and SVID conflict-free I²C. | Targeted at next-gen platforms requiring VR13 compliance and firmware-updatable profiles; not drop-in for VR12.5 systems. | Select IR3567BTRPBF only when upgrading to VR13 or requiring field-programmable loop compensation. |
| RT8803AZSP | Analog dual-controller with fixed 4+1 phase topology; no SMBus/PMBus; limited telemetry (no IMON/PSI#); no thermal compensation. | Suitable for cost-sensitive mainstream desktop boards without SVID coordination or advanced power-state management. | Choose RT8803AZSP only for non-Intel platforms or legacy VR12 implementations lacking PSI signaling. |
Compared with IR3567BTRPBF and RT8803AZSP, the ISL6367HCRZ uniquely balances digital configurability with analog stability-offering VR12.5 compliance, SVID-safe communication, and EAPP-enabled transient performance without firmware overhead, making it optimal for mature high-efficiency server and enthusiast desktop designs.
Availability
ISL6367HCRZ is available at Aetrix Electronics and suitable for server motherboard design, high-end desktop VR development, and workstation power architecture requiring stable component supply, long-lifecycle support, and VR12.5-compliant voltage regulation.
Supply support for ISL6367HCRZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader formed from the merger of Renesas Technology and NEC Electronics, specializing in microcontrollers, analog, power management, and timing solutions.
The ISL6367HCRZ belongs to Renesas' high-performance VR controller product line, designed specifically for Intel CPU voltage regulation in datacenter, enterprise, and enthusiast computing platforms with emphasis on efficiency, transient response, and SVID interoperability.
FAQ
What is the primary compliance standard supported by the ISL6367HCRZ?
The ISL6367HCRZ is fully compliant with Intel VR12.5, VR12, and IMVP7 specifications. It implements SerialVID with programmable registers (IMAX, TMAX, BOOT, ADDRESS OFFSET) and supports SVID bus coordination without conflict. This ensures seamless integration with Intel Core and Xeon processors requiring strict voltage positioning, phase control, and power-state signaling such as PSI#. The ISL6367HCRZ meets all mandatory timing, accuracy, and telemetry requirements defined in VR12.5 specification documents.
Does the ISL6367HCRZ support both resistor-based and DCR-based current sensing?
Yes, the ISL6367HCRZ supports both precision resistor and DCR (inductor winding resistance) current sensing methods for VR0 and VR1 outputs. It includes integrated programmable current sense resistors and configurable gain settings to match either sensing topology. The sensed current flows out of the FB pin to develop the droop voltage, and the same path feeds channel-current balancing and average overcurrent protection circuits. This dual-sensing flexibility allows designers to optimize cost (resistor) or board space (DCR) without compromising accuracy - a capability confirmed in FN7917 Rev 0.00.
How does the ISL6367HCRZ handle low-power states like PSI1 and PSI2?
The ISL6367HCRZ responds to the CPU's PSI# signal by entering programmable low-power modes: PSI1 activates 1- or 2-phase operation on VR0, while PSI2/PSI3 forces single-phase operation with diode emulation enabled on VR1. During these states, magnetic core and switching losses are minimized, improving light-load efficiency. When PSI# is de-asserted, dropped phases are reactivated within microseconds to sustain heavy-load transient response. This behavior is hardware-controlled and requires no firmware - a key feature of the ISL6367HCRZ's hybrid architecture.
What is the role of the EAPP modulation scheme in the ISL6367HCRZ?
EAPP (Enhanced Active Pulse Positioning) is Intersil's patented modulation scheme used in the ISL6367HCRZ to achieve ultra-fast transient response - typically under 100ns - while minimizing output capacitor count. Unlike conventional PWM, EAPP dynamically adjusts pulse position across phases to maintain even current distribution and reduce beat-frequency oscillation. It operates without NVM or firmware, relying on analog feedback with digital configuration. This modulation directly enables the ISL6367HCRZ's ability to meet VR12.5 transient specifications with fewer external components.
Can the ISL6367HCRZ be used in applications requiring remote voltage sensing?
Yes, the ISL6367HCRZ features true differential remote voltage sensing on both VR0 and VR1 outputs. Dedicated sense pins (e.g., VRS+, VRS−) eliminate potential differences between remote and local grounds, improving regulation accuracy and protection responsiveness. This capability ensures ±0.5% closed-loop system accuracy across load, line, and temperature variations - critical for high-current CPU rails where PCB trace resistance would otherwise cause significant voltage drop. Remote sensing is enabled by default and requires no configuration in the ISL6367HCRZ.
ISL6367HCRZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 60-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- Controller, Intel IMVP-7, VR12™
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.25V ~ 1.52V
- Operating Temperature:
- -10°C ~ 100°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 60-QFN (7x7)
ISL6367HCRZ FAQ
1.How can I place an order for ISL6367HCRZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6367HCRZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6367HCRZ reliable?
The price and inventory of ISL6367HCRZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6367HCRZ is usually 5 days.
3.What payment methods are accepted for ISL6367HCRZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6367HCRZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6367HCRZ?
ISL6367HCRZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6367HCRZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6367HCRZ?
For technical support, including ISL6367HCRZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6367HCRZ requirements.
6.How does Aetrix verify that ISL6367HCRZ is sourced from the original manufacturer or authorized distributors?
All ISL6367HCRZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6367HCRZ meets industry standards.
7.What is the process for return or replacement of ISL6367HCRZ?
All ISL6367HCRZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL6367HCRZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6367HCRZ part is unused and in its original packaging.
Return procedure for ISL6367HCRZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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