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Renesas ISL6367HIRZ-T
- Part No.:
- ISL6367HIRZ-T
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 60-VFQFN Exposed Pad
- Datasheet:
-
ISL6367HIRZ-T.pdf
- Description:
- IC REG CTRLR IMVP-7 VR12 2OUT
- Quantity:
- Payment:
- Shipping:
Inventory:3,462
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Product details
Overview
ISL6367HIRZ-T from Renesas (formerly Intersil) is a hybrid digital dual-output PWM controller for Intel VR12.5/VR12/IMVP7-compliant CPU voltage regulation, featuring 6-phase + 1-phase topology, ±0.5% closed-loop system accuracy, EAPP modulation, and SMBus/PMBus/I²C programmability with SVID conflict avoidance.
For engineers reviewing the ISL6367HIRZ-T datasheet, ISL6367HIRZ-T pinout, ISL6367HIRZ-T application, or ISL6367HIRZ-T equivalent, key selection criteria include VR12.5 compliance, phase shedding behavior in PSI1/PSI2 modes, droop control via IMON/FB current sensing, thermal compensation via TM/TMS, and dual-output remote sensing capability.
Technical Context
The ISL6367HIRZ-T implements two independent PWM outputs: VR0 (1–6-phase, core/memory rail) and VR1 (1-phase, graphics/system agent/I/O rail), each with differential remote sensing and programmable droop. It uses Enhanced Active Pulse Positioning (EAPP) modulation to achieve fast transient response without requiring NVM or firmware.
It supports Intel SerialVID with programmable IMAX, TMAX, BOOT, and ADDRESS OFFSET registers; enables auto-phase shedding across light-to-full load; and provides precision current monitoring via IMON pin and IOUT register reporting over SMBus/PMBus/I²C - all while maintaining SVID bus conflict-free operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Compliance | Intel VR12.5/VR12/IMVP7 - ensures interoperability with compatible CPUs and SVID host controllers. |
| Output Topology | Dual output: VR0 = 1–6-phase (core/memory); VR1 = 1-phase (graphics/system agent/I/O) - enables independent regulation of critical processor domains. |
| Accuracy | ±0.5% closed-loop system accuracy over load, line, and temperature - guarantees tight VOUT regulation under dynamic conditions. |
| Modulation Scheme | Enhanced Active Pulse Positioning (EAPP) - delivers fast transient response with reduced output capacitance requirements. |
| Interface | SMBus/PMBus/I²C with SVID conflict-free design - allows coexistence with CPU's native SVID bus without arbitration issues. |
| Current Sensing | Resistor or DCR-based differential sensing with integrated programmable current sense resistors - enables precise droop programming and channel-current balancing. |
| Thermal Monitoring | Dual NTC thermistor inputs (TM/TMS) with internal digitization - supports real-time thermal compensation of current sense elements. |
Pinout & Package
ISL6367HIRZ-T is housed in a 48-pin QFN package (7mm × 7mm, 0.5mm pitch) with exposed thermal pad. Pin functions are defined per the official ISL6367H datasheet (FN7917 Rev 0.00).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Input supply for controller logic and gate drivers | Accepts 3V to 27V input; powers internal regulators and high-side/lower-side gate drivers. |
| FB | Inverting feedback input for VR0 output | Connects to resistor divider; senses regulated output voltage and enables precision droop control via IMON current injection. |
| IMON | Current monitor output for VR0 | Provides analog current signal proportional to VR0 load; feeds into FB for droop and reports digitally via IOUT register. |
| VRSEL | VR mode selection input | Configures VR12.5 vs VR12/IMVP7 operation; sets VID table mapping and phase-shedding thresholds. |
| PSI# | Power state indicator input | Accepts SVID PSI# signal to trigger automatic phase shedding (PSI1/PSI2/PSI3) and diode emulation for light-load efficiency. |
| SCL/SDA | SMBus/PMBus/I²C interface pins | Enable bidirectional communication for configuration, telemetry (IOUT, VOUT, TEMP), and dynamic VID updates without SVID bus conflict. |
Key Features
| Feature | Design Value |
|---|---|
| Hybrid digital architecture | Eliminates need for NVM and firmware - reduces BOM cost, simplifies qualification, and avoids field update complexity. |
| Auto-phase shedding | Optimizes efficiency across 0–100% load range while preserving transient performance - no manual phase enable/disable required. |
| Droop control implementation | Uses IMON current signal injected into FB pin - achieves accurate load-line regulation without external op-amps or complex compensation. |
| Diode emulation in PSI2/PSI3 | Disables low-side FET during off-time in single-phase mode - eliminates reverse conduction loss and improves light-load efficiency. |
| Independent oscillators up to 2MHz | Per-phase clocking enables frequency optimization for EMI, efficiency, and component size trade-offs - no shared oscillator skew or jitter coupling. |
Applications
| Server CPU Voltage Regulation | Desktop High-End Platform VR |
|---|---|
Use Scenario: Regulating core voltage for multi-core Xeon or EPYC processors in 1U/2U rack servers with strict thermal and efficiency targets. IC Role / Device Role / Timing Role: Primary VR controller managing 6-phase VR0 for CPU core and 1-phase VR1 for system agent, with telemetry reported via PMBus to BMC. Use Value: ±0.5% accuracy and EAPP modulation ensure stable operation under rapid DVFS transitions; PSI#-driven phase shedding maintains >90% efficiency at 10% load. | Use Scenario: Power delivery for overclocked Core i9/K-series processors in enthusiast desktop motherboards with dual-channel memory and discrete GPU. IC Role / Device Role / Timing Role: Dual-rail controller delivering tightly coupled VR0 (core/memory) and VR1 (graphics/system agent) with dynamic VID compensation and remote sensing. Use Value: Droop control and DCR current sensing eliminate need for external current-sense resistors; SVID conflict-free I²C allows simultaneous BIOS and OS-level voltage tuning. |
| Laptop CPU VR Module | Workstation Memory Subsystem VR |
Use Scenario: Compact VR solution for mobile workstation CPUs where PCB area and thermal density are constrained. IC Role / Device Role / Timing Role: Hybrid controller enabling 6+1-phase operation in space-limited layout, using integrated current sense resistors and thermal compensation via TM/TMS. Use Value: Start-up into pre-charged load prevents inrush damage; diode emulation in PSI2 extends battery life during idle/sleep states. | Use Scenario: Dedicated memory rail regulation in dual-socket workstations supporting DDR4/DDR5 RDIMMs with high current demand and tight VDDQ tolerance. IC Role / Device Role / Timing Role: VR0 configured as 6-phase memory regulator with differential remote sensing and programmable slew rate for fast VID transitions. Use Value: Independent oscillator per phase allows optimized switching frequency for low-noise memory timing; average OCP protects against sustained overcurrent without false triggering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output VR controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR35201MTRPBF | Full digital architecture with embedded NVM and firmware; supports VR12.5 but requires firmware updates for new CPU generations. | Requires host-side firmware management; lacks native SVID conflict-free I²C - needs careful bus arbitration design. | Preferred when full programmability and future CPU compatibility via firmware patching are prioritized over simplicity and cost. |
| TPS53679RSLR | Analog-based 6+1-phase controller with proprietary Auto-Track™ loop; no SMBus/PMBus interface - only SVID and basic GPIO control. | No telemetry reporting or dynamic configuration; limited to TI-specific reference designs and BIOS integration. | Chosen for cost-sensitive, fixed-function platforms where telemetry and remote reconfiguration are not required. |
Compared with IR35201MTRPBF and TPS53679RSLR, the ISL6367HIRZ-T delivers hybrid simplicity (no NVM/firmware), guaranteed SVID conflict-free communication, and production-ready VR12.5 compliance out-of-box - reducing validation time and eliminating post-silicon software dependencies.
Availability
ISL6367HIRZ-T is available at Aetrix Electronics and suitable for server motherboard design, high-end desktop VR modules, mobile workstation power systems, and DDR memory subsystem regulation requiring stable component supply and long-term lifecycle support.
Supply support for ISL6367HIRZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains its high-performance analog and power management portfolio, emphasizing reliability, automotive-grade quality, and industrial longevity.
The ISL6367HIRZ-T belongs to Renesas' VR controller product line, engineered specifically for Intel CPU voltage regulation in datacenter, desktop, and mobile computing platforms with emphasis on efficiency, transient response, and seamless SVID integration.
FAQ
What is the primary compliance standard supported by the ISL6367HIRZ-T?
The ISL6367HIRZ-T is fully compliant with Intel VR12.5, VR12, and IMVP7 specifications. It implements SerialVID protocol, supports programmable IMAX/TMAX registers, and features SVID conflict-free SMBus/PMBus/I²C interface - ensuring direct compatibility with Intel-compatible host processors and platform controllers without bus arbitration conflicts.
How does the ISL6367HIRZ-T achieve high light-load efficiency?
The ISL6367HIRZ-T achieves high light-load efficiency through PSI#-triggered auto-phase shedding and diode emulation. In PSI1 mode, it operates in 1- or 2-phase; in PSI2/PSI3, it drops to single-phase with low-side FET disabled during off-time. This reduces magnetic core and switching losses while maintaining regulation integrity - a behavior confirmed in FN7917 Rev 0.00 for the ISL6367HIRZ-T.
Does the ISL6367HIRZ-T require external NVM or firmware for configuration?
No, the ISL6367HIRZ-T uses a hybrid digital architecture that eliminates the need for external NVM or firmware. All configuration - including IMAX, TMAX, BOOT, and ADDRESS OFFSET registers - is performed dynamically via SMBus/PMBus/I²C. This design reduces BOM cost, simplifies manufacturing, and avoids firmware update dependencies inherent in full-digital VR controllers.
What current sensing methods does the ISL6367HIRZ-T support?
The ISL6367HIRZ-T supports both precision resistor-based and DCR-based differential current sensing for VR0. It integrates programmable current sense resistors and uses the IMON pin to inject sensed current into the FB node for droop control. Current sensing also feeds channel-current balancing, average overcurrent protection, and individual phase limiting - all confirmed in the ISL6367HIRZ-T datasheet FN7917.
Can the ISL6367HIRZ-T start up into a pre-charged output capacitor?
Yes, the ISL6367HIRZ-T supports start-up into a pre-charged load - a feature explicitly documented in FN7917 Rev 0.00. This capability prevents inrush current damage during hot-swap or partial-system power-up scenarios, making the ISL6367HIRZ-T suitable for modular server and redundant power architectures where rail sequencing must accommodate existing voltage on downstream capacitors.
ISL6367HIRZ-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 60-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Controller, Intel IMVP-7, VR12™
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.25V ~ 1.52V
- Operating Temperature:
- -10°C ~ 100°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- -
ISL6367HIRZ-T FAQ
1.How can I place an order for ISL6367HIRZ-T through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL6367HIRZ-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL6367HIRZ-T reliable?
The price and inventory of ISL6367HIRZ-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6367HIRZ-T is usually 5 days.
3.What payment methods are accepted for ISL6367HIRZ-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6367HIRZ-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL6367HIRZ-T?
ISL6367HIRZ-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL6367HIRZ-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL6367HIRZ-T?
For technical support, including ISL6367HIRZ-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6367HIRZ-T requirements.
6.How does Aetrix verify that ISL6367HIRZ-T is sourced from the original manufacturer or authorized distributors?
All ISL6367HIRZ-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6367HIRZ-T meets industry standards.
7.What is the process for return or replacement of ISL6367HIRZ-T?
All ISL6367HIRZ-T units undergo pre-shipment inspection (PSI). If there is an issue with ISL6367HIRZ-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL6367HIRZ-T part is unused and in its original packaging.
Return procedure for ISL6367HIRZ-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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